stm32f0: spi: move to platform-specific directory
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73788ae5e6
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3 changed files with 1 additions and 1 deletions
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@ -1,3 +1,4 @@
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obj-y += source/platform/stm32f0/gpio.o
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obj-y += source/platform/stm32f0/rcc.o
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obj-y += source/platform/stm32f0/rtc.o
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obj-y += source/platform/stm32f0/spi.o
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79
source/platform/stm32f0/spi.c
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79
source/platform/stm32f0/spi.c
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#define _GNU_SOURCE
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#include <stdint.h>
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#include <stdlib.h>
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#include <libopencm3/stm32/gpio.h>
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#include <libopencm3/stm32/spi.h>
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#include <libopencm3/stm32/usart.h>
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#include <spi.h>
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static int stm32f0_spi_tx_rx(struct spi_dev *dev, void *rx_buf, size_t rx_len,
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const void *tx_buf, size_t tx_len);
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static struct spi_ops stm32f0_spi_ops = {
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.tx_rx = stm32f0_spi_tx_rx,
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};
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static void stm32f0_spi_init(void)
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{
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spi_set_master_mode(SPI1);
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spi_set_baudrate_prescaler(SPI1, SPI_CR1_BR_FPCLK_DIV_64);
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spi_set_clock_polarity_0(SPI1);
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spi_set_clock_phase_0(SPI1);
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spi_set_full_duplex_mode(SPI1);
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spi_set_unidirectional_mode(SPI1); /* bidirectional but in 3-wire */
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spi_set_data_size(SPI1, SPI_CR2_DS_8BIT);
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spi_enable_software_slave_management(SPI1);
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spi_send_msb_first(SPI1);
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spi_set_nss_high(SPI1);
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spi_fifo_reception_threshold_8bit(SPI1);
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SPI_I2SCFGR(SPI1) &= ~SPI_I2SCFGR_I2SMOD;
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spi_enable(SPI1);
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}
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struct spi_dev *spi_probe(void)
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{
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struct spi_dev *dev;
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if (!(dev = malloc(sizeof *dev)))
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return NULL;
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dev->ops = &stm32f0_spi_ops;
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dev->dev_id = SPI1;
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stm32f0_spi_init();
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return dev;
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}
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void spi_release(struct spi_dev *dev)
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{
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free(dev);
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}
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static int stm32f0_spi_tx_rx(struct spi_dev *dev, void *rx_buf, size_t rx_len,
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const void *tx_buf, size_t tx_len)
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{
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char *rx = rx_buf;
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const char *tx = tx_buf;
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size_t i;
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gpio_clear(GPIOB, GPIO6);
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for (i = 0; i < tx_len; ++i) {
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spi_send8(dev->dev_id, *tx++);
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(void)spi_read8(dev->dev_id);
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}
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if (rx_buf) {
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for (i = 0; i < rx_len; ++i) {
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spi_send8(dev->dev_id, 0);
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*rx++ = spi_read8(dev->dev_id);
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}
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}
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gpio_set(GPIOB, GPIO6);
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return 0;
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}
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