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upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support
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u-boot/arch/sh/include/asm/cpu_sh7734.h

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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
7 years ago
/* SPDX-License-Identifier: GPL-2.0+ */
sh: Add support Renesas SH7734 Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
13 years ago
/*
* (C) Copyright 2008, 2011 Renesas Solutions Corp.
*
* SH7734 Internal I/O register
*/
#ifndef _ASM_CPU_SH7734_H_
#define _ASM_CPU_SH7734_H_
#define CCR 0xFF00001C
#define CACHE_OC_NUM_WAYS 4
#define CCR_CACHE_INIT 0x0000090d
/* SCIF */
#define SCIF0_BASE 0xFFE40000
#define SCIF1_BASE 0xFFE41000
#define SCIF2_BASE 0xFFE42000
#define SCIF3_BASE 0xFFE43000
#define SCIF4_BASE 0xFFE44000
#define SCIF5_BASE 0xFFE45000
/* Timer */
sh: tmu: Changed TMU driver using array of structures This changed into access using array of structure from access to the register using the definition of the register by macro. And removed white space. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
12 years ago
#define TMU_BASE 0xFFD80000
sh: Add support Renesas SH7734 Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
13 years ago
sh: Add register definition of PFC for SH7734 Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
13 years ago
/* PFC */
#define PMMR (0xFFFC0000)
#define MODESEL0 (0xFFFC004C)
#define MODESEL2 (MODESEL0 + 0x4)
#define MODESEL2_INIT (0x00003000)
#define IPSR0 (0xFFFC001C)
#define IPSR1 (IPSR0 + 0x4)
#define IPSR2 (IPSR0 + 0x8)
#define IPSR3 (IPSR0 + 0xC)
#define IPSR4 (IPSR0 + 0x10)
#define IPSR5 (IPSR0 + 0x14)
#define IPSR6 (IPSR0 + 0x18)
#define IPSR7 (IPSR0 + 0x1C)
#define IPSR8 (IPSR0 + 0x20)
#define IPSR9 (IPSR0 + 0x24)
#define IPSR10 (IPSR0 + 0x28)
#define IPSR11 (IPSR0 + 0x2C)
#define GPSR0 (0xFFFC0004)
#define GPSR1 (GPSR0 + 0x4)
#define GPSR2 (GPSR0 + 0x8)
#define GPSR3 (GPSR0 + 0xC)
#define GPSR4 (GPSR0 + 0x10)
#define GPSR5 (GPSR0 + 0x14)
sh: Add support Renesas SH7734 Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
13 years ago
#endif /* _ASM_CPU_SH7734_H_ */