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/*
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* Cirrus Logic EP93xx CPU-specific support.
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*
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* Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
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*
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* Copyright (C) 2004, 2005
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* Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/ep93xx.h>
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#include <asm/io.h>
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/* We reset the CPU by generating a 1-->0 transition on DeviceCfg bit 31. */
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extern void reset_cpu(ulong addr)
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{
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struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE;
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uint32_t value;
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/* Unlock DeviceCfg and set SWRST */
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writel(0xAA, &syscon->sysswlock);
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value = readl(&syscon->devicecfg);
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value |= SYSCON_DEVICECFG_SWRST;
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writel(value, &syscon->devicecfg);
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/* Unlock DeviceCfg and clear SWRST */
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writel(0xAA, &syscon->sysswlock);
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value = readl(&syscon->devicecfg);
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value &= ~SYSCON_DEVICECFG_SWRST;
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writel(value, &syscon->devicecfg);
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/* Dying... */
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while (1)
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; /* noop */
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}
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