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/*
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* (C) Copyright 2004
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <malloc.h>
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#include <asm/m5249.h>
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#include <asm/io.h>
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/* Prototypes */
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int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
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int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
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int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
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#if 0
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#define FPGA_DEBUG
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#endif
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/* predefine these here for FPGA programming (before including fpga.c) */
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#define SET_FPGA(data) mbar2_writeLong(MCFSIM_GPIO1_OUT, data)
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#define FPGA_DONE_STATE (mbar2_readLong(MCFSIM_GPIO1_READ) & CONFIG_SYS_FPGA_DONE)
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#define FPGA_INIT_STATE (mbar2_readLong(MCFSIM_GPIO1_READ) & CONFIG_SYS_FPGA_INIT)
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#define FPGA_PROG_ACTIVE_HIGH /* on this platform is PROG active high! */
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#define out32(a,b) /* nothing to do (gpio already configured) */
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/* fpga configuration data - generated by bin2cc */
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const unsigned char fpgadata[] =
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{
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#include "fpgadata.c"
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};
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/*
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* include common fpga code (for esd boards)
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*/
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#include "../common/fpga.c"
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int checkboard (void) {
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ulong val;
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uchar val8;
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puts ("Board: ");
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puts("esd TASREG");
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val8 = ((uchar)~((uchar)mbar2_readLong(MCFSIM_GPIO1_READ) >> 4)) & 0xf;
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printf(" (Switch=%1X)\n", val8);
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/*
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* Set LED on
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*/
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val = mbar2_readLong(MCFSIM_GPIO1_OUT) & ~CONFIG_SYS_GPIO1_LED;
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mbar2_writeLong(MCFSIM_GPIO1_OUT, val); /* Set LED on */
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return 0;
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};
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phys_size_t initdram (int board_type) {
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unsigned long junk = 0xa5a59696;
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/*
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* Note:
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* RC = ([(RefreshTime/#rows) / (1/BusClk)] / 16) - 1
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*/
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#ifdef CONFIG_SYS_FAST_CLK
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/*
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* Busclk=70MHz, RefreshTime=64ms, #rows=4096 (4K)
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* SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=39
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*/
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mbar_writeShort(MCFSIM_DCR, 0x8239);
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#elif CONFIG_SYS_PLL_BYPASS
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/*
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* Busclk=5.6448MHz, RefreshTime=64ms, #rows=8192 (8K)
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* SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=02
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*/
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mbar_writeShort(MCFSIM_DCR, 0x8202);
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#else
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/*
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* Busclk=36MHz, RefreshTime=64ms, #rows=4096 (4K)
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* SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=22 (562 bus clock cycles)
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*/
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mbar_writeShort(MCFSIM_DCR, 0x8222);
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#endif
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/*
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* SDRAM starts at 0x0000_0000, CASL=10, CBM=010, PS=10 (16bit port),
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* PM=1 (continuous page mode)
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*/
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/* RE=0 (keep auto-refresh disabled while setting up registers) */
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mbar_writeLong(MCFSIM_DACR0, 0x00003324);
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/* BAM=007c (bits 22,21 are bank selects; 256kB blocks) */
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mbar_writeLong(MCFSIM_DMR0, 0x01fc0001);
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/** Precharge sequence **/
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mbar_writeLong(MCFSIM_DACR0, 0x0000332c); /* Set DACR0[IP] (bit 3) */
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out_be32((void *)0, junk); /* write to a memory location to init. precharge */
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udelay(0x10); /* Allow several Precharge cycles */
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/** Refresh Sequence **/
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mbar_writeLong(MCFSIM_DACR0, 0x0000b324); /* Enable the refresh bit, DACR0[RE] (bit 15) */
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udelay(0x7d0); /* Allow gobs of refresh cycles */
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/** Mode Register initialization **/
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mbar_writeLong(MCFSIM_DACR0, 0x0000b364); /* Enable DACR0[IMRS] (bit 6); RE remains enabled */
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out_be32((void *)0x800, junk); /* Access RAM to initialize the mode register */
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return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
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};
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int testdram (void) {
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/* TODO: XXX XXX XXX */
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printf ("DRAM test not implemented!\n");
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return (0);
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}
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int misc_init_r (void)
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{
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unsigned char *dst;
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ulong len = sizeof(fpgadata);
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int status;
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int index;
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int i;
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uchar buf[8];
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dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
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if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
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printf ("GUNZIP ERROR - must RESET board to recover\n");
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do_reset (NULL, 0, 0, NULL);
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}
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status = fpga_boot(dst, len);
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if (status != 0) {
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printf("\nFPGA: Booting failed ");
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switch (status) {
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case ERROR_FPGA_PRG_INIT_LOW:
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printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
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break;
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case ERROR_FPGA_PRG_INIT_HIGH:
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printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
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break;
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case ERROR_FPGA_PRG_DONE:
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printf("(Timeout: DONE not high after programming FPGA)\n ");
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break;
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}
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/* display infos on fpgaimage */
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index = 15;
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for (i=0; i<4; i++) {
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len = dst[index];
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printf("FPGA: %s\n", &(dst[index+1]));
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index += len+3;
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}
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putc ('\n');
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/* delayed reboot */
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for (i=20; i>0; i--) {
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printf("Rebooting in %2d seconds \r",i);
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for (index=0;index<1000;index++)
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udelay(1000);
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}
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putc ('\n');
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do_reset(NULL, 0, 0, NULL);
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}
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puts("FPGA: ");
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/* display infos on fpgaimage */
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index = 15;
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for (i=0; i<4; i++) {
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len = dst[index];
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printf("%s ", &(dst[index+1]));
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index += len+3;
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}
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putc ('\n');
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free(dst);
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/*
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*
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*/
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buf[0] = 0x00;
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buf[1] = 0x32;
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buf[2] = 0x3f;
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i2c_write(0x38, 0, 0, buf, 3);
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return (0);
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}
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#if 1 /* test-only: board specific test commands */
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int i2c_probe(uchar addr);
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/*
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*/
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int do_iploop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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ulong addr;
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if (argc < 2) {
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puts("ERROR!\n");
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return -1;
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}
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addr = simple_strtol (argv[1], NULL, 16);
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printf("i2c probe looping on addr 0x%lx (cntrl-c aborts)...\n", addr);
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for (;;) {
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i2c_probe(addr);
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/* Abort if ctrl-c was pressed */
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if (ctrlc()) {
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puts("\nAbort\n");
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return 0;
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}
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udelay(1000);
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}
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return 0;
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}
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U_BOOT_CMD(
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iploop, 2, 1, do_iploop,
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"i2c probe loop <addr>",
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""
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);
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/*
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*/
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int do_codec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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uchar buf[8];
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out_be16((void *)0xe0000000, 0x4000);
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udelay(5000); /* wait for 5ms */
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buf[0] = 0x10;
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buf[1] = 0x07;
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buf[2] = 0x03;
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i2c_write(0x10, 0, 0, buf, 3);
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buf[0] = 0x10;
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buf[1] = 0x01;
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buf[2] = 0x80;
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i2c_write(0x10, 0, 0, buf, 3);
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buf[0] = 0x10;
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buf[1] = 0x02;
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buf[2] = 0x03;
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i2c_write(0x10, 0, 0, buf, 3);
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buf[0] = 0x10;
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buf[1] = 0x03;
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buf[2] = 0x29;
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i2c_write(0x10, 0, 0, buf, 3);
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buf[0] = 0x10;
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buf[1] = 0x04;
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buf[2] = 0x00;
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i2c_write(0x10, 0, 0, buf, 3);
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buf[0] = 0x10;
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buf[1] = 0x05;
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buf[2] = 0x00;
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i2c_write(0x10, 0, 0, buf, 3);
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buf[0] = 0x10;
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buf[1] = 0x07;
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buf[2] = 0x02;
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i2c_write(0x10, 0, 0, buf, 3);
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return 0;
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}
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U_BOOT_CMD(
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codec, 1, 1, do_codec,
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"Enable codec",
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|
""
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);
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/*
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*/
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int do_saa(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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ulong addr;
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|
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ulong instr;
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ulong cntrl;
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ulong data;
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uchar buf[8];
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if (argc < 5) {
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puts("ERROR!\n");
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return -1;
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|
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}
|
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addr = simple_strtol (argv[1], NULL, 16);
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instr = simple_strtol (argv[2], NULL, 16);
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cntrl = simple_strtol (argv[3], NULL, 16);
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data = simple_strtol (argv[4], NULL, 16);
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|
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buf[0] = (uchar)instr;
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|
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buf[1] = (uchar)cntrl;
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buf[2] = (uchar)data;
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|
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i2c_write(addr, 0, 0, buf, 3);
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|
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|
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return 0;
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|
|
}
|
|
|
|
U_BOOT_CMD(
|
|
|
|
saa, 5, 1, do_saa,
|
|
|
|
"Write to SAA1064 <addr> <instr> <cntrl> <data>",
|
|
|
|
""
|
|
|
|
);
|
|
|
|
|
|
|
|
/*
|
|
|
|
*/
|
|
|
|
int do_iwrite(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
|
|
|
|
{
|
|
|
|
ulong addr;
|
|
|
|
ulong data0;
|
|
|
|
ulong data1;
|
|
|
|
ulong data2;
|
|
|
|
ulong data3;
|
|
|
|
uchar buf[8];
|
|
|
|
int cnt;
|
|
|
|
|
|
|
|
if (argc < 3) {
|
|
|
|
puts("ERROR!\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
addr = simple_strtol (argv[1], NULL, 16);
|
|
|
|
cnt = simple_strtol (argv[2], NULL, 16);
|
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|
|
data0 = simple_strtol (argv[3], NULL, 16);
|
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|
|
data1 = simple_strtol (argv[4], NULL, 16);
|
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|
|
data2 = simple_strtol (argv[5], NULL, 16);
|
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|
|
data3 = simple_strtol (argv[6], NULL, 16);
|
|
|
|
|
|
|
|
printf("Writing %d bytes to device %lx!\n", cnt, addr);
|
|
|
|
buf[0] = (uchar)data0;
|
|
|
|
buf[1] = (uchar)data1;
|
|
|
|
buf[2] = (uchar)data2;
|
|
|
|
buf[3] = (uchar)data3;
|
|
|
|
i2c_write(addr, 0, 0, buf, cnt);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
U_BOOT_CMD(
|
|
|
|
iwrite, 6, 1, do_iwrite,
|
|
|
|
"Write n bytes to I2C-device",
|
|
|
|
"addr cnt data0 ... datan"
|
|
|
|
);
|
|
|
|
|
|
|
|
/*
|
|
|
|
*/
|
|
|
|
int do_iread(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
|
|
|
|
{
|
|
|
|
ulong addr;
|
|
|
|
ulong cnt;
|
|
|
|
uchar buf[32];
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (argc < 3) {
|
|
|
|
puts("ERROR!\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
addr = simple_strtol (argv[1], NULL, 16);
|
|
|
|
cnt = simple_strtol (argv[2], NULL, 16);
|
|
|
|
|
|
|
|
i2c_read(addr, 0, 0, buf, cnt);
|
|
|
|
printf("I2C Data:");
|
|
|
|
for (i=0; i<cnt; i++) {
|
|
|
|
printf(" %02X", buf[i]);
|
|
|
|
}
|
|
|
|
printf("\n");
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
U_BOOT_CMD(
|
|
|
|
iread, 3, 1, do_iread,
|
|
|
|
"Read from I2C <addr> <cnt>",
|
|
|
|
""
|
|
|
|
);
|
|
|
|
|
|
|
|
/*
|
|
|
|
*/
|
|
|
|
int do_ireadl(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
|
|
|
|
{
|
|
|
|
ulong addr;
|
|
|
|
uchar buf[32];
|
|
|
|
int cnt;
|
|
|
|
|
|
|
|
if (argc < 2) {
|
|
|
|
puts("ERROR!\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
addr = simple_strtol (argv[1], NULL, 16);
|
|
|
|
cnt = 1;
|
|
|
|
|
|
|
|
printf("iread looping on addr 0x%lx (cntrl-c aborts)...\n", addr);
|
|
|
|
|
|
|
|
for (;;) {
|
|
|
|
i2c_read(addr, 0, 0, buf, cnt);
|
|
|
|
|
|
|
|
/* Abort if ctrl-c was pressed */
|
|
|
|
if (ctrlc()) {
|
|
|
|
puts("\nAbort\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
udelay(3000);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
U_BOOT_CMD(
|
|
|
|
ireadl, 2, 1, do_ireadl,
|
|
|
|
"Read-loop from I2C <addr>",
|
|
|
|
""
|
|
|
|
);
|
|
|
|
#endif
|