upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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270 lines
6.1 KiB
270 lines
6.1 KiB
18 years ago
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/*
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* (C) Copyright 2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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/*
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* USB test
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*
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* The USB controller is tested in the local loopback mode.
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* It is configured so that endpoint 0 operates as host and endpoint 1
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* operates as function endpoint. After that an IN token transaction
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* is performed.
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* Refer to MPC850 User Manual, Section 32.11.1 USB Host Controller
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* Initialization Example.
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*/
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#ifdef CONFIG_POST
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#include <post.h>
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#if CONFIG_POST & CFG_POST_USB
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#include <commproc.h>
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#include <command.h>
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#define TOUT_LOOP 100
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#define PROFF_USB ((uint)0x0000)
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#define CPM_USB_EP0_BASE 0x0a00
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#define CPM_USB_EP1_BASE 0x0a20
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#define CPM_USB_DT0_BASE 0x0a80
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#define CPM_USB_DT1_BASE 0x0a90
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#define CPM_USB_DR0_BASE 0x0aa0
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#define CPM_USB_DR1_BASE 0x0ab0
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#define CPM_USB_RX0_BASE 0x0b00
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#define CPM_USB_RX1_BASE 0x0b08
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#define CPM_USB_TX0_BASE 0x0b20
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#define CPM_USB_TX1_BASE 0x0b28
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#define USB_EXPECT(x) if (!(x)) goto Done;
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typedef struct usb_param {
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ushort ep0ptr;
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ushort ep1ptr;
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ushort ep2ptr;
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ushort ep3ptr;
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uint rstate;
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uint rptr;
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ushort frame_n;
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ushort rbcnt;
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ushort rtemp;
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} usb_param_t;
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typedef struct usb_param_block {
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ushort rbase;
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ushort tbase;
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uchar rfcr;
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uchar tfcr;
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ushort mrblr;
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ushort rbptr;
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ushort tbptr;
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uint tstate;
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uint tptr;
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ushort tcrc;
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ushort tbcnt;
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uint res[2];
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} usb_param_block_t;
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typedef struct usb {
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uchar usmod;
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uchar usadr;
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uchar uscom;
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uchar res1;
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ushort usep[4];
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uchar res2[4];
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ushort usber;
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uchar res3[2];
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ushort usbmr;
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uchar res4;
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uchar usbs;
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uchar res5[8];
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} usb_t;
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int usb_post_test (int flags)
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{
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int res = -1;
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volatile immap_t *im = (immap_t *) CFG_IMMR;
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volatile cpm8xx_t *cp = &(im->im_cpm);
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volatile usb_param_t *pram_ptr;
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uint dpram;
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ushort DPRAM;
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volatile cbd_t *tx;
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volatile cbd_t *rx;
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volatile usb_t *usbr;
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volatile usb_param_block_t *ep0;
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volatile usb_param_block_t *ep1;
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int j;
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pram_ptr = (usb_param_t *) & (im->im_cpm.cp_dparam[PROFF_USB]);
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dpram = (uint) im->im_cpm.cp_dpmem;
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DPRAM = dpram;
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tx = (cbd_t *) (dpram + CPM_USB_TX0_BASE);
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rx = (cbd_t *) (dpram + CPM_USB_RX0_BASE);
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ep0 = (usb_param_block_t *) (dpram + CPM_USB_EP0_BASE);
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ep1 = (usb_param_block_t *) (dpram + CPM_USB_EP1_BASE);
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usbr = (usb_t *) & (im->im_cpm.cp_scc[0]);
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/* 01 */
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im->im_ioport.iop_padir &= ~(ushort) 0x0200;
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im->im_ioport.iop_papar |= (ushort) 0x0200;
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cp->cp_sicr &= ~0x000000FF;
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cp->cp_sicr |= 0x00000018;
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cp->cp_brgc4 = 0x00010001;
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/* 02 */
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im->im_ioport.iop_padir &= ~(ushort) 0x0002;
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im->im_ioport.iop_padir &= ~(ushort) 0x0001;
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im->im_ioport.iop_papar |= (ushort) 0x0002;
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im->im_ioport.iop_papar |= (ushort) 0x0001;
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/* 03 */
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im->im_ioport.iop_pcdir &= ~(ushort) 0x0020;
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im->im_ioport.iop_pcdir &= ~(ushort) 0x0010;
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im->im_ioport.iop_pcpar &= ~(ushort) 0x0020;
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im->im_ioport.iop_pcpar &= ~(ushort) 0x0010;
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im->im_ioport.iop_pcso |= (ushort) 0x0020;
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im->im_ioport.iop_pcso |= (ushort) 0x0010;
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/* 04 */
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im->im_ioport.iop_pcdir |= (ushort) 0x0200;
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im->im_ioport.iop_pcdir |= (ushort) 0x0100;
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im->im_ioport.iop_pcpar |= (ushort) 0x0200;
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im->im_ioport.iop_pcpar |= (ushort) 0x0100;
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/* 05 */
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pram_ptr->frame_n = 0;
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/* 06 */
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pram_ptr->ep0ptr = DPRAM + CPM_USB_EP0_BASE;
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pram_ptr->ep1ptr = DPRAM + CPM_USB_EP1_BASE;
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/* 07-10 */
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tx[0].cbd_sc = 0xB800;
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tx[0].cbd_datlen = 3;
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tx[0].cbd_bufaddr = dpram + CPM_USB_DT0_BASE;
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tx[1].cbd_sc = 0xBC80;
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tx[1].cbd_datlen = 3;
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tx[1].cbd_bufaddr = dpram + CPM_USB_DT1_BASE;
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rx[0].cbd_sc = 0xA000;
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rx[0].cbd_datlen = 0;
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rx[0].cbd_bufaddr = dpram + CPM_USB_DR0_BASE;
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rx[1].cbd_sc = 0xA000;
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rx[1].cbd_datlen = 0;
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rx[1].cbd_bufaddr = dpram + CPM_USB_DR1_BASE;
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/* 11-12 */
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*(volatile int *) (dpram + CPM_USB_DT0_BASE) = 0x69856000;
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*(volatile int *) (dpram + CPM_USB_DT1_BASE) = 0xABCD1234;
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*(volatile int *) (dpram + CPM_USB_DR0_BASE) = 0;
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*(volatile int *) (dpram + CPM_USB_DR1_BASE) = 0;
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/* 13-16 */
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ep0->rbase = DPRAM + CPM_USB_RX0_BASE;
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ep0->tbase = DPRAM + CPM_USB_TX0_BASE;
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ep0->rfcr = 0x18;
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ep0->tfcr = 0x18;
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ep0->mrblr = 0x100;
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ep0->rbptr = DPRAM + CPM_USB_RX0_BASE;
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ep0->tbptr = DPRAM + CPM_USB_TX0_BASE;
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ep0->tstate = 0;
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/* 17-20 */
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ep1->rbase = DPRAM + CPM_USB_RX1_BASE;
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ep1->tbase = DPRAM + CPM_USB_TX1_BASE;
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ep1->rfcr = 0x18;
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ep1->tfcr = 0x18;
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ep1->mrblr = 0x100;
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ep1->rbptr = DPRAM + CPM_USB_RX1_BASE;
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ep1->tbptr = DPRAM + CPM_USB_TX1_BASE;
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ep1->tstate = 0;
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/* 21-24 */
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usbr->usep[0] = 0x0000;
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usbr->usep[1] = 0x1100;
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usbr->usep[2] = 0x2200;
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usbr->usep[3] = 0x3300;
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/* 25 */
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usbr->usmod = 0x06;
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/* 26 */
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usbr->usadr = 0x05;
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/* 27 */
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usbr->uscom = 0;
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/* 28 */
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usbr->usmod |= 0x01;
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udelay (1);
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/* 29-30 */
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usbr->uscom = 0x80;
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usbr->uscom = 0x81;
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/* Wait for the data packet to be transmitted */
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for (j = 0; j < TOUT_LOOP; j++) {
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if (tx[1].cbd_sc & (ushort) 0x8000)
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udelay (1);
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else
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break;
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}
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USB_EXPECT (j < TOUT_LOOP);
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USB_EXPECT (tx[0].cbd_sc == 0x3800);
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USB_EXPECT (tx[0].cbd_datlen == 3);
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USB_EXPECT (tx[1].cbd_sc == 0x3C80);
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USB_EXPECT (tx[1].cbd_datlen == 3);
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USB_EXPECT (rx[0].cbd_sc == 0x2C00);
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USB_EXPECT (rx[0].cbd_datlen == 5);
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USB_EXPECT (*(volatile int *) (dpram + CPM_USB_DR0_BASE) ==
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0xABCD122B);
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USB_EXPECT (*(volatile char *) (dpram + CPM_USB_DR0_BASE + 4) == 0x42);
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res = 0;
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Done:
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return res;
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}
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#endif /* CONFIG_POST & CFG_POST_USB */
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#endif /* CONFIG_POST */
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