upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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52 lines
999 B
52 lines
999 B
10 years ago
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/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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* Layerscape PCIe driver
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/fsl_serdes.h>
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#include <pci.h>
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#include <asm/io.h>
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#include <asm/pcie_layerscape.h>
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#ifdef CONFIG_OF_BOARD_SETUP
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#include <libfdt.h>
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#include <fdt_support.h>
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static void ft_pcie_ls_setup(void *blob, const char *pci_compat,
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unsigned long ctrl_addr, enum srds_prtcl dev)
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{
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int off;
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off = fdt_node_offset_by_compat_reg(blob, pci_compat,
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(phys_addr_t)ctrl_addr);
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if (off < 0)
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return;
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if (!is_serdes_configured(dev))
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fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0);
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}
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void ft_pcie_setup(void *blob, bd_t *bd)
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{
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#ifdef CONFIG_PCIE1
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ft_pcie_ls_setup(blob, FSL_PCIE_COMPAT, CONFIG_SYS_PCIE1_ADDR, PCIE1);
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#endif
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#ifdef CONFIG_PCIE2
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ft_pcie_ls_setup(blob, FSL_PCIE_COMPAT, CONFIG_SYS_PCIE2_ADDR, PCIE2);
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#endif
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}
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#else
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void ft_pcie_setup(void *blob, bd_t *bd)
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{
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}
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#endif
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void pci_init_board(void)
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{
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}
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