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upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support
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u-boot/arch/x86/include/asm/arch-baytrail/acpi/irqroute.h

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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
7 years ago
/* SPDX-License-Identifier: GPL-2.0+ */
x86: baytrail: Add platform ASL files This adds basic BayTrail platform ASL files. They are intended to be included in dsdt.asl of any board that is based on this platform. Note: ACPI mode support for GPIO/LPSS/SCC/LPE are not supported for now. They will be added in the future. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
9 years ago
/*
* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
*/
#include <asm/arch/device.h>
#define PCI_DEV_PIRQ_ROUTES \
PCI_DEV_PIRQ_ROUTE(GFX_DEV, A, A, A, A), \
PCI_DEV_PIRQ_ROUTE(EMMC_DEV, A, A, A, A), \
PCI_DEV_PIRQ_ROUTE(SDIO_DEV, A, A, A, A), \
PCI_DEV_PIRQ_ROUTE(SD_DEV, A, A, A, A), \
PCI_DEV_PIRQ_ROUTE(SATA_DEV, A, A, A, A), \
PCI_DEV_PIRQ_ROUTE(XHCI_DEV, A, A, A, A), \
PCI_DEV_PIRQ_ROUTE(LPE_DEV, A, A, A, A), \
PCI_DEV_PIRQ_ROUTE(MMC45_DEV, A, A, A, A), \
PCI_DEV_PIRQ_ROUTE(SIO1_DEV, A, B, C, D), \
PCI_DEV_PIRQ_ROUTE(TXE_DEV, A, A, A, A), \
PCI_DEV_PIRQ_ROUTE(HDA_DEV, A, A, A, A), \
PCI_DEV_PIRQ_ROUTE(PCIE_DEV, A, B, C, D), \
PCI_DEV_PIRQ_ROUTE(EHCI_DEV, A, A, A, A), \
PCI_DEV_PIRQ_ROUTE(SIO2_DEV, A, B, C, D), \
PCI_DEV_PIRQ_ROUTE(PCU_DEV, A, B, C, D)
#define PCIE_BRIDGE_IRQ_ROUTES \
PCIE_BRIDGE_DEV(RP, PCIE_DEV, A, B, C, D)