upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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147 lines
2.9 KiB
147 lines
2.9 KiB
10 years ago
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/*
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* Copyright 2015 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <fsl_sec_mon.h>
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int change_sec_mon_state(u32 initial_state, u32 final_state)
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{
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struct ccsr_sec_mon_regs *sec_mon_regs = (void *)
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(CONFIG_SYS_SEC_MON_ADDR);
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u32 sts = sec_mon_in32(&sec_mon_regs->hp_stat);
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int timeout = 10;
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if ((sts & HPSR_SSM_ST_MASK) != initial_state)
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return -1;
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if (initial_state == HPSR_SSM_ST_TRUST) {
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switch (final_state) {
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case HPSR_SSM_ST_NON_SECURE:
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printf("SEC_MON state transitioning to Soft Fail.\n");
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sec_mon_setbits32(&sec_mon_regs->hp_com, HPCOMR_SW_SV);
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/*
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* poll till SEC_MON is in
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* Soft Fail state
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*/
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while (((sts & HPSR_SSM_ST_MASK) !=
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HPSR_SSM_ST_SOFT_FAIL)) {
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while (timeout) {
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sts = sec_mon_in32
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(&sec_mon_regs->hp_stat);
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if ((sts & HPSR_SSM_ST_MASK) ==
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HPSR_SSM_ST_SOFT_FAIL)
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break;
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udelay(10);
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timeout--;
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}
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}
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if (timeout == 0) {
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printf("SEC_MON state transition timeout.\n");
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return -1;
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}
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timeout = 10;
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printf("SEC_MON state transitioning to Non Secure.\n");
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sec_mon_setbits32(&sec_mon_regs->hp_com, HPCOMR_SSM_ST);
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/*
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* poll till SEC_MON is in
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* Non Secure state
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*/
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while (((sts & HPSR_SSM_ST_MASK) !=
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HPSR_SSM_ST_NON_SECURE)) {
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while (timeout) {
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sts = sec_mon_in32
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(&sec_mon_regs->hp_stat);
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if ((sts & HPSR_SSM_ST_MASK) ==
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HPSR_SSM_ST_NON_SECURE)
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break;
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udelay(10);
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timeout--;
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}
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}
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if (timeout == 0) {
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printf("SEC_MON state transition timeout.\n");
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return -1;
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}
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break;
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case HPSR_SSM_ST_SOFT_FAIL:
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printf("SEC_MON state transitioning to Soft Fail.\n");
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sec_mon_setbits32(&sec_mon_regs->hp_com, HPCOMR_SW_FSV);
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/*
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* polling loop till SEC_MON is in
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* Soft Fail state
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*/
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while (((sts & HPSR_SSM_ST_MASK) !=
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HPSR_SSM_ST_SOFT_FAIL)) {
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while (timeout) {
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sts = sec_mon_in32
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(&sec_mon_regs->hp_stat);
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if ((sts & HPSR_SSM_ST_MASK) ==
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HPSR_SSM_ST_SOFT_FAIL)
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break;
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udelay(10);
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timeout--;
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}
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}
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if (timeout == 0) {
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printf("SEC_MON state transition timeout.\n");
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return -1;
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}
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break;
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default:
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return -1;
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}
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} else if (initial_state == HPSR_SSM_ST_NON_SECURE) {
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switch (final_state) {
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case HPSR_SSM_ST_SOFT_FAIL:
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printf("SEC_MON state transitioning to Soft Fail.\n");
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sec_mon_setbits32(&sec_mon_regs->hp_com, HPCOMR_SW_FSV);
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/*
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* polling loop till SEC_MON is in
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* Soft Fail state
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*/
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while (((sts & HPSR_SSM_ST_MASK) !=
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HPSR_SSM_ST_SOFT_FAIL)) {
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while (timeout) {
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sts = sec_mon_in32
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(&sec_mon_regs->hp_stat);
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if ((sts & HPSR_SSM_ST_MASK) ==
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HPSR_SSM_ST_SOFT_FAIL)
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break;
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udelay(10);
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timeout--;
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}
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}
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if (timeout == 0) {
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printf("SEC_MON state transition timeout.\n");
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return -1;
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}
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break;
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default:
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return -1;
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}
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}
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return 0;
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}
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