upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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96 lines
2.0 KiB
96 lines
2.0 KiB
23 years ago
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/*
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* Memory Setup stuff - taken from ???
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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#include <version.h>
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/* some parameters for the board */
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SYSCON1: .long 0x80000100
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SYSCON2: .long 0x80001100
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SYSCON3: .long 0x80002200
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MEMCFG1: .long 0x80000180
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MEMCFG2: .long 0x800001C0
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SDCONF: .long 0x80002300
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SDRFPR: .long 0x80002340
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syscon1_val: .long 0x00040100
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syscon2_val: .long 0x00000102
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syscon3_val: .long 0x0000020E
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memcfg1_val: .long 0x1f101710
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memcfg2_mask: .long 0x0000ffff @ only set lower 16 bits
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memcfg2_val: .long 0x00001f13 @ upper 16 bits are reserved for CS7 + CS6
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sdrfpr_val: .long 0x00000240
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sdconf_val: .long 0x00000522
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/* setting up the memory */
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.globl memsetup
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memsetup:
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/*
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* SYSCON1-3
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*/
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ldr r0, SYSCON1
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ldr r1, syscon1_val
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str r1, [r0]
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ldr r0, SYSCON2
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ldr r1, syscon2_val
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str r1, [r0]
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ldr r0, SYSCON3
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ldr r1, syscon3_val
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str r1, [r0]
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/*
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* MEMCFG1
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*/
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ldr r0, MEMCFG1
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ldr r1, memcfg1_val
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str r1, [r0]
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/*
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* MEMCFG2
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*/
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ldr r0, MEMCFG2
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ldr r2, [r0]
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ldr r1, memcfg2_mask
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bic r2, r2, r1
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ldr r1, memcfg2_val
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orr r2, r2, r1
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str r2, [r0]
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/*
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* SDRFPR,SDCONF
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*/
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ldr r0, SDCONF
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ldr r1, sdconf_val
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str r1, [r0]
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ldr r0, SDRFPR
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ldr r1, sdrfpr_val
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str r1, [r0]
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/* everything is fine now */
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mov pc, lr
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