upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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484 lines
12 KiB
484 lines
12 KiB
22 years ago
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/*
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* (C) Copyright 2003
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* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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#include <common.h>
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#include <mmc.h>
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#include <asm/errno.h>
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#include <asm/arch/hardware.h>
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#ifdef CONFIG_MMC
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extern int
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fat_register_read(int(*block_read)(int device, ulong blknr, ulong blkcnt, uchar *buffer));
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/*
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* FIXME needs to read cid and csd info to determine block size
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* and other parameters
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*/
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static uchar mmc_buf[MMC_BLOCK_SIZE];
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static mmc_csd_t mmc_csd;
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static int mmc_ready = 0;
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static uchar *
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/****************************************************/
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mmc_cmd(ushort cmd, ushort argh, ushort argl, ushort cmdat)
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/****************************************************/
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{
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static uchar resp[20];
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ulong status;
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int words, i;
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debug("mmc_cmd %x %x %x %x\n", cmd, argh, argl, cmdat);
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MMC_STRPCL = MMC_STRPCL_STOP_CLK;
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MMC_I_MASK = ~MMC_I_MASK_CLK_IS_OFF;
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while (!(MMC_I_REG & MMC_I_REG_CLK_IS_OFF));
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MMC_CMD = cmd;
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MMC_ARGH = argh;
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MMC_ARGL = argl;
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MMC_CMDAT = cmdat;
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MMC_I_MASK = ~MMC_I_MASK_END_CMD_RES;
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MMC_STRPCL = MMC_STRPCL_START_CLK;
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while (!(MMC_I_REG & MMC_I_REG_END_CMD_RES));
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status = MMC_STAT;
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debug("MMC status %x\n", status);
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if (status & MMC_STAT_TIME_OUT_RESPONSE)
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{
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return 0;
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}
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switch (cmdat & 0x3)
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{
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case MMC_CMDAT_R1:
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case MMC_CMDAT_R3:
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words = 3;
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break;
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case MMC_CMDAT_R2:
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words = 8;
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break;
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default:
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return 0;
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}
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for (i = words-1; i >= 0; i--)
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{
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ulong res_fifo = MMC_RES;
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int offset = i << 1;
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resp[offset] = ((uchar *)&res_fifo)[0];
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resp[offset+1] = ((uchar *)&res_fifo)[1];
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}
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#ifdef MMC_DEBUG
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for (i=0; i<words*2; i += 2)
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{
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printf("MMC resp[%d] = %02x\n", i, resp[i]);
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printf("MMC resp[%d] = %02x\n", i+1, resp[i+1]);
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}
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#endif
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return resp;
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}
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int
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/****************************************************/
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mmc_block_read(uchar *dst, ulong src, ulong len)
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/****************************************************/
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{
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uchar *resp;
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ushort argh, argl;
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ulong status;
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if (len == 0)
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{
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return 0;
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}
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debug("mmc_block_rd dst %lx src %lx len %d\n", (ulong)dst, src, len);
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argh = len >> 16;
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argl = len & 0xffff;
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/* set block len */
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resp = mmc_cmd(MMC_CMD_SET_BLOCKLEN, argh, argl, MMC_CMDAT_R1);
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/* send read command */
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argh = src >> 16;
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argl = src & 0xffff;
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MMC_STRPCL = MMC_STRPCL_STOP_CLK;
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MMC_RDTO = 0xffff;
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MMC_NOB = 1;
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MMC_BLKLEN = len;
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resp = mmc_cmd(MMC_CMD_READ_BLOCK, argh, argl,
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MMC_CMDAT_R1|MMC_CMDAT_READ|MMC_CMDAT_BLOCK|MMC_CMDAT_DATA_EN);
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MMC_I_MASK = ~MMC_I_MASK_RXFIFO_RD_REQ;
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while (len)
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{
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if (MMC_I_REG & MMC_I_REG_RXFIFO_RD_REQ)
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{
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*dst++ = MMC_RXFIFO;
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len--;
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}
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status = MMC_STAT;
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if (status & MMC_STAT_ERRORS)
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{
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printf("MMC_STAT error %lx\n", status);
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return -1;
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}
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}
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MMC_I_MASK = ~MMC_I_MASK_DATA_TRAN_DONE;
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while (!(MMC_I_REG & MMC_I_REG_DATA_TRAN_DONE));
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status = MMC_STAT;
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if (status & MMC_STAT_ERRORS)
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{
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printf("MMC_STAT error %lx\n", status);
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return -1;
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}
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return 0;
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}
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int
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/****************************************************/
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mmc_block_write(ulong dst, uchar *src, int len)
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/****************************************************/
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{
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uchar *resp;
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ushort argh, argl;
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ulong status;
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if (len == 0)
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{
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return 0;
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}
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debug("mmc_block_wr dst %lx src %lx len %d\n", dst, (ulong)src, len);
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argh = len >> 16;
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argl = len & 0xffff;
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/* set block len */
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resp = mmc_cmd(MMC_CMD_SET_BLOCKLEN, argh, argl, MMC_CMDAT_R1);
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/* send write command */
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argh = dst >> 16;
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argl = dst & 0xffff;
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MMC_STRPCL = MMC_STRPCL_STOP_CLK;
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MMC_NOB = 1;
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MMC_BLKLEN = len;
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resp = mmc_cmd(MMC_CMD_WRITE_BLOCK, argh, argl,
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MMC_CMDAT_R1|MMC_CMDAT_WRITE|MMC_CMDAT_BLOCK|MMC_CMDAT_DATA_EN);
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MMC_I_MASK = ~MMC_I_MASK_TXFIFO_WR_REQ;
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while (len)
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{
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if (MMC_I_REG & MMC_I_REG_TXFIFO_WR_REQ)
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{
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int i, bytes = min(32,len);
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for (i=0; i<bytes; i++)
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{
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MMC_TXFIFO = *src++;
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}
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if (bytes < 32)
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{
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MMC_PRTBUF = MMC_PRTBUF_BUF_PART_FULL;
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}
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len -= bytes;
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}
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status = MMC_STAT;
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if (status & MMC_STAT_ERRORS)
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{
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printf("MMC_STAT error %lx\n", status);
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return -1;
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}
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}
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MMC_I_MASK = ~MMC_I_MASK_DATA_TRAN_DONE;
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while (!(MMC_I_REG & MMC_I_REG_DATA_TRAN_DONE));
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MMC_I_MASK = ~MMC_I_MASK_PRG_DONE;
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while (!(MMC_I_REG & MMC_I_REG_PRG_DONE));
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status = MMC_STAT;
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if (status & MMC_STAT_ERRORS)
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{
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printf("MMC_STAT error %lx\n", status);
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return -1;
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}
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return 0;
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}
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int
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/****************************************************/
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mmc_read(ulong src, uchar *dst, int size)
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/****************************************************/
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{
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ulong end, part_start, part_end, part_len, aligned_start, aligned_end;
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ulong mmc_block_size, mmc_block_address;
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if (size == 0)
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{
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return 0;
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}
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if (!mmc_ready)
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{
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printf("Please initial the MMC first\n");
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return -1;
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}
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mmc_block_size = MMC_BLOCK_SIZE;
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mmc_block_address = ~(mmc_block_size - 1);
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src -= CFG_MMC_BASE;
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end = src + size;
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part_start = ~mmc_block_address & src;
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part_end = ~mmc_block_address & end;
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aligned_start = mmc_block_address & src;
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aligned_end = mmc_block_address & end;
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/* all block aligned accesses */
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debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
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src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
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if (part_start)
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{
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part_len = mmc_block_size - part_start;
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debug("ps src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
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src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
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if ((mmc_block_read(mmc_buf, aligned_start, mmc_block_size)) < 0)
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{
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return -1;
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}
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memcpy(dst, mmc_buf+part_start, part_len);
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dst += part_len;
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src += part_len;
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}
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debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
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src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
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for (; src < aligned_end; src += mmc_block_size, dst += mmc_block_size)
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{
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debug("al src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
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src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
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if ((mmc_block_read((uchar *)(dst), src, mmc_block_size)) < 0)
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{
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return -1;
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}
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}
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debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
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src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
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if (part_end && src < end)
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{
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debug("pe src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
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src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
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if ((mmc_block_read(mmc_buf, aligned_end, mmc_block_size)) < 0)
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{
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return -1;
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}
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memcpy(dst, mmc_buf, part_end);
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}
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return 0;
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}
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int
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/****************************************************/
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mmc_write(uchar *src, ulong dst, int size)
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/****************************************************/
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{
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ulong end, part_start, part_end, part_len, aligned_start, aligned_end;
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ulong mmc_block_size, mmc_block_address;
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if (size == 0)
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{
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return 0;
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}
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if (!mmc_ready)
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{
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printf("Please initial the MMC first\n");
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return -1;
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}
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mmc_block_size = MMC_BLOCK_SIZE;
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mmc_block_address = ~(mmc_block_size - 1);
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dst -= CFG_MMC_BASE;
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end = dst + size;
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part_start = ~mmc_block_address & dst;
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part_end = ~mmc_block_address & end;
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aligned_start = mmc_block_address & dst;
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aligned_end = mmc_block_address & end;
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/* all block aligned accesses */
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debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
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src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
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if (part_start)
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{
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part_len = mmc_block_size - part_start;
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debug("ps src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
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(ulong)src, dst, end, part_start, part_end, aligned_start, aligned_end);
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if ((mmc_block_read(mmc_buf, aligned_start, mmc_block_size)) < 0)
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{
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return -1;
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}
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memcpy(mmc_buf+part_start, src, part_len);
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if ((mmc_block_write(aligned_start, mmc_buf, mmc_block_size)) < 0)
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{
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return -1;
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}
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dst += part_len;
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src += part_len;
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}
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debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
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src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
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for (; dst < aligned_end; src += mmc_block_size, dst += mmc_block_size)
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{
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debug("al src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
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src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
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if ((mmc_block_write(dst, (uchar *)src, mmc_block_size)) < 0)
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{
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return -1;
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}
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}
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debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
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src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
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if (part_end && dst < end)
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{
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debug("pe src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
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src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
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if ((mmc_block_read(mmc_buf, aligned_end, mmc_block_size)) < 0)
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{
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return -1;
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}
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memcpy(mmc_buf, src, part_end);
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if ((mmc_block_write(aligned_end, mmc_buf, mmc_block_size)) < 0)
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{
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return -1;
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}
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}
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return 0;
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}
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int
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/****************************************************/
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mmc_bread(int dev_num, ulong blknr, ulong blkcnt, uchar *dst)
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/****************************************************/
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{
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int mmc_block_size = MMC_BLOCK_SIZE;
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ulong src = blknr * mmc_block_size + CFG_MMC_BASE;
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mmc_read(src, (uchar *)dst, blkcnt*mmc_block_size);
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return blkcnt;
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}
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int
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/****************************************************/
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||
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mmc_init(int verbose)
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/****************************************************/
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||
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{
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int retries, rc = -ENODEV;
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uchar *resp;
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|
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#ifdef CONFIG_LUBBOCK
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set_GPIO_mode( GPIO6_MMCCLK_MD );
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set_GPIO_mode( GPIO8_MMCCS0_MD );
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#endif
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CKEN |= CKEN12_MMC; /* enable MMC unit clock */
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mmc_csd.c_size = 0;
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MMC_CLKRT = MMC_CLKRT_0_3125MHZ;
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||
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MMC_RESTO = MMC_RES_TO_MAX;
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||
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MMC_SPI = MMC_SPI_DISABLE;
|
||
|
|
||
|
/* reset */
|
||
|
retries = 10;
|
||
|
resp = mmc_cmd(0, 0, 0, 0);
|
||
|
resp = mmc_cmd(1, 0x00ff, 0xc000, MMC_CMDAT_INIT|MMC_CMDAT_BUSY|MMC_CMDAT_R3);
|
||
|
while (retries-- && resp && !(resp[4] & 0x80))
|
||
|
{
|
||
|
debug("resp %x %x\n", resp[0], resp[1]);
|
||
|
udelay(50);
|
||
|
resp = mmc_cmd(1, 0x00ff, 0xff00, MMC_CMDAT_BUSY|MMC_CMDAT_R3);
|
||
|
}
|
||
|
|
||
|
/* try to get card id */
|
||
|
resp = mmc_cmd(2, 0, 0, MMC_CMDAT_R2);
|
||
|
if (resp)
|
||
|
{
|
||
|
/* TODO configure mmc driver depending on card attributes */
|
||
|
mmc_cid_t *cid = (mmc_cid_t *)resp;
|
||
|
if (verbose)
|
||
|
{
|
||
|
printf("MMC found. Card desciption is:\n");
|
||
|
printf("Manufacturer ID = %02x%02x%02x\n",
|
||
|
cid->id[0], cid->id[1], cid->id[2]);
|
||
|
printf("HW/FW Revision = %x %x\n",cid->hwrev, cid->fwrev);
|
||
|
cid->hwrev = cid->fwrev = 0; /* null terminate string */
|
||
|
printf("Product Name = %s\n",cid->name);
|
||
|
printf("Serial Number = %02x%02x%02x\n",
|
||
|
cid->sn[0], cid->sn[1], cid->sn[2]);
|
||
|
printf("Month = %d\n",cid->month);
|
||
|
printf("Year = %d\n",1997 + cid->year);
|
||
|
}
|
||
|
|
||
|
/* MMC exists, get CSD too */
|
||
|
resp = mmc_cmd(MMC_CMD_SET_RCA, MMC_DEFAULT_RCA, 0, MMC_CMDAT_R1);
|
||
|
resp = mmc_cmd(MMC_CMD_SEND_CSD, MMC_DEFAULT_RCA, 0, MMC_CMDAT_R2);
|
||
|
if (resp)
|
||
|
{
|
||
|
mmc_csd_t *csd = (mmc_csd_t *)resp;
|
||
|
memcpy(&mmc_csd, csd, sizeof(csd));
|
||
|
rc = 0;
|
||
|
mmc_ready = 1;
|
||
|
/* FIXME add verbose printout for csd */
|
||
|
}
|
||
|
}
|
||
|
|
||
|
MMC_CLKRT = 0; /* 20 MHz */
|
||
|
resp = mmc_cmd(7, MMC_DEFAULT_RCA, 0, MMC_CMDAT_R1);
|
||
|
|
||
|
fat_register_read(mmc_bread);
|
||
|
|
||
|
return rc;
|
||
|
}
|
||
|
|
||
|
int
|
||
|
mmc_ident(block_dev_desc_t *dev)
|
||
|
{
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
int
|
||
|
mmc2info(ulong addr)
|
||
|
{
|
||
|
/* FIXME hard codes to 32 MB device */
|
||
|
if (addr >= CFG_MMC_BASE && addr < CFG_MMC_BASE + 0x02000000)
|
||
|
{
|
||
|
return 1;
|
||
|
}
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
#endif
|