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/*
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* (C) Copyright 2002
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* Daniel Engstr<EFBFBD>m, Omicron Ceti AB <daniel@omicron.se>.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/* stuff specific for the sc520, but independent of implementation */
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#include <common.h>
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#include <asm/io.h>
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#include <asm/ic/ssi.h>
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#include <asm/ic/sc520.h>
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int ssi_set_interface(int freq, int lsb_first, int inv_clock, int inv_phase)
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{
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u8 temp=0;
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if (freq >= 8192) {
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temp |= CTL_CLK_SEL_4;
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} else if (freq >= 4096) {
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temp |= CTL_CLK_SEL_8;
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} else if (freq >= 2048) {
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temp |= CTL_CLK_SEL_16;
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} else if (freq >= 1024) {
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temp |= CTL_CLK_SEL_32;
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} else if (freq >= 512) {
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temp |= CTL_CLK_SEL_64;
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} else if (freq >= 256) {
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temp |= CTL_CLK_SEL_128;
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} else if (freq >= 128) {
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temp |= CTL_CLK_SEL_256;
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} else {
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temp |= CTL_CLK_SEL_512;
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}
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if (!lsb_first) {
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temp |= MSBF_ENB;
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}
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if (inv_clock) {
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temp |= CLK_INV_ENB;
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}
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if (inv_phase) {
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temp |= PHS_INV_ENB;
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}
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writeb(temp, &sc520_mmcr->ssictl);
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return 0;
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}
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u8 ssi_txrx_byte(u8 data)
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{
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writeb(data, &sc520_mmcr->ssixmit);
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while (readb(&sc520_mmcr->ssista) & SSISTA_BSY);
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writeb(SSICMD_CMD_SEL_XMITRCV, &sc520_mmcr->ssicmd);
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while (readb(&sc520_mmcr->ssista) & SSISTA_BSY);
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return readb(&sc520_mmcr->ssircv);
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}
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void ssi_tx_byte(u8 data)
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{
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writeb(data, &sc520_mmcr->ssixmit);
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while (readb(&sc520_mmcr->ssista) & SSISTA_BSY);
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writeb(SSICMD_CMD_SEL_XMIT, &sc520_mmcr->ssicmd);
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}
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u8 ssi_rx_byte(void)
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{
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while (readb(&sc520_mmcr->ssista) & SSISTA_BSY);
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writeb(SSICMD_CMD_SEL_RCV, &sc520_mmcr->ssicmd);
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while (readb(&sc520_mmcr->ssista) & SSISTA_BSY);
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return readb(&sc520_mmcr->ssircv);
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}
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