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/*
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* Copyright 2007 Freescale Semiconductor, Inc.
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* York Sun <yorksun@freescale.com>
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*
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* FSL DIU Framebuffer driver
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <i2c.h>
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#include <malloc.h>
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#include "fsl_diu_fb.h"
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#ifdef DEBUG
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#define DPRINTF(fmt, args...) printf("%s: " fmt,__FUNCTION__,## args)
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#else
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#define DPRINTF(fmt, args...)
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#endif
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struct fb_videomode {
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const char *name; /* optional */
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unsigned int refresh; /* optional */
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unsigned int xres;
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unsigned int yres;
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unsigned int pixclock;
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unsigned int left_margin;
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unsigned int right_margin;
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unsigned int upper_margin;
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unsigned int lower_margin;
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unsigned int hsync_len;
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unsigned int vsync_len;
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unsigned int sync;
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unsigned int vmode;
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unsigned int flag;
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};
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#define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */
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#define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */
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#define FB_VMODE_NONINTERLACED 0 /* non interlaced */
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/*
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* These parameters give default parameters
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* for video output 1024x768,
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* FIXME - change timing to proper amounts
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* hsync 31.5kHz, vsync 60Hz
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*/
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static struct fb_videomode fsl_diu_mode_1024 = {
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.refresh = 60,
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.xres = 1024,
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.yres = 768,
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.pixclock = 15385,
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.left_margin = 160,
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.right_margin = 24,
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.upper_margin = 29,
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.lower_margin = 3,
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.hsync_len = 136,
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.vsync_len = 6,
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.sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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.vmode = FB_VMODE_NONINTERLACED
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};
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static struct fb_videomode fsl_diu_mode_1280 = {
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.name = "1280x1024-60",
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.refresh = 60,
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.xres = 1280,
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.yres = 1024,
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.pixclock = 9375,
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.left_margin = 38,
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.right_margin = 128,
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.upper_margin = 2,
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.lower_margin = 7,
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.hsync_len = 216,
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.vsync_len = 37,
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.sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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.vmode = FB_VMODE_NONINTERLACED
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};
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/*
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* These are the fields of area descriptor(in DDR memory) for every plane
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*/
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struct diu_ad {
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/* Word 0(32-bit) in DDR memory */
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unsigned int pix_fmt; /* hard coding pixel format */
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/* Word 1(32-bit) in DDR memory */
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unsigned int addr;
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/* Word 2(32-bit) in DDR memory */
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unsigned int src_size_g_alpha;
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/* Word 3(32-bit) in DDR memory */
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unsigned int aoi_size;
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/* Word 4(32-bit) in DDR memory */
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unsigned int offset_xyi;
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/* Word 5(32-bit) in DDR memory */
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unsigned int offset_xyd;
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/* Word 6(32-bit) in DDR memory */
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unsigned int ckmax_r:8;
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unsigned int ckmax_g:8;
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unsigned int ckmax_b:8;
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unsigned int res9:8;
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/* Word 7(32-bit) in DDR memory */
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unsigned int ckmin_r:8;
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unsigned int ckmin_g:8;
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unsigned int ckmin_b:8;
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unsigned int res10:8;
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/* Word 8(32-bit) in DDR memory */
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unsigned int next_ad;
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/* Word 9(32-bit) in DDR memory, just for 64-bit aligned */
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unsigned int res1;
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unsigned int res2;
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unsigned int res3;
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}__attribute__ ((packed));
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/*
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* DIU register map
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*/
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struct diu {
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unsigned int desc[3];
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unsigned int gamma;
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unsigned int pallete;
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unsigned int cursor;
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unsigned int curs_pos;
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unsigned int diu_mode;
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unsigned int bgnd;
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unsigned int bgnd_wb;
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unsigned int disp_size;
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unsigned int wb_size;
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unsigned int wb_mem_addr;
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unsigned int hsyn_para;
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unsigned int vsyn_para;
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unsigned int syn_pol;
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unsigned int thresholds;
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unsigned int int_status;
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unsigned int int_mask;
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unsigned int colorbar[8];
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unsigned int filling;
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unsigned int plut;
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} __attribute__ ((packed));
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struct diu_hw {
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struct diu *diu_reg;
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volatile unsigned int mode; /* DIU operation mode */
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};
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struct diu_addr {
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unsigned char * paddr; /* Virtual address */
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unsigned int offset;
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};
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#define FSL_DIU_BASE_OFFSET 0x2C000 /* Offset of Display Interface Unit */
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/*
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* Modes of operation of DIU
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*/
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#define MFB_MODE0 0 /* DIU off */
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#define MFB_MODE1 1 /* All three planes output to display */
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#define MFB_MODE2 2 /* Plane 1 to display,
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* planes 2+3 written back to memory */
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#define MFB_MODE3 3 /* All three planes written back to memory */
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#define MFB_MODE4 4 /* Color bar generation */
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#define MAX_CURS 32
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static struct fb_info fsl_fb_info;
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static struct diu_addr gamma, cursor;
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static struct diu_ad fsl_diu_fb_ad __attribute__ ((aligned(32)));
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static struct diu_ad dummy_ad __attribute__ ((aligned(32)));
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static unsigned char *dummy_fb;
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static struct diu_hw dr = {
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.mode = MFB_MODE1,
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};
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int fb_enabled = 0;
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int fb_initialized = 0;
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const int default_xres = 1280;
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const int default_pixel_format = 0x88882317;
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static int map_video_memory(struct fb_info *info, unsigned long bytes_align);
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static void enable_lcdc(void);
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static void disable_lcdc(void);
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static int fsl_diu_enable_panel(struct fb_info *info);
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static int fsl_diu_disable_panel(struct fb_info *info);
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static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align);
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static u32 get_busfreq(void);
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int fsl_diu_init(int xres,
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unsigned int pixel_format,
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int gamma_fix,
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unsigned char *splash_bmp)
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{
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struct fb_videomode *fsl_diu_mode_db;
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struct diu_ad *ad = &fsl_diu_fb_ad;
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struct diu *hw;
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struct fb_info *info = &fsl_fb_info;
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struct fb_var_screeninfo *var = &info->var;
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volatile immap_t *immap = (immap_t *)CFG_IMMR;
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volatile ccsr_gur_t *gur = &immap->im_gur;
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volatile unsigned int *guts_clkdvdr = &gur->clkdvdr;
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unsigned char *gamma_table_base;
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unsigned int i, j;
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unsigned long speed_ccb, temp, pixval;
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DPRINTF("Enter fsl_diu_init\n");
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dr.diu_reg = (struct diu *) (CFG_IMMR + FSL_DIU_BASE_OFFSET);
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hw = (struct diu *) dr.diu_reg;
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disable_lcdc();
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if (xres == 1280) {
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fsl_diu_mode_db = &fsl_diu_mode_1280;
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} else {
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fsl_diu_mode_db = &fsl_diu_mode_1024;
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}
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if (0 == fb_initialized) {
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allocate_buf(&gamma, 768, 32);
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DPRINTF("gamma is allocated @ 0x%x\n",
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(unsigned int)gamma.paddr);
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allocate_buf(&cursor, MAX_CURS * MAX_CURS * 2, 32);
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DPRINTF("curosr is allocated @ 0x%x\n",
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(unsigned int)cursor.paddr);
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/* create a dummy fb and dummy ad */
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dummy_fb = malloc(64);
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if (NULL == dummy_fb) {
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printf("Cannot allocate dummy fb\n");
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return -1;
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}
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dummy_ad.addr = cpu_to_le32((unsigned int)dummy_fb);
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dummy_ad.pix_fmt = 0x88882317;
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dummy_ad.src_size_g_alpha = 0x04400000; /* alpha = 0 */
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dummy_ad.aoi_size = 0x02000400;
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dummy_ad.offset_xyi = 0;
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dummy_ad.offset_xyd = 0;
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dummy_ad.next_ad = 0;
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/* Memory allocation for framebuffer */
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if (map_video_memory(info, 32)) {
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printf("Unable to allocate fb memory 1\n");
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return -1;
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}
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} else {
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memset(info->screen_base, 0, info->smem_len);
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}
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dr.diu_reg->desc[0] = (unsigned int) &dummy_ad;
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dr.diu_reg->desc[1] = (unsigned int) &dummy_ad;
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dr.diu_reg->desc[2] = (unsigned int) &dummy_ad;
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DPRINTF("dummy dr.diu_reg->desc[0] = 0x%x\n", dr.diu_reg->desc[0]);
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DPRINTF("dummy desc[0] = 0x%x\n", hw->desc[0]);
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/* read mode info */
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var->xres = fsl_diu_mode_db->xres;
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var->yres = fsl_diu_mode_db->yres;
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var->bits_per_pixel = 32;
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var->pixclock = fsl_diu_mode_db->pixclock;
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var->left_margin = fsl_diu_mode_db->left_margin;
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var->right_margin = fsl_diu_mode_db->right_margin;
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var->upper_margin = fsl_diu_mode_db->upper_margin;
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var->lower_margin = fsl_diu_mode_db->lower_margin;
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var->hsync_len = fsl_diu_mode_db->hsync_len;
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var->vsync_len = fsl_diu_mode_db->vsync_len;
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var->sync = fsl_diu_mode_db->sync;
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var->vmode = fsl_diu_mode_db->vmode;
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info->line_length = var->xres * var->bits_per_pixel / 8;
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info->logo_size = 0;
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info->logo_height = 0;
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ad->pix_fmt = pixel_format;
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ad->addr = cpu_to_le32((unsigned int)info->screen_base);
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ad->src_size_g_alpha
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= cpu_to_le32((var->yres << 12) | var->xres);
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/* fix me. AOI should not be greater than display size */
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ad->aoi_size = cpu_to_le32(( var->yres << 16) | var->xres);
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ad->offset_xyi = 0;
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ad->offset_xyd = 0;
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/* Disable chroma keying function */
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ad->ckmax_r = 0;
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ad->ckmax_g = 0;
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ad->ckmax_b = 0;
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ad->ckmin_r = 255;
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ad->ckmin_g = 255;
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ad->ckmin_b = 255;
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gamma_table_base = gamma.paddr;
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DPRINTF("gamma_table_base is allocated @ 0x%x\n",
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(unsigned int)gamma_table_base);
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/* Prep for DIU init - gamma table */
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for (i = 0; i <= 2; i++)
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for (j = 0; j <= 255; j++)
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*gamma_table_base++ = j;
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if (gamma_fix == 1) { /* fix the gamma */
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DPRINTF("Fix gamma table\n");
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gamma_table_base = gamma.paddr;
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for (i = 0; i < 256*3; i++) {
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gamma_table_base[i] = (gamma_table_base[i] << 2)
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| ((gamma_table_base[i] >> 6) & 0x03);
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}
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}
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DPRINTF("update-lcdc: HW - %p\n Disabling DIU\n", hw);
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/* Program DIU registers */
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hw->gamma = (unsigned int) gamma.paddr;
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hw->cursor= (unsigned int) cursor.paddr;
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hw->bgnd = 0x007F7F7F; /* BGND */
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hw->bgnd_wb = 0; /* BGND_WB */
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hw->disp_size = var->yres << 16 | var->xres; /* DISP SIZE */
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hw->wb_size = 0; /* WB SIZE */
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hw->wb_mem_addr = 0; /* WB MEM ADDR */
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hw->hsyn_para = var->left_margin << 22 | /* BP_H */
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var->hsync_len << 11 | /* PW_H */
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var->right_margin; /* FP_H */
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hw->vsyn_para = var->upper_margin << 22 | /* BP_V */
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var->vsync_len << 11 | /* PW_V */
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var->lower_margin; /* FP_V */
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/* Pixel Clock configuration */
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DPRINTF("DIU: Bus Frequency = %d\n", get_busfreq());
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speed_ccb = get_busfreq();
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DPRINTF("DIU pixclock in ps - %d\n", var->pixclock);
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temp = 1;
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temp *= 1000000000;
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temp /= var->pixclock;
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temp *= 1000;
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pixval = speed_ccb / temp;
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DPRINTF("DIU pixval = %lu\n", pixval);
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hw->syn_pol = 0; /* SYNC SIGNALS POLARITY */
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hw->thresholds = 0x00037800; /* The Thresholds */
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hw->int_status = 0; /* INTERRUPT STATUS */
|
|
|
|
hw->int_mask = 0; /* INT MASK */
|
|
|
|
hw->plut = 0x01F5F666;
|
|
|
|
|
|
|
|
/* Modify PXCLK in GUTS CLKDVDR */
|
|
|
|
DPRINTF("DIU: Current value of CLKDVDR = 0x%08x\n", *guts_clkdvdr);
|
|
|
|
temp = *guts_clkdvdr & 0x2000FFFF;
|
|
|
|
*guts_clkdvdr = temp; /* turn off clock */
|
|
|
|
*guts_clkdvdr = temp | 0x80000000 | ((pixval & 0x1F) << 16);
|
|
|
|
DPRINTF("DIU: Modified value of CLKDVDR = 0x%08x\n", *guts_clkdvdr);
|
|
|
|
|
|
|
|
fb_initialized = 1;
|
|
|
|
|
|
|
|
if (splash_bmp) {
|
|
|
|
info->logo_height = fsl_diu_display_bmp(splash_bmp, 0, 0, 0);
|
|
|
|
info->logo_size = info->logo_height * info->line_length;
|
|
|
|
DPRINTF("logo height %d, logo_size 0x%x\n",
|
|
|
|
info->logo_height,info->logo_size);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Enable the DIU */
|
|
|
|
fsl_diu_enable_panel(info);
|
|
|
|
enable_lcdc();
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
char *fsl_fb_open(struct fb_info **info)
|
|
|
|
{
|
|
|
|
*info = &fsl_fb_info;
|
|
|
|
return (char *) ((unsigned int)(*info)->screen_base
|
|
|
|
+ (*info)->logo_size);
|
|
|
|
}
|
|
|
|
|
|
|
|
void fsl_diu_close(void)
|
|
|
|
{
|
|
|
|
struct fb_info *info = &fsl_fb_info;
|
|
|
|
fsl_diu_disable_panel(info);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int fsl_diu_enable_panel(struct fb_info *info)
|
|
|
|
{
|
|
|
|
struct diu *hw = dr.diu_reg;
|
|
|
|
struct diu_ad *ad = &fsl_diu_fb_ad;
|
|
|
|
|
|
|
|
DPRINTF("Entered: enable_panel\n");
|
|
|
|
if (hw->desc[0] != (unsigned int)ad)
|
|
|
|
hw->desc[0] = (unsigned int)ad;
|
|
|
|
DPRINTF("desc[0] = 0x%x\n", hw->desc[0]);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int fsl_diu_disable_panel(struct fb_info *info)
|
|
|
|
{
|
|
|
|
struct diu *hw = dr.diu_reg;
|
|
|
|
|
|
|
|
DPRINTF("Entered: disable_panel\n");
|
|
|
|
if (hw->desc[0] != (unsigned int)&dummy_ad)
|
|
|
|
hw->desc[0] = (unsigned int)&dummy_ad;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int map_video_memory(struct fb_info *info, unsigned long bytes_align)
|
|
|
|
{
|
|
|
|
unsigned long offset;
|
|
|
|
unsigned long mask;
|
|
|
|
|
|
|
|
DPRINTF("Entered: map_video_memory\n");
|
|
|
|
/* allocate maximum 1280*1024 with 32bpp */
|
|
|
|
info->smem_len = 1280 * 4 *1024 + bytes_align;
|
|
|
|
DPRINTF("MAP_VIDEO_MEMORY: smem_len = %d\n", info->smem_len);
|
|
|
|
info->screen_base = malloc(info->smem_len);
|
|
|
|
if (info->screen_base == NULL) {
|
|
|
|
printf("Unable to allocate fb memory\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
info->smem_start = (unsigned int) info->screen_base;
|
|
|
|
mask = bytes_align - 1;
|
|
|
|
offset = (unsigned long)info->screen_base & mask;
|
|
|
|
if (offset) {
|
|
|
|
info->screen_base += offset;
|
|
|
|
info->smem_len = info->smem_len - (bytes_align - offset);
|
|
|
|
} else
|
|
|
|
info->smem_len = info->smem_len - bytes_align;
|
|
|
|
|
|
|
|
info->screen_size = info->smem_len;
|
|
|
|
|
|
|
|
DPRINTF("Allocated fb @ 0x%08lx, size=%d.\n",
|
|
|
|
info->smem_start, info->smem_len);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void enable_lcdc(void)
|
|
|
|
{
|
|
|
|
struct diu *hw = dr.diu_reg;
|
|
|
|
|
|
|
|
DPRINTF("Entered: enable_lcdc, fb_enabled = %d\n", fb_enabled);
|
|
|
|
if (!fb_enabled) {
|
|
|
|
hw->diu_mode = dr.mode;
|
|
|
|
fb_enabled++;
|
|
|
|
}
|
|
|
|
DPRINTF("diu_mode = %d\n", hw->diu_mode);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void disable_lcdc(void)
|
|
|
|
{
|
|
|
|
struct diu *hw = dr.diu_reg;
|
|
|
|
|
|
|
|
DPRINTF("Entered: disable_lcdc, fb_enabled = %d\n", fb_enabled);
|
|
|
|
if (fb_enabled) {
|
|
|
|
hw->diu_mode = 0;
|
|
|
|
fb_enabled = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static u32 get_busfreq(void)
|
|
|
|
{
|
|
|
|
u32 fs_busfreq = 0;
|
|
|
|
|
|
|
|
fs_busfreq = get_bus_freq(0);
|
|
|
|
return fs_busfreq;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Align to 64-bit(8-byte), 32-byte, etc.
|
|
|
|
*/
|
|
|
|
static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
|
|
|
|
{
|
|
|
|
u32 offset, ssize;
|
|
|
|
u32 mask;
|
|
|
|
|
|
|
|
DPRINTF("Entered: allocate_buf\n");
|
|
|
|
ssize = size + bytes_align;
|
|
|
|
buf->paddr = malloc(ssize);
|
|
|
|
if (!buf->paddr)
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
memset(buf->paddr, 0, ssize);
|
|
|
|
mask = bytes_align - 1;
|
|
|
|
offset = (u32)buf->paddr & mask;
|
|
|
|
if (offset) {
|
|
|
|
buf->offset = bytes_align - offset;
|
|
|
|
buf->paddr = (unsigned char *) ((u32)buf->paddr + offset);
|
|
|
|
} else
|
|
|
|
buf->offset = 0;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int fsl_diu_display_bmp(unsigned char *bmp,
|
|
|
|
int xoffset,
|
|
|
|
int yoffset,
|
|
|
|
int transpar)
|
|
|
|
{
|
|
|
|
struct fb_info *info = &fsl_fb_info;
|
|
|
|
unsigned char r, g, b;
|
|
|
|
unsigned int *fb_t, val;
|
|
|
|
unsigned char *bitmap;
|
|
|
|
unsigned int palette[256];
|
|
|
|
int width, height, bpp, ncolors, raster, offset, x, y, i, k, cpp;
|
|
|
|
|
|
|
|
if (!bmp) {
|
|
|
|
printf("Must supply a bitmap address\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
raster = bmp[10] + (bmp[11] << 8) + (bmp[12] << 16) + (bmp[13] << 24);
|
|
|
|
width = (bmp[21] << 24) | (bmp[20] << 16) | (bmp[19] << 8) | bmp[18];
|
|
|
|
height = (bmp[25] << 24) | (bmp[24] << 16) | (bmp[23] << 8) | bmp[22];
|
|
|
|
bpp = (bmp[29] << 8) | (bmp[28]);
|
|
|
|
ncolors = bmp[46] + (bmp[47] << 8) + (bmp[48] << 16) + (bmp[49] << 24);
|
|
|
|
bitmap = bmp + raster;
|
|
|
|
cpp = info->var.bits_per_pixel / 8;
|
|
|
|
|
|
|
|
DPRINTF("bmp = 0x%08x\n", (unsigned int)bmp);
|
|
|
|
DPRINTF("bitmap = 0x%08x\n", (unsigned int)bitmap);
|
|
|
|
DPRINTF("width = %d\n", width);
|
|
|
|
DPRINTF("height = %d\n", height);
|
|
|
|
DPRINTF("bpp = %d\n", bpp);
|
|
|
|
DPRINTF("ncolors = %d\n", ncolors);
|
|
|
|
|
|
|
|
DPRINTF("xres = %d\n", info->var.xres);
|
|
|
|
DPRINTF("yres = %d\n", info->var.yres);
|
|
|
|
DPRINTF("Screen_base = 0x%x\n", (unsigned int)info->screen_base);
|
|
|
|
|
|
|
|
if (((width+xoffset) > info->var.xres) ||
|
|
|
|
((height+yoffset) > info->var.yres)) {
|
|
|
|
printf("bitmap is out of range, image too large or too much offset\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
if (bpp < 24) {
|
|
|
|
for (i = 0, offset = 54; i < ncolors; i++, offset += 4)
|
|
|
|
palette[i] = (bmp[offset+2] << 16)
|
|
|
|
+ (bmp[offset+1] << 8) + bmp[offset];
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (bpp) {
|
|
|
|
case 1:
|
|
|
|
for (y = height - 1; y >= 0; y--) {
|
|
|
|
fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
|
|
|
|
for (x = 0; x < width; x += 8) {
|
|
|
|
b = *bitmap++;
|
|
|
|
for (k = 0; k < 8; k++) {
|
|
|
|
if (b & 0x80)
|
|
|
|
*fb_t = palette[1];
|
|
|
|
else
|
|
|
|
*fb_t = palette[0];
|
|
|
|
b = b << 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
for (i = (width / 2) % 4; i > 0; i--)
|
|
|
|
bitmap++;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
for (y = height - 1; y >= 0; y--) {
|
|
|
|
fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
|
|
|
|
for (x = 0; x < width; x += 2) {
|
|
|
|
b = *bitmap++;
|
|
|
|
r = (b >> 4) & 0x0F;
|
|
|
|
g = b & 0x0F;
|
|
|
|
*fb_t++ = palette[r];
|
|
|
|
*fb_t++ = palette[g];
|
|
|
|
}
|
|
|
|
for (i = (width / 2) % 4; i > 0; i--)
|
|
|
|
bitmap++;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 8:
|
|
|
|
for (y = height - 1; y >= 0; y--) {
|
|
|
|
fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
|
|
|
|
for (x = 0; x < width; x++) {
|
|
|
|
*fb_t++ = palette[ *bitmap++ ];
|
|
|
|
}
|
|
|
|
for (i = (width / 2) % 4; i > 0; i--)
|
|
|
|
bitmap++;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 24:
|
|
|
|
for (y = height - 1; y >= 0; y--) {
|
|
|
|
fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
|
|
|
|
for (x = 0; x < width; x++) {
|
|
|
|
b = *bitmap++;
|
|
|
|
g = *bitmap++;
|
|
|
|
r = *bitmap++;
|
|
|
|
val = (r << 16) + (g << 8) + b;
|
|
|
|
*fb_t++ = val;
|
|
|
|
}
|
|
|
|
for (; (x % 4) != 0; x++) /* 4-byte alignment */
|
|
|
|
bitmap++;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return height;
|
|
|
|
}
|
|
|
|
|
|
|
|
void fsl_diu_clear_screen(void)
|
|
|
|
{
|
|
|
|
struct fb_info *info = &fsl_fb_info;
|
|
|
|
|
|
|
|
memset(info->screen_base, 0, info->smem_len);
|
|
|
|
}
|