upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support
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u-boot/doc/device-tree-bindings/sysreset/ti,sci-sysreset.txt

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Texas Instruments TI SCI System Reset Controller
================================================
Some TI SoCs contain a system controller (like the SYSFW, etc...) that is
responsible for controlling the state of the IPs that are present.
Communication between the host processor running an OS and the system
controller happens through a protocol known as TI SCI [1].
[1] http://processors.wiki.ti.com/index.php/TISCI
System Reset Controller Node
============================
The sysreset controller node represents the reset for the overall SoC
which is managed by the SYSFW. Because this relies on the TI SCI protocol
to communicate with the SYSFW it must be a child of the sysfw node.
Required Properties:
--------------------
- compatible: Must be "ti,sci-sysreset"
Example (AM65x):
----------------
sysfw: sysfw {
compatible = "ti,am654-system-controller";
...
k3_sysreset: sysreset-controller {
compatible = "ti,sci-sysreset";
};
};