upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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129 lines
2.4 KiB
129 lines
2.4 KiB
21 years ago
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/*
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* (C) Copyright 2004
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* DAVE Srl
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* http://www.dave-tech.it
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* http://www.wawnet.biz
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* mailto:info@wawnet.biz
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/hardware.h>
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/*
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* Miscelaneous platform dependent initialization
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*/
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int board_init (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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u32 temp;
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/* Configuration Port Control Register*/
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/* Port A */
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PCONA = 0x3ff;
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/* Port B */
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PCONB = 0xff;
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PDATB = 0xFFFF;
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/* Port C */
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/*
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PCONC = 0xff55ff15;
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PDATC = 0x0;
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PUPC = 0xffff;
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*/
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/* Port D */
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/*
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PCOND = 0xaaaa;
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PUPD = 0xff;
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*/
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/* Port E */
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PCONE = 0x0001aaa9;
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PDATE = 0x0;
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PUPE = 0xff;
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/* Port F */
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PCONF = 0x124955;
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PDATF = 0xff; /* B2-eth_reset tied high level */
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/*
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PUPF = 0x1e3;
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*/
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/* Port G */
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PUPG = 0x1;
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PCONG = 0x3; /*PG0= EINT0= ETH_INT prepared for linux kernel*/
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INTMSK = 0x03fffeff;
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INTCON = 0x05;
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/*
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Configure chip ethernet interrupt as High level
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Port G EINT 0-7 EINT0 -> CHIP ETHERNET
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*/
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temp = EXTINT;
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temp &= ~0x7;
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temp |= 0x1; /*LEVEL_HIGH*/
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EXTINT = temp;
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/*
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Reset SMSC LAN91C96 chip
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*/
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temp= PCONF;
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temp |= 0x00000040;
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PCONF = temp;
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/* Reset high */
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temp = PDATF;
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temp |= (1 << 3);
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PDATF = temp;
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/* Short delay */
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for (temp=0;temp<10;temp++)
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{
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/* NOP */
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}
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/* Reset low */
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temp = PDATF;
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temp &= ~(1 << 3);
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PDATF = temp;
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/* arch number MACH_TYPE_MBA44B0 */
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gd->bd->bi_arch_number = 178;
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/* location of boot parameters */
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gd->bd->bi_boot_params = 0x0c000100;
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return 0;
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}
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int dram_init (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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return (0);
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}
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