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upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support
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u-boot/configs/LicheePi_Zero_defconfig

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sunxi: add support for Lichee Pi Zero Lichee Pi Zero is a development board with a V3s SoC, which features 64MiB DRAM co-packaged within the SoC, a TF slot, a SPI NOR slot (not soldered in production batch), a 40-pin RGB LCD connector and some extra pins available as 2.54mm pins or stamp holes. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
8 years ago
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN8I_V3S=y
CONFIG_DRAM_CLK=360
CONFIG_DRAM_ZQ=14779
CONFIG_DEFAULT_DEVICE_TREE="sun8i-v3s-licheepi-zero"
sunxi: defaultly enable SPL for Lichee Pi Zero As we have already DRAM initialization code for V3s SoC, we can defaultly enable SPL now on Lichee Pi Zero. Add CONFIG_SPL in Lichee Pi Zero defconfig. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years ago
CONFIG_SPL=y
sunxi: add support for Lichee Pi Zero Lichee Pi Zero is a development board with a V3s SoC, which features 64MiB DRAM co-packaged within the SoC, a TF slot, a SPI NOR slot (not soldered in production batch), a 40-pin RGB LCD connector and some extra pins available as 2.54mm pins or stamp holes. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
8 years ago
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
# CONFIG_NETDEVICES is not set
configs: Migrate all of the existing USB symbols, except fastboot This syncs all of the currently Kconfig'd symbols out of the headers and into the defconfig files. This has two exceptions, first am335x_evm needs to be converted to DM in SPL and then it can stop undef'ing CONFIG_DM_USB. Leaving this as-is results in a build failure, and without work, run time failure. The other case is am43xx_evm.h and in turn am43xx_evm_usbhost_boot. The problem here is that we need DWC3 USB host mode in SPL, but still desire to have gadget mode in U-Boot proper. Signed-off-by: Tom Rini <trini@konsulko.com>
7 years ago
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
sunxi: defaultly enable SPL for Lichee Pi Zero As we have already DRAM initialization code for V3s SoC, we can defaultly enable SPL now on Lichee Pi Zero. Add CONFIG_SPL in Lichee Pi Zero defconfig. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years ago
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set