upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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78 lines
1.7 KiB
78 lines
1.7 KiB
9 years ago
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/*
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* Copyright (c) 2015 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <cros_ec.h>
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#include <errno.h>
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#include <i2c.h>
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#include <power/tps65090.h>
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static int cros_ec_ldo_set_bus_speed(struct udevice *dev, unsigned int speed)
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{
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return 0;
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}
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static int cros_ec_ldo_xfer(struct udevice *dev, struct i2c_msg *msg,
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int nmsgs)
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{
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bool is_read = nmsgs > 1;
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int fet_id, ret;
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/*
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* Look for reads and writes of the LDO registers. In either case the
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* first message is a write with the register number as the first byte.
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*/
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if (!nmsgs || !msg->len || (msg->flags & I2C_M_RD)) {
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debug("%s: Invalid message\n", __func__);
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goto err;
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}
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fet_id = msg->buf[0] - REG_FET_BASE;
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if (fet_id < 1 || fet_id > MAX_FET_NUM) {
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debug("%s: Invalid FET %d\n", __func__, fet_id);
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goto err;
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}
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if (is_read) {
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uint8_t state;
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ret = cros_ec_get_ldo(dev->parent, fet_id, &state);
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if (!ret)
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msg[1].buf[0] = state ?
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FET_CTRL_ENFET | FET_CTRL_PGFET : 0;
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} else {
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bool on = msg->buf[1] & FET_CTRL_ENFET;
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ret = cros_ec_set_ldo(dev->parent, fet_id, on);
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}
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return ret;
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err:
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/* Indicate that the message is unimplemented */
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return -ENOSYS;
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}
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static const struct dm_i2c_ops cros_ec_i2c_ops = {
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.xfer = cros_ec_ldo_xfer,
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.set_bus_speed = cros_ec_ldo_set_bus_speed,
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};
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static const struct udevice_id cros_ec_i2c_ids[] = {
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{ .compatible = "google,cros-ec-ldo-tunnel" },
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{ }
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};
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U_BOOT_DRIVER(cros_ec_ldo) = {
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.name = "cros_ec_ldo_tunnel",
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.id = UCLASS_I2C,
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.of_match = cros_ec_i2c_ids,
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.per_child_auto_alloc_size = sizeof(struct dm_i2c_chip),
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.ops = &cros_ec_i2c_ops,
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};
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