upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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94 lines
1.8 KiB
94 lines
1.8 KiB
24 years ago
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/*
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* PowerPC atomic operations
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*/
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#ifndef _ASM_PPC_ATOMIC_H_
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#define _ASM_PPC_ATOMIC_H_
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#ifdef CONFIG_SMP
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typedef struct { volatile int counter; } atomic_t;
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#else
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typedef struct { int counter; } atomic_t;
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#endif
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#define ATOMIC_INIT(i) { (i) }
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#define atomic_read(v) ((v)->counter)
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#define atomic_set(v,i) (((v)->counter) = (i))
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extern void atomic_clear_mask(unsigned long mask, unsigned long *addr);
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extern void atomic_set_mask(unsigned long mask, unsigned long *addr);
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extern __inline__ int atomic_add_return(int a, atomic_t *v)
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{
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int t;
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__asm__ __volatile__("\n\
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1: lwarx %0,0,%3\n\
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add %0,%2,%0\n\
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stwcx. %0,0,%3\n\
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bne- 1b"
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: "=&r" (t), "=m" (*v)
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: "r" (a), "r" (v), "m" (*v)
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: "cc");
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return t;
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}
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extern __inline__ int atomic_sub_return(int a, atomic_t *v)
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{
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int t;
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__asm__ __volatile__("\n\
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1: lwarx %0,0,%3\n\
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subf %0,%2,%0\n\
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stwcx. %0,0,%3\n\
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bne- 1b"
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: "=&r" (t), "=m" (*v)
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: "r" (a), "r" (v), "m" (*v)
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: "cc");
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return t;
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}
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extern __inline__ int atomic_inc_return(atomic_t *v)
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{
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int t;
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__asm__ __volatile__("\n\
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1: lwarx %0,0,%2\n\
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addic %0,%0,1\n\
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stwcx. %0,0,%2\n\
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bne- 1b"
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: "=&r" (t), "=m" (*v)
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: "r" (v), "m" (*v)
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: "cc");
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return t;
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}
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extern __inline__ int atomic_dec_return(atomic_t *v)
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{
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int t;
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__asm__ __volatile__("\n\
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1: lwarx %0,0,%2\n\
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addic %0,%0,-1\n\
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stwcx. %0,0,%2\n\
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bne 1b"
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: "=&r" (t), "=m" (*v)
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: "r" (v), "m" (*v)
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: "cc");
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return t;
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}
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#define atomic_add(a, v) ((void) atomic_add_return((a), (v)))
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#define atomic_sub(a, v) ((void) atomic_sub_return((a), (v)))
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#define atomic_sub_and_test(a, v) (atomic_sub_return((a), (v)) == 0)
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#define atomic_inc(v) ((void) atomic_inc_return((v)))
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#define atomic_dec(v) ((void) atomic_dec_return((v)))
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#define atomic_dec_and_test(v) (atomic_dec_return((v)) == 0)
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#endif /* _ASM_PPC_ATOMIC_H_ */
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