upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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43 lines
1.5 KiB
43 lines
1.5 KiB
17 years ago
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/*
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* (C) Copyright 2008
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* Matthias Fuchs, esd gmbh, matthias.fuchs@esd-electronics.com
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#define SDR0_USB0 0x0320 /* USB Control Register */
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#define CFG_GPIO0_EP_EEP (0x80000000 >> 23) /* GPIO0_23 */
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#define CFG_GPIO1_DCF77 (0x80000000 >> (42-32)) /* GPIO1_42 */
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#define CFG_GPIO1_IORSTN (0x80000000 >> (55-32)) /* GPIO1_55 */
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#define CFG_GPIO1_HWVER_MASK 0x000000f0 /* GPIO1_56-59 */
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#define CFG_GPIO1_HWVER_SHIFT 4
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#define CFG_GPIO1_LEDUSR1 0x00000008 /* GPIO1_60 */
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#define CFG_GPIO1_LEDUSR2 0x00000004 /* GPIO1_61 */
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#define CFG_GPIO1_LEDPOST 0x00000002 /* GPIO1_62 */
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#define CFG_GPIO1_LEDDU 0x00000001 /* GPIO1_63 */
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#define CPLD_VERSION_MASK 0x0f
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#define PWR_INT_FLAG 0x80
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#define PWR_RDY 0x10
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#define CPLD_IRQ (32+30)
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#define PCI_VENDOR_ID_ESDGMBH 0x12fe
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#define PCI_DEVICE_ID_DU440 0x0444
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