Whitebox
/
u-boot
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity
upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support
You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
26538 Commits
3 Branches
0 Tags
148 MiB
Tag: Branch: Tree: 796bcee6d9
Branches Tags
${ item.name }
Create tag ${ searchTerm }
Create branch ${ searchTerm }
from '796bcee6d9'
${ noResults }
u-boot/board/bc3450/mt48lc16m16a2-75.h

19 lines
599 B
Raw Normal View History Unescape

Add support for BC3450 board Signed-off-by: dzu@denx.de <dzu@denx.de>
19 years ago
/*
* (C) Copyright 2004
* Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
*
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
12 years ago
* SPDX-License-Identifier: GPL-2.0+
Add support for BC3450 board Signed-off-by: dzu@denx.de <dzu@denx.de>
19 years ago
*/
#define SDRAM_DDR 0 /* is SDR */
/* Settings for XLB = 132 MHz */
#define SDRAM_MODE 0x00CD0000
/* #define SDRAM_MODE 0x008D0000 */ /* CAS latency 2 */
#define SDRAM_CONTROL 0x504F0000
#define SDRAM_CONFIG1 0xD2322800
/* #define SDRAM_CONFIG1 0xD2222800 */ /* CAS latency 2 */
/*#define SDRAM_CONFIG1 0xD7322800 */ /* SDRAM controller bug workaround */
#define SDRAM_CONFIG2 0x8AD70000
/*#define SDRAM_CONFIG2 0xDDD70000 */ /* SDRAM controller bug workaround */