upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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257 lines
8.4 KiB
257 lines
8.4 KiB
21 years ago
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/*****************************************************************************
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*
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* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
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* AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND
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* SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE,
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* OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,
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* APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION
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* THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
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* AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
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* FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY
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* WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
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* IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
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* REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
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* INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE.
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*
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* (c) Copyright 2002 Xilinx Inc.
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* All rights reserved.
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*
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*****************************************************************************/
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/****************************************************************************/
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/**
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*
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* @file xuartlite_l.h
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*
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* This header file contains identifiers and low-level driver functions (or
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* macros) that can be used to access the device. High-level driver functions
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* are defined in xuartlite.h.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -----------------------------------------------
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* 1.00b rpm 04/25/02 First release
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* </pre>
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*
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*****************************************************************************/
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#ifndef XUARTLITE_L_H /* prevent circular inclusions */
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#define XUARTLITE_L_H /* by using protection macros */
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/***************************** Include Files ********************************/
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#include "xbasic_types.h"
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#include "xio.h"
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/************************** Constant Definitions ****************************/
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/* UART Lite register offsets */
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#define XUL_RX_FIFO_OFFSET 0 /* receive FIFO, read only */
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#define XUL_TX_FIFO_OFFSET 4 /* transmit FIFO, write only */
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#define XUL_STATUS_REG_OFFSET 8 /* status register, read only */
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#define XUL_CONTROL_REG_OFFSET 12 /* control register, write only */
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/* control register bit positions */
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#define XUL_CR_ENABLE_INTR 0x10 /* enable interrupt */
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#define XUL_CR_FIFO_RX_RESET 0x02 /* reset receive FIFO */
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#define XUL_CR_FIFO_TX_RESET 0x01 /* reset transmit FIFO */
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/* status register bit positions */
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#define XUL_SR_PARITY_ERROR 0x80
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#define XUL_SR_FRAMING_ERROR 0x40
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#define XUL_SR_OVERRUN_ERROR 0x20
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#define XUL_SR_INTR_ENABLED 0x10 /* interrupt enabled */
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#define XUL_SR_TX_FIFO_FULL 0x08 /* transmit FIFO full */
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#define XUL_SR_TX_FIFO_EMPTY 0x04 /* transmit FIFO empty */
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#define XUL_SR_RX_FIFO_FULL 0x02 /* receive FIFO full */
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#define XUL_SR_RX_FIFO_VALID_DATA 0x01 /* data in receive FIFO */
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/* the following constant specifies the size of the FIFOs, the size of the
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* FIFOs includes the transmitter and receiver such that it is the total number
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* of bytes that the UART can buffer
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*/
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#define XUL_FIFO_SIZE 16
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/* Stop bits are fixed at 1. Baud, parity, and data bits are fixed on a
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* per instance basis
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*/
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#define XUL_STOP_BITS 1
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/* Parity definitions
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*/
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#define XUL_PARITY_NONE 0
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#define XUL_PARITY_ODD 1
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#define XUL_PARITY_EVEN 2
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/**************************** Type Definitions ******************************/
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/***************** Macros (Inline Functions) Definitions ********************/
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/*****************************************************************************
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*
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* Low-level driver macros and functions. The list below provides signatures
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* to help the user use the macros.
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*
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* void XUartLite_mSetControlReg(u32 BaseAddress, u32 Mask)
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* u32 XUartLite_mGetControlReg(u32 BaseAddress)
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* u32 XUartLite_mGetStatusReg(u32 BaseAddress)
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*
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* Xboolean XUartLite_mIsReceiveEmpty(u32 BaseAddress)
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* Xboolean XUartLite_mIsTransmitFull(u32 BaseAddress)
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* Xboolean XUartLite_mIsIntrEnabled(u32 BaseAddress)
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*
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* void XUartLite_mEnableIntr(u32 BaseAddress)
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* void XUartLite_mDisableIntr(u32 BaseAddress)
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*
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* void XUartLite_SendByte(u32 BaseAddress, u8 Data);
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* u8 XUartLite_RecvByte(u32 BaseAddress);
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*
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*****************************************************************************/
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/****************************************************************************/
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/**
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*
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* Set the contents of the control register. Use the XUL_CR_* constants defined
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* above to create the bit-mask to be written to the register.
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*
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* @param BaseAddress is the base address of the device
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* @param Mask is the 32-bit value to write to the control register
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*
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* @return None.
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*
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* @note None.
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*
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*****************************************************************************/
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#define XUartLite_mSetControlReg(BaseAddress, Mask) \
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XIo_Out32((BaseAddress) + XUL_CONTROL_REG_OFFSET, (Mask))
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/****************************************************************************/
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/**
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*
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* Get the contents of the control register. Use the XUL_CR_* constants defined
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* above to interpret the bit-mask returned.
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*
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* @param BaseAddress is the base address of the device
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*
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* @return A 32-bit value representing the contents of the control register.
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*
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* @note None.
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*
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*****************************************************************************/
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#define XUartLite_mGetControlReg(BaseAddress) \
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XIo_In32((BaseAddress) + XUL_CONTROL_REG_OFFSET)
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/****************************************************************************/
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/**
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*
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* Get the contents of the status register. Use the XUL_SR_* constants defined
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* above to interpret the bit-mask returned.
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*
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* @param BaseAddress is the base address of the device
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*
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* @return A 32-bit value representing the contents of the status register.
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*
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* @note None.
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*
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*****************************************************************************/
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#define XUartLite_mGetStatusReg(BaseAddress) \
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XIo_In32((BaseAddress) + XUL_STATUS_REG_OFFSET)
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/****************************************************************************/
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/**
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*
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* Check to see if the receiver has data.
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*
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* @param BaseAddress is the base address of the device
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*
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* @return XTRUE if the receiver is empty, XFALSE if there is data present.
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*
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* @note None.
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*
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*****************************************************************************/
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#define XUartLite_mIsReceiveEmpty(BaseAddress) \
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(!(XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_RX_FIFO_VALID_DATA))
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/****************************************************************************/
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/**
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*
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* Check to see if the transmitter is full.
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*
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* @param BaseAddress is the base address of the device
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*
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* @return XTRUE if the transmitter is full, XFALSE otherwise.
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*
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* @note None.
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*
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*****************************************************************************/
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#define XUartLite_mIsTransmitFull(BaseAddress) \
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(XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_TX_FIFO_FULL)
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/****************************************************************************/
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/**
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*
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* Check to see if the interrupt is enabled.
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*
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* @param BaseAddress is the base address of the device
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*
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* @return XTRUE if the interrupt is enabled, XFALSE otherwise.
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*
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* @note None.
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*
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*****************************************************************************/
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#define XUartLite_mIsIntrEnabled(BaseAddress) \
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(XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_INTR_ENABLED)
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/****************************************************************************/
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/**
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*
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* Enable the device interrupt. Preserve the contents of the control register.
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*
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* @param BaseAddress is the base address of the device
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*
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* @return None.
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*
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* @note None.
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*
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*****************************************************************************/
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#define XUartLite_mEnableIntr(BaseAddress) \
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XUartLite_mSetControlReg((BaseAddress), \
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XUartLite_mGetControlReg((BaseAddress)) | XUL_CR_ENABLE_INTR)
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/****************************************************************************/
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/**
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*
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* Disable the device interrupt. Preserve the contents of the control register.
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*
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* @param BaseAddress is the base address of the device
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*
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* @return None.
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*
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* @note None.
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*
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*****************************************************************************/
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#define XUartLite_mDisableIntr(BaseAddress) \
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XUartLite_mSetControlReg((BaseAddress), \
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XUartLite_mGetControlReg((BaseAddress)) & ~XUL_CR_ENABLE_INTR)
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/************************** Function Prototypes *****************************/
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void XUartLite_SendByte(u32 BaseAddress, u8 Data);
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u8 XUartLite_RecvByte(u32 BaseAddress);
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#endif /* end of protection macro */
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