upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support
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u-boot/cpu/mpc824x/drivers/epic/README

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23 years ago
CONTENT:
epic.h
epic1.c
epic2.s
WHAT ARE THESE FILES:
These files contain MPC8240 (Kahlua) EPIC
driver routines. The driver routines are not
written for any specific operating system.
They serves the purpose of code sample, and
jump-start for using the MPC8240 EPIC unit.
For the reason of correctness of C language
syntax, these files are compiled by Metaware
C compiler and assembler.
ENDIAN NOTATION:
The algorithm is designed for big-endian mode,
software is responsible for byte swapping.
USAGE:
1. The host system that is running on MPC8240
shall link the files listed here. The memory
location of driver routines shall take into
account of that driver routines need to run
in supervisor mode and they process external
interrupts.
The routine epic_exception shall be called by
exception vector at location 0x500, i.e.,
603e core external exception vector.
2. The host system is responsible for configuring
the MPC8240 including Embedded Utilities Memory
Block. All EPIC driver functions require the
content of Embedded Utilities Memory Block
Base Address Register, EUMBBAR, as the first
parameter.
3. Before EPIC unit of MPC8240 can be used,
initialize EPIC unit by calling epicInit
with the corresponding parameters.
The initialization shall disable the 603e
core External Exception by calling CoreExtIntDisable( ).
Next, call epicInit( ). Last, enable the 603e core
External Exception by calling CoreExtIntEnable( ).
4. After EPIC unit has been successfully initialized,
epicIntSourceSet( ) shall be used to register each
external interrupt source. Anytime, an external
interrupt source can be disabled or enabled by
calling corresponding function, epicIntDisable( ),
or epicIntEnable( ).
Global Timers' resource, base count and frequency,
can be changed by calling epicTmFrequencySet( )
and epicTmBaseSet( ).
To stop counting a specific global timer, use
the function, epicTmInhibit while epicTmEnable
can be used to start counting a timer.
5. To mask a set of external interrupts that are
are certain level below, epicIntPrioritySet( )
can be used. For example, if the processor's
current task priority register is set to 0x7,
only interrupts of priority 0x8 or higher will
be passed to the processor.
Be careful when using this function. It may
corrupt the current interrupt pending, selector,
and request registers, resulting an invalid vetor.
After enabling an interrupt, disable it may also
cause an invalid vector. User may consider using
the spurious vector interrupt service routine to
handle this case.
6. The EPIC driver routines contains a set
of utilities, Set and Get, for host system
to query and modify the desired EPIC source
registers.
7. Each external interrupt source shall register
its interrupt service routine. The routine
shall contain all interrupt source specific
processes and keep as short as possible.
Special customized end of interrupt routine
is optional. If it is needed, it shall contain
the external interrupt source specific end of
interrupt process.
External interrupt exception vector at 0x500
shall always call the epicEOI just before
rfi instruction. Refer to the routine,
epic_exception, for a code sample.