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TODO: specify IDE i/f
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specify OCI
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===============================================================================
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C P U , M E M O R Y , I N / O U T C O M P O N E N T S
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===============================================================================
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see also [1]-[5]
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CPU: "standard_32"
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32 bit NIOS for 50 MHz
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256 Byte for register file (15 levels)
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4 KByte instruction cache (4 bytes in each cache line)
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4 KByte data cache (4 bytes in each cache line)
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2 KByte On Chip ROM with GERMS boot monitor
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64 KByte On Chip RAM
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MSTEP multiplier
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no Debug Core
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On Chip Instrumentation (OCI) enabled
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U-Boot CFG: CONFIG_SYS_NIOS_CPU_CLK = 50000000
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CONFIG_SYS_NIOS_CPU_ICACHE = 4096
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CONFIG_SYS_NIOS_CPU_DCACHE = 4096
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CONFIG_SYS_NIOS_CPU_REG_NUMS = 256
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CONFIG_SYS_NIOS_CPU_MUL = 0
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CONFIG_SYS_NIOS_CPU_MSTEP = 1
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CONFIG_SYS_NIOS_CPU_DBG_CORE = 0
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OCI: (TODO)
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IRQ: Nr. | used by
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------+--------------------------------------------------------
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16 | TIMER0 | CONFIG_SYS_NIOS_CPU_TIMER0_IRQ = 16
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25 | UART0 | CONFIG_SYS_NIOS_CPU_UART0_IRQ = 25
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30 | LAN91C111 | CONFIG_SYS_NIOS_CPU_LAN0_IRQ = 30
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35 | PIO5 | CONFIG_SYS_NIOS_CPU_PIO5_IRQ = 35
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40 | PIO0 | CONFIG_SYS_NIOS_CPU_PIO0_IRQ = 40
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50 | TIMER1 | CONFIG_SYS_NIOS_CPU_TIMER1_IRQ = 50
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MEMORY: 8 MByte Flash
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1 MByte SRAM
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16 MByte SDRAM
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Timer: TIMER0: high priority programmable timer (IRQ16)
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TIMER1: low priority fixed timer for 10 ms @ 50 MHz (IRQ50)
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U-Boot CFG: CONFIG_SYS_NIOS_CPU_TICK_TIMER = 1
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CONFIG_SYS_NIOS_CPU_USER_TIMER = 0
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PIO: Nr. | description
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------+--------------------------------------------------------
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PIO0 | BUTTON: 4 inputs for user push buttons (IRQ40)
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PIO1 | LCD: 11 in/outputs for ASCII LCD
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PIO2 | LED: 8 outputs for user LEDs
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PIO3 | SEVENSEG: 16 outputs for user seven segment display
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PIO4 | RECONF: 1 in/output for . . . . . . . . . . . .
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PIO5 | CFPRESENT: 1 input for CF present event (IRQ35)
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PIO6 | CFPOWER: 1 output to controll CF power supply
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PIO7 | CFATASEL: 1 output to controll CF ATA card select
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U-Boot CFG: CONFIG_SYS_NIOS_CPU_BUTTON_PIO = 0
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CONFIG_SYS_NIOS_CPU_LCD_PIO = 1
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CONFIG_SYS_NIOS_CPU_LED_PIO = 2
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CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO = 3
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CONFIG_SYS_NIOS_CPU_RECONF_PIO = 4
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CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO = 5
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CONFIG_SYS_NIOS_CPU_CFPOWER_PIO = 6
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CONFIG_SYS_NIOS_CPU_CFATASEL_PIO = 7
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UART: UART0: fixed baudrate of 115200, fixed protocol 8N1,
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without handshake RTS/CTS (IRQ25)
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LAN: SMsC LAN91C111 with:
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- offset 0x300 (LAN91C111_REGISTERS_OFFSET)
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- data bus width 32 bit (LAN91C111_DATA_BUS_WIDTH)
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IDE: (TODO)
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|
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===============================================================================
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|
|
M E M O R Y M A P
|
|
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|
|
===============================================================================
|
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- - - - - - - - - - - external memory 2 - - - - - - - - - - - - - - - - - - -
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0x02000000 ---32-----------16|15------------0-
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| : | \
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| : | |
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SDRAM | : | > CONFIG_SYS_NIOS_CPU_SRAM_SIZE
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| : | | = 0x01000000
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| : | /
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0x01000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SRAM_BASE
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| |
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: gap :
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: :
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- - - - - - - - - - - on chip i/o - - - - - - - - - - - - - - - - - - -
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: :
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: gap :
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| |
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0x00920a80 ---32-----------16|15------------0-
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| | | \
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: (real size : : |
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IDE i/f : and content : : > 0x00000080
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[5] : unknown) : : |
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| | | /
|
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0x00920a00 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_IDE0
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| (unused) | \
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+ 0x1c |- - - - - - - - - - - - - - - -| |
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| (unused) | |
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+ 0x18 |- - - - - - - - - - - - - - - -| |
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| (unused) | |
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+ 0x14 |- - - - - - - - - - - - - - - -| |
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TIMER1 | (unused) | |
|
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[3] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020
|
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|
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| (unused) | |
|
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+ 0x0c |- - - - - - - - - - - - - - - -| |
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|
| (unused) | |
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+ 0x08 |- - - - - - - - - - - - - - - -| |
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| control (1 bit) (rw) | |
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+ 0x04 |- - - - - - - - - - - - - - - -| |
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|
|
|
|
| status (2 bit) (rw) | /
|
|
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|
|
0x009209e0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER1
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|
|
| (unused) | \
|
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|
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+ 0x0c |- - - - - - - - - - - - - - - -| |
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|
|
PIO7 | (unused) | |
|
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|
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[4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
|
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|
|
| (unused) | |
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+ 0x04 |- - - - - - - - - - - - - - - -| |
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|
|
| data (1 bit) (wo) | /
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|
|
0x009209d0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO7
|
|
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|
|
| (unused) | \
|
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|
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+ 0x0c |- - - - - - - - - - - - - - - -| |
|
|
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|
|
PIO6 | (unused) | |
|
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|
|
[4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
|
|
|
|
|
| (unused) | |
|
|
|
|
|
+ 0x04 |- - - - - - - - - - - - - - - -| |
|
|
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|
|
| data (1 bit) (wo) | /
|
|
|
|
|
0x009209c0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO6
|
|
|
|
|
| edgecapture (1 bit) (rw) | \
|
|
|
|
|
+ 0x0c |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
PIO5 | interruptmask (1 bit) (rw) | |
|
|
|
|
|
[4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
|
|
|
|
|
| (unused) | |
|
|
|
|
|
+ 0x04 |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
| data (1 bit) (ro) | /
|
|
|
|
|
0x009209b0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO5
|
|
|
|
|
| (unused) | \
|
|
|
|
|
+ 0x0c |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
PIO4 | (unused) | |
|
|
|
|
|
[4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
|
|
|
|
|
| direction (1 bit) (rw) | |
|
|
|
|
|
+ 0x04 |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
| data (1 bit) (rw) | /
|
|
|
|
|
0x009209a0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO4
|
|
|
|
|
| (unused) | \
|
|
|
|
|
+ 0x0c |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
PIO3 | (unused) | |
|
|
|
|
|
[4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
|
|
|
|
|
| (unused) | |
|
|
|
|
|
+ 0x04 |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
| data (16 bit) (wo) | /
|
|
|
|
|
0x00920990 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO3
|
|
|
|
|
| (unused) | \
|
|
|
|
|
+ 0x0c |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
PIO2 | (unused) | |
|
|
|
|
|
[4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
|
|
|
|
|
| (unused) | |
|
|
|
|
|
+ 0x04 |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
| data (8 bit) (wo) | /
|
|
|
|
|
0x00920980 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO2
|
|
|
|
|
| (unused) | \
|
|
|
|
|
+ 0x0c |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
PIO1 | (unused) | |
|
|
|
|
|
[4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
|
|
|
|
|
| direction (11 bit) (rw) | |
|
|
|
|
|
+ 0x04 |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
| data (11 bit) (rw) | /
|
|
|
|
|
0x00920970 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO1
|
|
|
|
|
| edgecapture (4 bit) (rw) | \
|
|
|
|
|
+ 0x0c |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
PIO0 | interruptmask (4 bit) (rw) | |
|
|
|
|
|
[4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
|
|
|
|
|
| (unused) | |
|
|
|
|
|
+ 0x04 |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
| data (4 bit) (ro) | /
|
|
|
|
|
0x00920960 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO0
|
|
|
|
|
| (unused) | \
|
|
|
|
|
+ 0x1c |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
| (unused) | |
|
|
|
|
|
+ 0x18 |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
| snaph (16 bit) (rw) | |
|
|
|
|
|
+ 0x14 |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
TIMER0 | snapl (16 bit) (rw) | |
|
|
|
|
|
[3] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020
|
|
|
|
|
| periodh (16 bit) (rw) | |
|
|
|
|
|
+ 0x0c |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
| periodl (16 bit) (rw) | |
|
|
|
|
|
+ 0x08 |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
| control (4 bit) (rw) | |
|
|
|
|
|
+ 0x04 |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
| status (2 bit) (rw) | /
|
|
|
|
|
0x00920940 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER0
|
|
|
|
|
| | \
|
|
|
|
|
: gap : > (space for UART1)
|
|
|
|
|
| | /
|
|
|
|
|
0x00920920 ---32-----------16|15------------0-
|
|
|
|
|
| (unused) | \
|
|
|
|
|
+ 0x1c |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
| (unused) | |
|
|
|
|
|
+ 0x18 |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
| (unused) | |
|
|
|
|
|
+ 0x14 |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
UART0 | (unused) | > 0x00000020
|
|
|
|
|
[2] + 0x10 |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
| control (10 bit) (rw) | |
|
|
|
|
|
+ 0x0c |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
| status (10 bit) (rw) | |
|
|
|
|
|
+ 0x08 |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
| txdata (8 bit) (wo) | |
|
|
|
|
|
+ 0x04 |- - - - - - - - - - - - - - - -| |
|
|
|
|
|
| rxdata (8 bit) (ro) | /
|
|
|
|
|
0x00920900 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_UART0
|
|
|
|
|
|
|
|
|
|
- - - - - - - - - - - on chip debugging - - - - - - - - - - - - - - - - - - -
|
|
|
|
|
|
|
|
|
|
0x00920900 -----------------------------------
|
|
|
|
|
| | \
|
|
|
|
|
: (real size : |
|
|
|
|
|
OCI Debug : and content : > CONFIG_SYS_NIOS_CPU_OCI_SIZE
|
|
|
|
|
: unknown) : | = 0x00000100
|
|
|
|
|
| | /
|
|
|
|
|
0x00920800 ----------------------------------- CONFIG_SYS_NIOS_CPU_OCI_BASE
|
|
|
|
|
|
|
|
|
|
- - - - - - - - - - - on chip memory 2 - - - - - - - - - - -
|
|
|
|
|
|
|
|
|
|
0x00920800 ---32-----------16|15------------0-
|
|
|
|
|
| : | \
|
|
|
|
|
| : | |
|
|
|
|
|
GERMS | : | > CONFIG_SYS_NIOS_CPU_ROM_SIZE
|
|
|
|
|
| : | | = 0x00000800
|
|
|
|
|
| : | /
|
|
|
|
|
0x00920000 |- - - - - - - - - - - - - - - -+- - CONFIG_SYS_NIOS_CPU_RST_VECT
|
|
|
|
|
0x00920000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_ROM_BASE
|
|
|
|
|
|
|
|
|
|
- - - - - - - - - - - external i/o - - - - - - - - - - - - - - - - - - -
|
|
|
|
|
|
|
|
|
|
0x00920000 ---32-----------16|15------------0-
|
|
|
|
|
| gap | \
|
|
|
|
|
0x00910310 --+-------------------------------| |
|
|
|
|
|
| | |
|
|
|
|
|
| register bank (size = 0x10) | |
|
|
|
|
|
| +--------.---.---.--- | |
|
|
|
|
|
| | bank 0 \ 1 \ 2 \ 3 \ | |
|
|
|
|
|
| |---------------------------+ | |
|
|
|
|
|
LAN91C111 | | BANK | RESERVED | | |
|
|
|
|
|
| |- - - - - - -|- - - - - - -| | > na_lan91c111_size
|
|
|
|
|
| | RPCR | MIR | | | = 0x00010000
|
|
|
|
|
| |- - - - - - -|- - - - - - -| | |
|
|
|
|
|
| | COUNTER | RCR | | |
|
|
|
|
|
| |- - - - - - -|- - - - - - -| | |
|
|
|
|
|
| | EPH STATUS | TCR | | |
|
|
|
|
|
| +---------------------------+ | |
|
|
|
|
|
0x00910300 --+--LAN91C111_REGISTERS_OFFSET---| |
|
|
|
|
|
| gap | /
|
|
|
|
|
0x00910000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_LAN0_BASE
|
|
|
|
|
|
|
|
|
|
- - - - - - - - - - - on chip memory 1 - - - - - - - - - - -
|
|
|
|
|
|
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0x00910000 ---32-----------16|15------------0-
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| : | \
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| : | |
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onchip RAM | : | > CONFIG_SYS_NIOS_CPU_RAM_SIZE
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| : | | = 0x00010000
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| : | /
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0x00900000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_RAM_BASE
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- - - - - - - - - - - external memory 1 - - - - - - - - - - - - - - - - - - -
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0x00900000 ---32-----------16|15------------0-
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0x00900000 --+32-----------16|15------------0+
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| . | \ \
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| . | | |
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| . | | > CONFIG_SYS_NIOS_CPU_VEC_SIZE
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| . | | | = 0x00000100
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| . | | /
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0x008fff00 |- - - - - - - - - - - - - - - -+-|- CONFIG_SYS_NIOS_CPU_VEC_BASE
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0x008fff00 |- - - - - - - - - - - - - - - -+-|- CONFIG_SYS_NIOS_CPU_STACK
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| . | | \
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| . | | |
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| . | | > stack area
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| . | | |
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| . | | V
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| . | |
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SRAM | . | > CONFIG_SYS_NIOS_CPU_SRAM_SIZE
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| . | | = 0x00100000
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|
|
| | /
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0x00800000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SRAM_BASE
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0x00800000 ---8-------------4|3-------------0-
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| sector 127 | \
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+ 0x7f0000 |- - - - - - - - - - - - - - - -| |
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| : | |
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Flash |- - - - : - - - -| > CONFIG_SYS_NIOS_CPU_FLASH_SIZE
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| sector 1 : | | = 0x00800000
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+ 0x010000 |- - - - - - - - - - - - - - - -| |
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| sector 0 (size = 0x10000) | /
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0x00000000 ---8-------------4|3-------------0- CONFIG_SYS_NIOS_CPU_FLASH_BASE
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|
===============================================================================
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|
F L A S H M E M O R Y A L L O C A T I O N
|
|
|
|
|
===============================================================================
|
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0x00800000 ---8-------------4|3-------------0-
|
|
|
|
|
| : | \
|
|
|
|
|
| : | |
|
|
|
|
|
SAFE | : | > 2 MByte
|
|
|
|
|
FPGA conf. | : | | (NOT usable by software)
|
|
|
|
|
| : | /
|
|
|
|
|
0x00600000 --+- - - - - - - -:- - - - - - - -+-
|
|
|
|
|
| : | \
|
|
|
|
|
| : | |
|
|
|
|
|
USER | : | > 2 MByte
|
|
|
|
|
FPGA conf. | : | | (NOT usable by software)
|
|
|
|
|
| : | /
|
|
|
|
|
0x00400000 --+- - - - - - - -:- - - - - - - -+-
|
|
|
|
|
| : | \
|
|
|
|
|
| : | |
|
|
|
|
|
WEB pages | : | > 2 MByte
|
|
|
|
|
| : | | (provisory usable)
|
|
|
|
|
| : | /
|
|
|
|
|
0x00200000 --+- - - - - - - -:- - - - - - - -+-
|
|
|
|
|
| : | \
|
|
|
|
|
| : | |
|
|
|
|
|
| : | > 2 MByte free for use
|
|
|
|
|
0x00040000 --+- - - - - - - -:- - - - - - - -+-|- u-boot _start()
|
|
|
|
|
| : | /
|
|
|
|
|
0x00000000 ---8-------------4|3-------------0-
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
===============================================================================
|
|
|
|
|
R E F E R E N C E S
|
|
|
|
|
===============================================================================
|
|
|
|
|
[1] http://www.altera.com/literature/manual/mnl_nios_board_stratix_1s40.pdf
|
|
|
|
|
[2] http://www.altera.com/literature/ds/ds_nios_uart.pdf
|
|
|
|
|
[3] http://www.altera.com/literature/ds/ds_nios_timer.pdf
|
|
|
|
|
[4] http://www.altera.com/literature/ds/ds_nios_pio.pdf
|
|
|
|
|
[5] http://www.opencores.org/projects/ata/
|
|
|
|
|
http://www.t13.org/index.html
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
===============================================================================
|
|
|
|
|
Stephan Linz <linz@li-pro.net>
|
