upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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67 lines
1.8 KiB
67 lines
1.8 KiB
21 years ago
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/*
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* COM1 NS16550 support
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* originally from linux source (arch/ppc/boot/ns16550.c)
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* modified to use CFG_ISA_MEM and new defines
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*
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* further modified by Josh Huber <huber@mclx.com> to support
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* the DUART on the Galileo Eval board. (db64360)
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*/
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#include <config.h>
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#include "ns16550.h"
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#ifdef ZUMA_NTL
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/* no 16550 device */
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#else
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const NS16550_t COM_PORTS[] = { (NS16550_t) (CFG_DUART_IO + 0),
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(NS16550_t) (CFG_DUART_IO + 0x20)
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};
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volatile struct NS16550 *NS16550_init (int chan, int baud_divisor)
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{
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volatile struct NS16550 *com_port;
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com_port = (struct NS16550 *) COM_PORTS[chan];
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com_port->ier = 0x00;
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com_port->lcr = LCR_BKSE; /* Access baud rate */
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com_port->dll = baud_divisor & 0xff; /* 9600 baud */
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com_port->dlm = (baud_divisor >> 8) & 0xff;
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com_port->lcr = LCR_8N1; /* 8 data, 1 stop, no parity */
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com_port->mcr = MCR_DTR | MCR_RTS; /* RTS/DTR */
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/* Clear & enable FIFOs */
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com_port->fcr = FCR_FIFO_EN | FCR_RXSR | FCR_TXSR;
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return (com_port);
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}
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void NS16550_reinit (volatile struct NS16550 *com_port, int baud_divisor)
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{
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com_port->ier = 0x00;
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com_port->lcr = LCR_BKSE; /* Access baud rate */
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com_port->dll = baud_divisor & 0xff; /* 9600 baud */
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com_port->dlm = (baud_divisor >> 8) & 0xff;
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com_port->lcr = LCR_8N1; /* 8 data, 1 stop, no parity */
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com_port->mcr = MCR_DTR | MCR_RTS; /* RTS/DTR */
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/* Clear & enable FIFOs */
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com_port->fcr = FCR_FIFO_EN | FCR_RXSR | FCR_TXSR;
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}
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void NS16550_putc (volatile struct NS16550 *com_port, unsigned char c)
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{
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while ((com_port->lsr & LSR_THRE) == 0);
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com_port->thr = c;
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}
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unsigned char NS16550_getc (volatile struct NS16550 *com_port)
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{
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while ((com_port->lsr & LSR_DR) == 0);
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return (com_port->rbr);
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}
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int NS16550_tstc (volatile struct NS16550 *com_port)
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{
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return ((com_port->lsr & LSR_DR) != 0);
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}
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#endif
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