upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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48 lines
1.6 KiB
48 lines
1.6 KiB
21 years ago
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/*
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* (C) Copyright 2004
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* Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#define SDRAM_DDR 0 /* is SDR */
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#if defined(CONFIG_MPC5200)
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/* Settings for XLB = 132 MHz */
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#define SDRAM_MODE 0x00CD0000
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/* #define SDRAM_MODE 0x008D0000 */ /* CAS latency 2 */
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#define SDRAM_CONTROL 0x504F0000
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#define SDRAM_CONFIG1 0xD2322800
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/* #define SDRAM_CONFIG1 0xD2222800 */ /* CAS latency 2 */
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/*#define SDRAM_CONFIG1 0xD7322800 */ /* SDRAM controller bug workaround */
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#define SDRAM_CONFIG2 0x8AD70000
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/*#define SDRAM_CONFIG2 0xDDD70000 */ /* SDRAM controller bug workaround */
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#elif defined(CONFIG_MGT5100)
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/* Settings for XLB = 66 MHz */
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#define SDRAM_MODE 0x008D0000
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#define SDRAM_CONTROL 0x504F0000
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#define SDRAM_CONFIG1 0xC2222600
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#define SDRAM_CONFIG2 0x88B70004
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#define SDRAM_ADDRSEL 0x02000000
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#else
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#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
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#endif
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