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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2012
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* Philippe Reynes <tremyfr@yahoo.fr>
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*/
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#ifndef __ASM_ARCH_MX27_GPIO_H
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#define __ASM_ARCH_MX27_GPIO_H
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/* GPIO registers */
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struct gpio_regs {
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u32 gpio_dir; /* DDIR */
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u32 ocr1;
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u32 ocr2;
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u32 iconfa1;
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u32 iconfa2;
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u32 iconfb1;
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u32 iconfb2;
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u32 gpio_dr; /* DR */
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u32 gius;
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u32 gpio_psr; /* SSR */
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u32 icr1;
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u32 icr2;
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u32 imr;
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u32 isr;
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u32 gpr;
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u32 swr;
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u32 puen;
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u32 res[0x2f];
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};
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/* This structure is used by the function imx_gpio_mode */
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struct gpio_port_regs {
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struct gpio_regs port[6];
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};
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/*
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* GPIO Module and I/O Multiplexer
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*/
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#define PORTA 0
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#define PORTB 1
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#define PORTC 2
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#define PORTD 3
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#define PORTE 4
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#define PORTF 5
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#define GPIO_PIN_MASK 0x1f
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#define GPIO_PORT_SHIFT 5
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#define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT)
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#define GPIO_PORTA (PORTA << GPIO_PORT_SHIFT)
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#define GPIO_PORTB (PORTB << GPIO_PORT_SHIFT)
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#define GPIO_PORTC (PORTC << GPIO_PORT_SHIFT)
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#define GPIO_PORTD (PORTD << GPIO_PORT_SHIFT)
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#define GPIO_PORTE (PORTE << GPIO_PORT_SHIFT)
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#define GPIO_PORTF (PORTF << GPIO_PORT_SHIFT)
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#endif
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