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/*
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* (C) Copyright 2001
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/* #define DEBUG */
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#include <common.h>
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#include <mpc8xx.h>
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#if defined(CFG_ENV_IS_IN_FLASH)
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# ifndef CFG_ENV_ADDR
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# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
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# endif
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# ifndef CFG_ENV_SIZE
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# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
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# endif
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# ifndef CFG_ENV_SECT_SIZE
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# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
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# endif
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#endif
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/*---------------------------------------------------------------------*/
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flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
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/*-----------------------------------------------------------------------
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* Functions
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*/
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static ulong flash_get_size (vu_long *addr, flash_info_t *info);
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static int write_data (flash_info_t *info, ulong dest, ulong data);
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static void flash_get_offsets (ulong base, flash_info_t *info);
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/*-----------------------------------------------------------------------
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*/
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unsigned long flash_init (void)
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{
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volatile immap_t *immap = (immap_t *)CFG_IMMR;
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volatile memctl8xx_t *memctl = &immap->im_memctl;
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unsigned long size_b0, size_b1;
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int i;
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/* Init: no FLASHes known */
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for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
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flash_info[i].flash_id = FLASH_UNKNOWN;
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}
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/* Static FLASH Bank configuration here - FIXME XXX */
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debug ("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_PRELIM);
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size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
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if (flash_info[0].flash_id == FLASH_UNKNOWN) {
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printf ("## Unknown FLASH on Bank 0: "
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"ID 0x%lx, Size = 0x%08lx = %ld MB\n",
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flash_info[0].flash_id,
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size_b0, size_b0<<20);
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}
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debug ("## Get flash bank 2 size @ 0x%08x\n",FLASH_BASE1_PRELIM);
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size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
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debug ("## Prelim. Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
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if (size_b1 > size_b0) {
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printf ("## ERROR: "
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"Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
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size_b1, size_b1<<20,
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size_b0, size_b0<<20
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);
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flash_info[0].flash_id = FLASH_UNKNOWN;
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flash_info[1].flash_id = FLASH_UNKNOWN;
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flash_info[0].sector_count = -1;
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flash_info[1].sector_count = -1;
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flash_info[0].size = 0;
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flash_info[1].size = 0;
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return (0);
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}
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debug ("## Before remap: "
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"BR0: 0x%08x OR0: 0x%08x "
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"BR1: 0x%08x OR1: 0x%08x\n",
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memctl->memc_br0, memctl->memc_or0,
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memctl->memc_br1, memctl->memc_or1);
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/* Remap FLASH according to real size */
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memctl->memc_or0 = (-size_b0 & 0xFFFF8000) | CFG_OR_TIMING_FLASH |
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OR_CSNT_SAM | OR_ACS_DIV1;
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memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_PS_32 | BR_V;
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debug ("## BR0: 0x%08x OR0: 0x%08x\n",
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memctl->memc_br0, memctl->memc_or0);
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/* Re-do sizing to get full correct info */
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size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
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flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
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flash_info[0].size = size_b0;
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#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
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/* monitor protection ON by default */
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flash_protect(FLAG_PROTECT_SET,
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CFG_MONITOR_BASE,
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CFG_MONITOR_BASE+monitor_flash_len-1,
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&flash_info[0]);
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#endif
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#ifdef CFG_ENV_IS_IN_FLASH
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/* ENV protection ON by default */
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flash_protect(FLAG_PROTECT_SET,
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CFG_ENV_ADDR,
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CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
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&flash_info[0]);
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#endif
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if (size_b1) {
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memctl->memc_or1 = (-size_b1 & 0xFFFF8000) | CFG_OR_TIMING_FLASH |
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OR_CSNT_SAM | OR_ACS_DIV1;
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memctl->memc_br1 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
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BR_PS_32 | BR_V;
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debug ("## BR1: 0x%08x OR1: 0x%08x\n",
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memctl->memc_br1, memctl->memc_or1);
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/* Re-do sizing to get full correct info */
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size_b1 = flash_get_size((vu_long *)(CFG_FLASH_BASE + size_b0),
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&flash_info[1]);
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flash_info[1].size = size_b1;
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flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]);
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#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
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/* monitor protection ON by default */
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flash_protect(FLAG_PROTECT_SET,
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CFG_MONITOR_BASE,
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CFG_MONITOR_BASE+monitor_flash_len-1,
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&flash_info[1]);
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#endif
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#ifdef CFG_ENV_IS_IN_FLASH
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/* ENV protection ON by default */
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flash_protect(FLAG_PROTECT_SET,
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CFG_ENV_ADDR,
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CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
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&flash_info[1]);
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#endif
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} else {
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memctl->memc_br1 = 0; /* invalidate bank */
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memctl->memc_or1 = 0; /* invalidate bank */
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debug ("## DISABLE BR1: 0x%08x OR1: 0x%08x\n",
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memctl->memc_br1, memctl->memc_or1);
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flash_info[1].flash_id = FLASH_UNKNOWN;
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flash_info[1].sector_count = -1;
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flash_info[1].size = 0;
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}
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debug ("## Final Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
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return (size_b0 + size_b1);
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}
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/*-----------------------------------------------------------------------
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*/
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static void flash_get_offsets (ulong base, flash_info_t *info)
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{
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int i;
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if (info->flash_id == FLASH_UNKNOWN) {
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return;
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}
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switch (info->flash_id & FLASH_VENDMASK) {
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case FLASH_MAN_INTEL:
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for (i = 0; i < info->sector_count; i++) {
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info->start[i] = base;
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base += 0x00020000 * 2; /* 128k * 2 chips per bank */
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}
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return;
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default:
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printf ("Don't know sector ofsets for flash type 0x%lx\n",
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info->flash_id);
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return;
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}
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}
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/*-----------------------------------------------------------------------
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*/
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void flash_print_info (flash_info_t *info)
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{
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int i;
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("missing or unknown FLASH type\n");
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return;
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}
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switch (info->flash_id & FLASH_VENDMASK) {
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case FLASH_MAN_AMD: printf ("AMD "); break;
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case FLASH_MAN_FUJ: printf ("Fujitsu "); break;
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case FLASH_MAN_SST: printf ("SST "); break;
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case FLASH_MAN_STM: printf ("STM "); break;
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case FLASH_MAN_INTEL: printf ("Intel "); break;
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case FLASH_MAN_MT: printf ("MT "); break;
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default: printf ("Unknown Vendor "); break;
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}
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switch (info->flash_id & FLASH_TYPEMASK) {
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case FLASH_28F320J3A: printf ("28F320J3A (32Mbit = 128K x 32)\n");
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break;
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case FLASH_28F640J3A: printf ("28F640J3A (64Mbit = 128K x 64)\n");
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break;
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case FLASH_28F128J3A: printf ("28F128J3A (128Mbit = 128K x 128)\n");
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break;
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default: printf ("Unknown Chip Type\n");
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break;
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}
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if (info->size >= (1 << 20)) {
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i = 20;
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} else {
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i = 10;
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}
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printf (" Size: %ld %cB in %d Sectors\n",
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info->size >> i,
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(i == 20) ? 'M' : 'k',
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info->sector_count);
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printf (" Sector Start Addresses:");
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for (i=0; i<info->sector_count; ++i) {
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if ((i % 5) == 0)
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printf ("\n ");
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printf (" %08lX%s",
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info->start[i],
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info->protect[i] ? " (RO)" : " "
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);
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}
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printf ("\n");
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return;
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}
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/*-----------------------------------------------------------------------
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*/
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/*-----------------------------------------------------------------------
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*/
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/*
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* The following code cannot be run from FLASH!
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*/
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static ulong flash_get_size (vu_long *addr, flash_info_t *info)
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{
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ulong value;
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/* Read Manufacturer ID */
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addr[0] = 0x00900090;
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value = addr[0];
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debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
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switch (value) {
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case AMD_MANUFACT:
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info->flash_id = FLASH_MAN_AMD;
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break;
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case FUJ_MANUFACT:
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info->flash_id = FLASH_MAN_FUJ;
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break;
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case SST_MANUFACT:
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info->flash_id = FLASH_MAN_SST;
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break;
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case STM_MANUFACT:
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info->flash_id = FLASH_MAN_STM;
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break;
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case INTEL_MANUFACT:
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info->flash_id = FLASH_MAN_INTEL;
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break;
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default:
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info->flash_id = FLASH_UNKNOWN;
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info->sector_count = 0;
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|
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info->size = 0;
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addr[0] = 0x00FF00FF; /* restore read mode */
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return (0); /* no or unknown flash */
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}
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value = addr[1]; /* device ID */
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debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
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switch (value) {
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case INTEL_ID_28F320J3A:
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|
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info->flash_id += FLASH_28F320J3A;
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|
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info->sector_count = 32;
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|
|
info->size = 0x00400000 * 2;
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|
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break; /* => 8 MB */
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|
|
|
|
|
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case INTEL_ID_28F640J3A:
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|
|
info->flash_id += FLASH_28F640J3A;
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|
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info->sector_count = 64;
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|
|
info->size = 0x00800000 * 2;
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|
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break; /* => 16 MB */
|
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|
|
|
|
|
|
case INTEL_ID_28F128J3A:
|
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|
|
info->flash_id += FLASH_28F128J3A;
|
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|
|
info->sector_count = 128;
|
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|
|
info->size = 0x01000000 * 2;
|
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|
|
break; /* => 32 MB */
|
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|
|
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|
|
default:
|
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|
|
info->flash_id = FLASH_UNKNOWN;
|
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|
|
addr[0] = 0x00FF00FF; /* restore read mode */
|
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|
|
return (0); /* => no or unknown flash */
|
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|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
if (info->sector_count > CFG_MAX_FLASH_SECT) {
|
|
|
|
printf ("** ERROR: sector count %d > max (%d) **\n",
|
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|
|
info->sector_count, CFG_MAX_FLASH_SECT);
|
|
|
|
info->sector_count = CFG_MAX_FLASH_SECT;
|
|
|
|
}
|
|
|
|
|
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|
|
addr[0] = 0x00FF00FF; /* restore read mode */
|
|
|
|
|
|
|
|
return (info->size);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*-----------------------------------------------------------------------
|
|
|
|
*/
|
|
|
|
|
|
|
|
int flash_erase (flash_info_t *info, int s_first, int s_last)
|
|
|
|
{
|
|
|
|
int flag, prot, sect;
|
|
|
|
ulong start, now, last;
|
|
|
|
|
|
|
|
debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
|
|
|
|
|
|
|
|
if ((s_first < 0) || (s_first > s_last)) {
|
|
|
|
if (info->flash_id == FLASH_UNKNOWN) {
|
|
|
|
printf ("- missing\n");
|
|
|
|
} else {
|
|
|
|
printf ("- no sectors to erase\n");
|
|
|
|
}
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
|
|
|
|
printf ("Can erase only Intel flash types - aborted\n");
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
prot = 0;
|
|
|
|
for (sect=s_first; sect<=s_last; ++sect) {
|
|
|
|
if (info->protect[sect]) {
|
|
|
|
prot++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (prot) {
|
|
|
|
printf ("- Warning: %d protected sectors will not be erased!\n",
|
|
|
|
prot);
|
|
|
|
} else {
|
|
|
|
printf ("\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
start = get_timer (0);
|
|
|
|
last = start;
|
|
|
|
/* Start erase on unprotected sectors */
|
|
|
|
for (sect = s_first; sect<=s_last; sect++) {
|
|
|
|
if (info->protect[sect] == 0) { /* not protected */
|
|
|
|
vu_long *addr = (vu_long *)(info->start[sect]);
|
|
|
|
unsigned long status;
|
|
|
|
|
|
|
|
/* Disable interrupts which might cause a timeout here */
|
|
|
|
flag = disable_interrupts();
|
|
|
|
|
|
|
|
*addr = 0x00500050; /* clear status register */
|
|
|
|
*addr = 0x00200020; /* erase setup */
|
|
|
|
*addr = 0x00D000D0; /* erase confirm */
|
|
|
|
|
|
|
|
/* re-enable interrupts if necessary */
|
|
|
|
if (flag)
|
|
|
|
enable_interrupts();
|
|
|
|
|
|
|
|
/* wait at least 80us - let's wait 1 ms */
|
|
|
|
udelay (1000);
|
|
|
|
|
|
|
|
while (((status = *addr) & 0x00800080) != 0x00800080) {
|
|
|
|
if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
|
|
|
|
printf ("Timeout\n");
|
|
|
|
*addr = 0x00B000B0; /* suspend erase */
|
|
|
|
*addr = 0x00FF00FF; /* reset to read mode */
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* show that we're waiting */
|
|
|
|
if ((now - last) > 1000) { /* every second */
|
|
|
|
putc ('.');
|
|
|
|
last = now;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
*addr = 0x00FF00FF; /* reset to read mode */
|
|
|
|
}
|
|
|
|
}
|
|
|
|
printf (" done\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*-----------------------------------------------------------------------
|
|
|
|
* Copy memory to flash, returns:
|
|
|
|
* 0 - OK
|
|
|
|
* 1 - write timeout
|
|
|
|
* 2 - Flash not erased
|
|
|
|
* 4 - Flash not identified
|
|
|
|
*/
|
|
|
|
|
|
|
|
#define FLASH_WIDTH 4 /* flash bus width in bytes */
|
|
|
|
|
|
|
|
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
|
|
|
|
{
|
|
|
|
ulong cp, wp, data;
|
|
|
|
int i, l, rc;
|
|
|
|
|
|
|
|
if (info->flash_id == FLASH_UNKNOWN) {
|
|
|
|
return 4;
|
|
|
|
}
|
|
|
|
|
|
|
|
wp = (addr & ~(FLASH_WIDTH-1)); /* get lower FLASH_WIDTH aligned address */
|
|
|
|
|
|
|
|
/*
|
|
|
|
* handle unaligned start bytes
|
|
|
|
*/
|
|
|
|
if ((l = addr - wp) != 0) {
|
|
|
|
data = 0;
|
|
|
|
for (i=0, cp=wp; i<l; ++i, ++cp) {
|
|
|
|
data = (data << 8) | (*(uchar *)cp);
|
|
|
|
}
|
|
|
|
for (; i<FLASH_WIDTH && cnt>0; ++i) {
|
|
|
|
data = (data << 8) | *src++;
|
|
|
|
--cnt;
|
|
|
|
++cp;
|
|
|
|
}
|
|
|
|
for (; cnt==0 && i<FLASH_WIDTH; ++i, ++cp) {
|
|
|
|
data = (data << 8) | (*(uchar *)cp);
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((rc = write_data(info, wp, data)) != 0) {
|
|
|
|
return (rc);
|
|
|
|
}
|
|
|
|
wp += FLASH_WIDTH;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* handle FLASH_WIDTH aligned part
|
|
|
|
*/
|
|
|
|
while (cnt >= FLASH_WIDTH) {
|
|
|
|
data = 0;
|
|
|
|
for (i=0; i<FLASH_WIDTH; ++i) {
|
|
|
|
data = (data << 8) | *src++;
|
|
|
|
}
|
|
|
|
if ((rc = write_data(info, wp, data)) != 0) {
|
|
|
|
return (rc);
|
|
|
|
}
|
|
|
|
wp += FLASH_WIDTH;
|
|
|
|
cnt -= FLASH_WIDTH;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (cnt == 0) {
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* handle unaligned tail bytes
|
|
|
|
*/
|
|
|
|
data = 0;
|
|
|
|
for (i=0, cp=wp; i<FLASH_WIDTH && cnt>0; ++i, ++cp) {
|
|
|
|
data = (data << 8) | *src++;
|
|
|
|
--cnt;
|
|
|
|
}
|
|
|
|
for (; i<FLASH_WIDTH; ++i, ++cp) {
|
|
|
|
data = (data << 8) | (*(uchar *)cp);
|
|
|
|
}
|
|
|
|
|
|
|
|
return (write_data(info, wp, data));
|
|
|
|
}
|
|
|
|
|
|
|
|
/*-----------------------------------------------------------------------
|
|
|
|
* Write a word to Flash, returns:
|
|
|
|
* 0 - OK
|
|
|
|
* 1 - write timeout
|
|
|
|
* 2 - Flash not erased
|
|
|
|
*/
|
|
|
|
static int write_data (flash_info_t *info, ulong dest, ulong data)
|
|
|
|
{
|
|
|
|
vu_long *addr = (vu_long *)dest;
|
|
|
|
ulong status;
|
|
|
|
ulong start;
|
|
|
|
int flag;
|
|
|
|
|
|
|
|
/* Check if Flash is (sufficiently) erased */
|
|
|
|
if ((*addr & data) != data) {
|
|
|
|
return (2);
|
|
|
|
}
|
|
|
|
/* Disable interrupts which might cause a timeout here */
|
|
|
|
flag = disable_interrupts();
|
|
|
|
|
|
|
|
*addr = 0x00400040; /* write setup */
|
|
|
|
*addr = data;
|
|
|
|
|
|
|
|
/* re-enable interrupts if necessary */
|
|
|
|
if (flag)
|
|
|
|
enable_interrupts();
|
|
|
|
|
|
|
|
start = get_timer (0);
|
|
|
|
|
|
|
|
while (((status = *addr) & 0x00800080) != 0x00800080) {
|
|
|
|
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
|
|
|
|
*addr = 0x00FF00FF; /* restore read mode */
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
*addr = 0x00FF00FF; /* restore read mode */
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*-----------------------------------------------------------------------
|
|
|
|
*/
|