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/*
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* (C) Copyright 2005
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* Greg Ungerer <greg.ungerer@opengear.com>.
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_KS8695 1 /* it is a KS8695 CPU */
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#define CONFIG_CM41xx 1 /* it is an OpenGear CM41xx boad */
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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#define CONFIG_DRIVER_KS8695ETH /* use KS8695 ethernet driver */
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
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/*
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* Hardware drivers
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*/
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/*
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* select serial console configuration
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*/
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#define CONFIG_ENV_IS_NOWHERE
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#define CONFIG_KS8695_SERIAL
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#define CONFIG_SERIAL1
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_SAVEENV
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#define CONFIG_BOOTDELAY 0
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#define CONFIG_BOOTARGS "mem=32M console=ttyAM0,115200"
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#define CONFIG_BOOTCOMMAND "gofsk 0x02200000"
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT "boot > " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_MEMTEST_START 0x00800000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x01000000 /* 16 MB in DRAM */
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#define CONFIG_SYS_LOAD_ADDR 0x00008000 /* default load address */
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_SP_ADDR 0x00020000 /* lowest 128k of RAM */
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#define PHYS_FLASH_1 0x02000000 /* Flash Bank #1 */
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#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
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#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
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/* timeout values are in ticks */
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#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
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#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
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#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment */
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#endif /* __CONFIG_H */
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