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/*
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* Copyright (C) 2005-2006 Atmel Corporation
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __AT32AP7000_HARDWARE_H__
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#define __AT32AP7000_HARDWARE_H__
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/* Internal and external memories */
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#define EBI_SRAM_CS0_BASE 0x00000000
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#define EBI_SRAM_CS0_SIZE 0x04000000
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#define EBI_SRAM_CS4_BASE 0x04000000
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#define EBI_SRAM_CS4_SIZE 0x04000000
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#define EBI_SRAM_CS2_BASE 0x08000000
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#define EBI_SRAM_CS2_SIZE 0x04000000
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#define EBI_SRAM_CS3_BASE 0x0c000000
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#define EBI_SRAM_CS3_SIZE 0x04000000
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#define EBI_SRAM_CS1_BASE 0x10000000
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#define EBI_SRAM_CS1_SIZE 0x10000000
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#define EBI_SRAM_CS5_BASE 0x20000000
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#define EBI_SRAM_CS5_SIZE 0x04000000
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#define EBI_SDRAM_BASE EBI_SRAM_CS1_BASE
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#define EBI_SDRAM_SIZE EBI_SRAM_CS1_SIZE
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#define INTERNAL_SRAM_BASE 0x24000000
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#define INTERNAL_SRAM_SIZE 0x00008000
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/* Devices on the High Speed Bus (HSB) */
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#define LCDC_BASE 0xFF000000
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#define DMAC_BASE 0xFF200000
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#define USB_FIFO 0xFF300000
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/* Devices on Peripheral Bus A (PBA) */
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#define ATMEL_BASE_SPI0 0xFFE00000
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#define ATMEL_BASE_SPI1 0xFFE00400
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#define ATMEL_BASE_TWI0 0xFFE00800
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#define ATMEL_BASE_USART0 0xFFE00C00
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#define ATMEL_BASE_USART1 0xFFE01000
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#define ATMEL_BASE_USART2 0xFFE01400
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#define ATMEL_BASE_USART3 0xFFE01800
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#define ATMEL_BASE_SSC0 0xFFE01C00
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#define ATMEL_BASE_SSC1 0xFFE02000
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#define ATMEL_BASE_SSC2 0xFFE02400
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#define ATMEL_BASE_PIOA 0xFFE02800
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#define ATMEL_BASE_PIOB 0xFFE02C00
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#define ATMEL_BASE_PIOC 0xFFE03000
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#define ATMEL_BASE_PIOD 0xFFE03400
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#define ATMEL_BASE_PIOE 0xFFE03800
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#define ATMEL_BASE_PSIF 0xFFE03C00
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/* Devices on Peripheral Bus B (PBB) */
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#define ATMEL_BASE_SM 0xFFF00000
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#define ATMEL_BASE_INTC 0xFFF00400
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#define ATMEL_BASE_HMATRIX 0xFFF00800
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#define ATMEL_BASE_TIMER0 0xFFF00C00
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#define ATMEL_BASE_TIMER1 0xFFF01000
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#define ATMEL_BASE_PWM 0xFFF01400
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#define ATMEL_BASE_MACB0 0xFFF01800
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#define ATMEL_BASE_MACB1 0xFFF01C00
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#define ATMEL_BASE_DAC 0xFFF02000
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#define ATMEL_BASE_MMCI 0xFFF02400
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#define ATMEL_BASE_AUDIOC 0xFFF02800
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#define ATMEL_BASE_HISI 0xFFF02C00
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#define ATMEL_BASE_USB 0xFFF03000
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#define ATMEL_BASE_HSMC 0xFFF03400
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#define ATMEL_BASE_HSDRAMC 0xFFF03800
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#define ATMEL_BASE_ECC 0xFFF03C00
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#endif /* __AT32AP7000_HARDWARE_H__ */
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