upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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97 lines
3.3 KiB
97 lines
3.3 KiB
17 years ago
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/*
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* (C) Copyright 2008
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* Martha J Marx, Silicon Turnkey Express, mmarx@silicontkx.com
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* mpc512x I/O pin/pad initialization for the ADS5121 board
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <linux/types.h>
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#include "iopin.h"
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/*
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* IO PAD TYPES
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* for all types fmux is used to select the funtion
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* ds sets the slew rate
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* STD pins nothing extra (can set ds & fmux only)
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* STD_PU pue=1 to enable pull & pud sets whether up or down resistors
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* STD_ST st sets the Schmitt trigger
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* STD_PU_ST pue & pud sets pull-up/down resistors as in STD_PU
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* st sets the Schmitt trigger
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* PCI hold sets output delay
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* PCI_ST hold sets output delay and st sets the Schmitt trigger
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*/
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static struct iopin_t {
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u_short p_offset; /* offset from IOCTL_MEM_OFFSET */
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u_short p_no; /* number of pins to set this way */
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u_short bit_or:7; /* Do bitwise OR instead of setting */
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u_short fmux:2; /* pad function select 0-3 */
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u_short hold:2; /* PCI pad types only; */
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u_short pud:1; /* pull resistor; PU types only; */
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/* if pue=1 then 0=pull-down, 1=pull-up */
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u_short pue:1; /* Pull resistor enable; _PU types only */
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u_short st:1; /* Schmitt trigger enable; _ST types only */
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u_short ds:2; /* Slew rate class, 0=class1, ..., 3=class4 */
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} ioregs_init[] = {
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/* FUNC1=FEC_RX_DV Sets Next 3 to FEC pads */
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{IOCTL_SPDIF_TXCLK, 3, 0, 1, 0, 0, 0, 0, 3},
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/* Set highest Slew on 9 PATA pins */
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{IOCTL_PATA_CE1, 9, 1, 0, 0, 0, 0, 0, 3},
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/* FUNC1=FEC_COL Sets Next 15 to FEC pads */
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{IOCTL_PSC0_0, 15, 0, 1, 0, 0, 0, 0, 3},
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/* FUNC1=SPDIF_TXCLK */
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{IOCTL_LPC_CS1, 1, 0, 1, 0, 0, 0, 1, 3},
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/* FUNC2=SPDIF_TX and sets Next pin to SPDIF_RX */
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{IOCTL_I2C1_SCL, 2, 0, 2, 0, 0, 0, 1, 3},
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/* FUNC2=DIU CLK */
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{IOCTL_PSC6_0, 1, 0, 2, 0, 0, 0, 1, 3},
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/* FUNC2=DIU_HSYNC */
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{IOCTL_PSC6_1, 1, 0, 2, 0, 0, 0, 0, 3},
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/* FUNC2=DIUVSYNC Sets Next 26 to DIU Pads */
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{IOCTL_PSC6_4, 26, 0, 2, 0, 0, 0, 0, 3}
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};
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void iopin_initialize(void)
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{
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short i, j, n, p;
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u_long *reg;
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if (sizeof(ioregs_init) == 0)
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return;
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immap_t *im = (immap_t *)CFG_IMMR;
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reg = (u_long *)&(im->io_ctrl.regs[0]);
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n = sizeof(ioregs_init) / sizeof(ioregs_init[0]);
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for (i = 0; i < n; i++) {
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for (p = 0, j = ioregs_init[i].p_offset / sizeof(u_long);
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p < ioregs_init[i].p_no; p++, j++) {
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/* lowest 9 bits sets the register */
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if (ioregs_init[i].bit_or)
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reg[j] |= *((u_long *) &ioregs_init[i].p_no)
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& 0x000001ff;
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else
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reg[j] = *((u_long *) &ioregs_init[i].p_no)
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& 0x000001ff;
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}
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}
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return;
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}
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