upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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94 lines
3.1 KiB
94 lines
3.1 KiB
22 years ago
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/*
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* (C) Copyright 2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* This file is based on code
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* (C) Copyright Motorola, Inc., 2000
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*
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* odin smartdma header file
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*/
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#ifndef __MPC5XXX_SDMA_H
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#define __MPC5XXX_SDMA_H
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#include <common.h>
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#include <mpc5xxx.h>
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/* Task number assignment */
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#define FEC_RECV_TASK_NO 0
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#define FEC_XMIT_TASK_NO 1
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/*---------------------------------------------------------------------*/
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/* Stuff for Ethernet Tx/Rx tasks */
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/*---------------------------------------------------------------------*/
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/* Layout of Ethernet controller Parameter SRAM area:
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----------------------------------------------------------------
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0x00: TBD_BASE, base address of TX BD ring
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0x04: TBD_NEXT, address of next TX BD to be processed
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0x08: RBD_BASE, base address of RX BD ring
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0x0C: RBD_NEXT, address of next RX BD to be processed
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---------------------------------------------------------------
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ALL PARAMETERS ARE ALL LONGWORDS (FOUR BYTES EACH).
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*/
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/* base address of SRAM area to store parameters used by Ethernet tasks */
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#define FEC_PARAM_BASE (MPC5XXX_SRAM + 0x0800)
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/* base address of SRAM area for buffer descriptors */
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#define FEC_BD_BASE (MPC5XXX_SRAM + 0x0820)
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/*---------------------------------------------------------------------*/
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/* common shortcuts used by driver C code */
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/*---------------------------------------------------------------------*/
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/* Disable SmartDMA task */
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#define SDMA_TASK_DISABLE(tasknum) \
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{ \
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volatile ushort *tcr = (ushort *)(MPC5XXX_SDMA + 0x0000001c + 2 * tasknum); \
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*tcr = (*tcr) & (~0x8000); \
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}
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/* Enable SmartDMA task */
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#define SDMA_TASK_ENABLE(tasknum) \
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{ \
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volatile ushort *tcr = (ushort *) (MPC5XXX_SDMA + 0x0000001c + 2 * tasknum); \
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*tcr = (*tcr) | 0x8000; \
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}
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/* Enable interrupt */
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#define SDMA_INT_ENABLE(tasknum) \
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{ \
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struct mpc5xxx_sdma *sdma = (struct mpc5xxx_sdma *)MPC5XXX_SDMA; \
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sdma->IntMask &= ~(1 << tasknum); \
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}
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/* Disable interrupt */
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#define SDMA_INT_DISABLE(tasknum) \
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{ \
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struct mpc5xxx_sdma *sdma = (struct mpc5xxx_sdma *)MPC5XXX_SDMA; \
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sdma->IntMask |= (1 << tasknum); \
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}
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/* Clear interrupt pending bits */
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#define SDMA_CLEAR_IEVENT(tasknum) \
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{ \
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struct mpc5xxx_sdma *sdma = (struct mpc5xxx_sdma *)MPC5XXX_SDMA; \
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sdma->IntPend = (1 << tasknum); \
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}
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/* get interupt pending bit of a task */
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#define SDMA_GET_PENDINGBIT(tasknum) \
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((*(vu_long *)(MPC5XXX_SDMA + 0x14)) & (1<<(tasknum)))
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/* get interupt mask bit of a task */
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#define SDMA_GET_MASKBIT(tasknum) \
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((*(vu_long *)(MPC5XXX_SDMA + 0x18)) & (1<<(tasknum)))
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#endif /* __MPC5XXX_SDMA_H */
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