upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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55 lines
1.5 KiB
55 lines
1.5 KiB
11 years ago
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/* This file is generated by Preloader Generator */
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#ifndef _PRELOADER_PINMUX_CONFIG_H_
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#define _PRELOADER_PINMUX_CONFIG_H_
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/*
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* State of enabling for which IP connected out through the muxing.
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* Value 1 mean the IP connection is muxed out
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*/
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#define CONFIG_HPS_EMAC0 (0)
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#define CONFIG_HPS_EMAC1 (1)
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#define CONFIG_HPS_USB0 (0)
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#define CONFIG_HPS_USB1 (1)
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#define CONFIG_HPS_NAND (0)
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#define CONFIG_HPS_SDMMC (1)
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#define CONFIG_HPS_QSPI (1)
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#define CONFIG_HPS_UART0 (1)
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#define CONFIG_HPS_UART1 (0)
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#define CONFIG_HPS_TRACE (1)
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#define CONFIG_HPS_I2C0 (1)
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#define CONFIG_HPS_I2C1 (0)
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#define CONFIG_HPS_I2C2 (0)
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#define CONFIG_HPS_I2C3 (0)
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#define CONFIG_HPS_SPIM0 (1)
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#define CONFIG_HPS_SPIM1 (0)
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#define CONFIG_HPS_SPIS0 (0)
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#define CONFIG_HPS_SPIS1 (0)
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#define CONFIG_HPS_CAN0 (1)
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#define CONFIG_HPS_CAN1 (0)
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/* IP attribute value (which affected by pin muxing configuration) */
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#define CONFIG_HPS_SDMMC_BUSWIDTH (4)
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/* 1 if the pins are connected out */
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#define CONFIG_HPS_QSPI_CS0 (1)
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#define CONFIG_HPS_QSPI_CS1 (0)
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#define CONFIG_HPS_QSPI_CS2 (0)
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#define CONFIG_HPS_QSPI_CS3 (0)
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/* UART */
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/* 1 means the pin is mux out or available */
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#define CONFIG_HPS_UART0_TX (1)
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#define CONFIG_HPS_UART0_RX (1)
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#define CONFIG_HPS_UART0_CTS (0)
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#define CONFIG_HPS_UART0_RTS (0)
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#define CONFIG_HPS_UART1_TX (0)
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#define CONFIG_HPS_UART1_RX (0)
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#define CONFIG_HPS_UART1_CTS (0)
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#define CONFIG_HPS_UART1_RTS (0)
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/* Pin mux data */
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#define CONFIG_HPS_PINMUX_NUM (207)
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#endif /* _PRELOADER_PINMUX_CONFIG_H_ */
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