upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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38 lines
633 B
38 lines
633 B
8 years ago
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/*
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* Copyright (C) 2014 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <pch.h>
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#define SBASE_ADDR 0x54
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static int pch9_get_sbase(struct udevice *dev, ulong *sbasep)
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{
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uint32_t sbase_addr;
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dm_pci_read_config32(dev, SBASE_ADDR, &sbase_addr);
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*sbasep = sbase_addr & 0xfffffe00;
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return 0;
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}
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static const struct pch_ops pch9_ops = {
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.get_sbase = pch9_get_sbase,
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};
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static const struct udevice_id pch9_ids[] = {
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{ .compatible = "intel,pch9" },
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{ }
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};
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U_BOOT_DRIVER(pch9_drv) = {
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.name = "intel-pch9",
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.id = UCLASS_PCH,
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.of_match = pch9_ids,
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.ops = &pch9_ops,
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};
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