upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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72 lines
2.1 KiB
72 lines
2.1 KiB
16 years ago
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/*
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* (C) Copyright 2002
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* Lineo, Inc. <www.lineo.com>
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* Bernhard Kuhn <bkuhn@lineo.com>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Alex Zuepke <azu@sysgo.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/arch/hardware.h>
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void board_reset(void) __attribute__((__weak__));
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/*
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* Reset the cpu by setting up the watchdog timer and let him time out
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* or toggle a GPIO pin on the AT91RM9200DK board
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*/
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void reset_cpu (ulong ignored)
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{
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#if defined(CONFIG_AT91RM9200_USART)
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/*shutdown the console to avoid strange chars during reset */
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serial_exit();
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#endif
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if (board_reset)
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board_reset();
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/* this is the way Linux does it */
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/* FIXME:
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* These defines should be moved into
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* include/asm-arm/arch-at91rm9200/AT91RM9200.h
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* as soon as the whitespace fix gets applied.
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*/
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#define AT91C_ST_RSTEN (0x1 << 16)
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#define AT91C_ST_EXTEN (0x1 << 17)
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#define AT91C_ST_WDRST (0x1 << 0)
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#define ST_WDMR *((unsigned long *)0xfffffd08) /* watchdog mode register */
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#define ST_CR *((unsigned long *)0xfffffd00) /* system clock control register */
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ST_WDMR = AT91C_ST_RSTEN | AT91C_ST_EXTEN | 1 ;
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ST_CR = AT91C_ST_WDRST;
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while (1);
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/* Never reached */
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}
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