upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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104 lines
2.5 KiB
104 lines
2.5 KiB
22 years ago
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/*
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* (C) Copyright 2000-2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* CPU specific code for the MPC5xxx CPUs
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <command.h>
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#include <mpc5xxx.h>
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#include <asm/processor.h>
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int checkcpu (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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ulong clock = gd->cpu_clk;
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char buf[32];
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puts ("CPU: ");
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printf (CPU_ID_STR);
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printf (" (JTAG ID %08lx)", *(vu_long *)MPC5XXX_CDM_JTAGID);
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printf (" at %s MHz\n", strmhz (buf, clock));
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return 0;
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}
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/* ------------------------------------------------------------------------- */
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int
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do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
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{
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ulong msr, addr;
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*(vu_long *)MPC5XXX_CDM_SRESET &= ~(1 << 16); /* Checkstop Reset enable */
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/* Interrupts and MMU off */
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__asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
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msr &= ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR);
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__asm__ __volatile__ ("mtmsr %0"::"r" (msr));
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/*
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* Trying to execute the next instruction at a non-existing address
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* should cause a machine check, resulting in reset
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*/
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#ifdef CFG_RESET_ADDRESS
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addr = CFG_RESET_ADDRESS;
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#else
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/*
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* note: when CFG_MONITOR_BASE points to a RAM address, CFG_MONITOR_BASE
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* - sizeof (ulong) is usually a valid address. Better pick an address
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* known to be invalid on your system and assign it to CFG_RESET_ADDRESS.
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*/
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addr = CFG_MONITOR_BASE - sizeof (ulong);
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#endif
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((void (*)(void)) addr) ();
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return 1;
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}
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/* ------------------------------------------------------------------------- */
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/*
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* Get timebase clock frequency (like cpu_clk in Hz)
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*
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*/
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unsigned long get_tbclk (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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ulong tbclk;
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tbclk = (gd->bus_clk + 3L) / 4L;
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return (tbclk);
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}
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/* ------------------------------------------------------------------------- */
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