upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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231 lines
4.0 KiB
231 lines
4.0 KiB
20 years ago
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/*
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* (C) Copyright 2004
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* Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <asm/arch/pxa-regs.h>
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#define LTC1663_ADDR 0x20
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#define LTC1663_SY 0x01 /* Sync ACK */
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#define LTC1663_SD 0x04 /* shutdown */
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#define LTC1663_BG 0x04 /* Internal Voltage Ref */
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#define VOLT_1_55 18 /* DAC value for 1.55V */
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.global initPXAvoltage
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@ Set the voltage to 1.55V early in the boot process so we can run
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@ at a high clock speed and boot quickly. Note that this is necessary
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@ because the reset button does not reset the CPU voltage, so if the
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@ voltage was low (say 0.85V) then the CPU would crash without this
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@ routine
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@ This routine clobbers r0-r4
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initializei2c:
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ldr r2, =CKEN
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ldr r3, [r2]
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orr r3, r3, #CKEN15_PWRI2C
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str r3, [r2]
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ldr r2, =PCFR
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ldr r3, [r2]
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orr r3, r3, #PCFR_PI2C_EN
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str r3, [r2]
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/* delay for about 250msec
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*/
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ldr r3, =OSCR
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mov r2, #0
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str r2, [r3]
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ldr r1, =0xC0000
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1:
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ldr r2, [r3]
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cmp r1, r2
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bgt 1b
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ldr r0, =PWRICR
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ldr r1, [r0]
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bic r1, r1, #(ICR_MA | ICR_START | ICR_STOP)
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str r1, [r0]
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orr r1, r1, #ICR_UR
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str r1, [r0]
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ldr r2, =PWRISR
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ldr r3, =0x7ff
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str r3, [r2]
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bic r1, r1, #ICR_UR
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str r1, [r0]
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mov r1, #(ICR_GCD | ICR_SCLE)
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str r1, [r0]
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orr r1, r1, #ICR_IUE
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str r1, [r0]
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orr r1, r1, #ICR_FM
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str r1, [r0]
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/* delay for about 1msec
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*/
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ldr r3, =OSCR
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mov r2, #0
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str r2, [r3]
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ldr r1, =0xC00
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1:
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ldr r2, [r3]
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cmp r1, r2
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bgt 1b
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mov pc, lr
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sendbytei2c:
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ldr r3, =PWRIDBR
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str r0, [r3]
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ldr r3, =PWRICR
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ldr r0, [r3]
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orr r0, r0, r1
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bic r0, r0, r2
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str r0, [r3]
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orr r0, r0, #ICR_TB
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str r0, [r3]
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mov r2, #0x100000
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waitfortxemptyi2c:
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ldr r0, =PWRISR
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ldr r1, [r0]
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/* take it from the top if we don't get empty after a while */
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subs r2, r2, #1
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moveq lr, r4
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beq initPXAvoltage
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tst r1, #ISR_ITE
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beq waitfortxemptyi2c
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orr r1, r1, #ISR_ITE
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str r1, [r0]
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mov pc, lr
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initPXAvoltage:
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mov r4, lr
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bl setleds
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bl initializei2c
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bl setleds
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/* now send the real message to set the correct voltage */
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ldr r0, =LTC1663_ADDR
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mov r0, r0, LSL #1
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mov r1, #ICR_START
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ldr r2, =(ICR_STOP | ICR_ALDIE | ICR_ACKNAK)
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bl sendbytei2c
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bl setleds
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mov r0, #LTC1663_BG
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mov r1, #0
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mov r2, #(ICR_STOP | ICR_START)
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bl sendbytei2c
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bl setleds
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ldr r0, =VOLT_1_55
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and r0, r0, #0xff
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mov r1, #0
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mov r2, #(ICR_STOP | ICR_START)
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bl sendbytei2c
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bl setleds
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ldr r0, =VOLT_1_55
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mov r0, r0, ASR #8
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and r0, r0, #0xff
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mov r1, #ICR_STOP
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mov r2, #ICR_START
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bl sendbytei2c
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bl setleds
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@ delay a little for the volatage to stablize
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ldr r3, =OSCR
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mov r2, #0
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str r2, [r3]
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ldr r1, =0xC0
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1:
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ldr r2, [r3]
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cmp r1, r2
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bgt 1b
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mov pc, r4
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setleds:
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mov pc, lr
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ldr r5, =0x40e00058
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ldr r3, [r5]
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bic r3, r3, #0x3
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str r3, [r5]
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ldr r5, =0x40e0000c
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ldr r3, [r5]
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orr r3, r3, #0x00010000
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str r3, [r5]
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@ inner loop
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mov r0, #0x2
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1:
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ldr r5, =0x40e00018
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mov r3, #0x00010000
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str r3, [r5]
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@ outer loop
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mov r3, #0x00F00000
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2:
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subs r3, r3, #1
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bne 2b
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ldr r5, =0x40e00024
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mov r3, #0x00010000
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str r3, [r5]
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@ outer loop
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mov r3, #0x00F00000
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3:
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subs r3, r3, #1
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bne 3b
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subs r0, r0, #1
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bne 1b
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mov pc, lr
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