upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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26 lines
650 B
26 lines
650 B
22 years ago
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/*
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* The GENIETV is using the following physical memorymap (copied from
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* the FADS configuration):
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*
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* ff020000 -> ff02ffff : pcmcia
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* ff010000 -> ff01ffff : BCSR connected to CS1, setup by 8xxROM
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* ff000000 -> ff00ffff : IMAP internal in the cpu
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* 02800000 -> 0287ffff : flash connected to CS0
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* 00000000 -> nnnnnnnn : sdram setup by U-Boot
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*
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* CS pins are connected as follows:
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*
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* CS0 -512Kb boot flash
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* CS1 - SDRAM #1
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* CS2 - SDRAM #2
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* CS3 - Flash #1
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* CS4 - Flash #2
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* CS5 - LON (if present)
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* CS6 - PCMCIA #1
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* CS7 - PCMCIA #2
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*
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* Ports are configured as follows:
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*
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* PA7 - SDRAM banks enable
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*/
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