upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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6952 lines
158 KiB
6952 lines
158 KiB
8 years ago
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CONFIG_16BIT
|
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|
CONFIG_33
|
||
|
CONFIG_400MHZ_MODE
|
||
|
CONFIG_405
|
||
|
CONFIG_405EP
|
||
|
CONFIG_405EX
|
||
|
CONFIG_405EX_CHIP21_ECID3_REV_D
|
||
|
CONFIG_405EX_CHIP21_PVR_REV_C
|
||
|
CONFIG_405EX_CHIP21_PVR_REV_D
|
||
|
CONFIG_405EZ
|
||
|
CONFIG_405GP
|
||
|
CONFIG_440
|
||
|
CONFIG_440EP
|
||
|
CONFIG_440EPX
|
||
|
CONFIG_440GP
|
||
|
CONFIG_440GR
|
||
|
CONFIG_440GRX
|
||
|
CONFIG_440GX
|
||
|
CONFIG_440SP
|
||
|
CONFIG_440SPE
|
||
|
CONFIG_440SPE_REVA
|
||
|
CONFIG_440_GX
|
||
|
CONFIG_4430SDP
|
||
|
CONFIG_460EX
|
||
|
CONFIG_460GT
|
||
|
CONFIG_460SX
|
||
|
CONFIG_4xx_CONFIG_BLOCKSIZE
|
||
|
CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR
|
||
|
CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET
|
||
|
CONFIG_4xx_DCACHE
|
||
|
CONFIG_521X
|
||
|
CONFIG_533MHZ_MODE
|
||
|
CONFIG_5xx_CONS_SCI1
|
||
|
CONFIG_5xx_CONS_SCI2
|
||
|
CONFIG_5xx_GCLK_FREQ
|
||
|
CONFIG_64BIT_PHYS_ADDR
|
||
|
CONFIG_66
|
||
|
CONFIG_8260_CLKIN
|
||
|
CONFIG_8349_CLKIN
|
||
|
CONFIG_83XX
|
||
|
CONFIG_83XX_CLKIN
|
||
|
CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES
|
||
|
CONFIG_83XX_PCICLK
|
||
|
CONFIG_83XX_PCI_STREAMING
|
||
|
CONFIG_88F5182
|
||
|
CONFIG_8xx_CONS_NONE
|
||
|
CONFIG_8xx_CONS_SCCx
|
||
|
CONFIG_8xx_CONS_SMC1
|
||
|
CONFIG_8xx_CONS_SMC2
|
||
|
CONFIG_8xx_CONS_SMCx
|
||
|
CONFIG_8xx_CPUCLK_DEFAULT
|
||
|
CONFIG_8xx_GCLK_FREQ
|
||
|
CONFIG_8xx_OSCLK
|
||
|
CONFIG_A003399_NOR_WORKAROUND
|
||
|
CONFIG_A008044_WORKAROUND
|
||
|
CONFIG_A3M071
|
||
|
CONFIG_A4M072
|
||
|
CONFIG_A4M2K
|
||
|
CONFIG_AC14XX
|
||
|
CONFIG_ACADIA
|
||
|
CONFIG_ACX517AKN
|
||
|
CONFIG_ACX544AKN
|
||
|
CONFIG_ADCIOP
|
||
|
CONFIG_ADDMISC
|
||
|
CONFIG_ADDRESS
|
||
|
CONFIG_ADDR_AUTO_INCR_BIT
|
||
|
CONFIG_ADDR_MAP
|
||
|
CONFIG_ADDR_STREAMING
|
||
|
CONFIG_ADI_GPIO1
|
||
|
CONFIG_ADI_GPIO2
|
||
|
CONFIG_ADNPESC1
|
||
|
CONFIG_ADP_AG101P
|
||
|
CONFIG_AEABI
|
||
|
CONFIG_AEMIF_CNTRL_BASE
|
||
|
CONFIG_AES
|
||
|
CONFIG_ALTERA_SDRAM
|
||
|
CONFIG_ALTERA_SPI_IDLE_VAL
|
||
|
CONFIG_ALTIVEC
|
||
|
CONFIG_ALT_LB_ADDR
|
||
|
CONFIG_ALT_LH_ADDR
|
||
|
CONFIG_ALU
|
||
|
CONFIG_AM335X_LCD
|
||
|
CONFIG_AM335X_USB0
|
||
|
CONFIG_AM335X_USB0_MODE
|
||
|
CONFIG_AM335X_USB1
|
||
|
CONFIG_AM335X_USB1_MODE
|
||
|
CONFIG_AM437X_USB2PHY2_HOST
|
||
|
CONFIG_AMBAPP_IOAREA
|
||
|
CONFIG_AMCC_DEF_ENV
|
||
|
CONFIG_AMCC_DEF_ENV_NOR_UPD
|
||
|
CONFIG_AMCC_DEF_ENV_POWERPC
|
||
|
CONFIG_AMCC_DEF_ENV_PPC
|
||
|
CONFIG_AMCC_DEF_ENV_PPC_OLD
|
||
|
CONFIG_AMCC_DEF_ENV_ROOTPATH
|
||
|
CONFIG_AMCORE
|
||
|
CONFIG_AMIGA_PARTITION
|
||
|
CONFIG_ANDES_PCU
|
||
|
CONFIG_ANDES_PCU_BASE
|
||
|
CONFIG_AP325RXA
|
||
|
CONFIG_APBH_DMA
|
||
|
CONFIG_APBH_DMA_BURST
|
||
|
CONFIG_APBH_DMA_BURST8
|
||
|
CONFIG_APER_0_BASE
|
||
|
CONFIG_APER_1_BASE
|
||
|
CONFIG_APER_SIZE
|
||
|
CONFIG_API
|
||
|
CONFIG_APUS_FAST_EXCEPT
|
||
|
CONFIG_AP_SH4A_4A
|
||
|
CONFIG_ARCH_ADPAG101P
|
||
|
CONFIG_ARCH_CPU_INIT
|
||
|
CONFIG_ARCH_CSB226
|
||
|
CONFIG_ARCH_HAS_ILOG2_U32
|
||
|
CONFIG_ARCH_HAS_ILOG2_U64
|
||
|
CONFIG_ARCH_INNOKOM
|
||
|
CONFIG_ARCH_KIRKWOOD
|
||
|
CONFIG_ARCH_LUBBOCK
|
||
|
CONFIG_ARCH_MAP_SYSMEM
|
||
|
CONFIG_ARCH_OMAP4
|
||
|
CONFIG_ARCH_ORION5X
|
||
|
CONFIG_ARCH_PLEB
|
||
|
CONFIG_ARCH_PXA_CERF
|
||
|
CONFIG_ARCH_PXA_IDP
|
||
|
CONFIG_ARCH_RMOBILE_BOARD_STRING
|
||
|
CONFIG_ARCH_RMOBILE_EXTRAM_BOOT
|
||
|
CONFIG_ARCH_TEGRA
|
||
|
CONFIG_ARCH_USE_BUILTIN_BSWAP
|
||
|
CONFIG_ARC_MMU_VER
|
||
|
CONFIG_ARC_SERIAL
|
||
|
CONFIG_ARC_UART_BASE
|
||
|
CONFIG_ARIA
|
||
|
CONFIG_ARIA_FPGA
|
||
|
CONFIG_ARM926EJS
|
||
|
CONFIG_ARMADA100
|
||
|
CONFIG_ARMADA100_FEC
|
||
|
CONFIG_ARMADA168
|
||
|
CONFIG_ARMADA_39X
|
||
|
CONFIG_ARMCORTEXA9
|
||
|
CONFIG_ARMV7_PSCI_1_0
|
||
|
CONFIG_ARMV7_SECURE_BASE
|
||
|
CONFIG_ARMV7_SECURE_MAX_SIZE
|
||
|
CONFIG_ARMV7_SECURE_RESERVE_SIZE
|
||
|
CONFIG_ARMV8_SWITCH_TO_EL1
|
||
|
CONFIG_ARM_ARCH_CP15_ERRATA
|
||
|
CONFIG_ARM_ASM_UNIFIED
|
||
|
CONFIG_ARM_DCC
|
||
|
CONFIG_ARM_ERRATA_430973
|
||
|
CONFIG_ARM_ERRATA_454179
|
||
|
CONFIG_ARM_ERRATA_621766
|
||
|
CONFIG_ARM_ERRATA_716044
|
||
|
CONFIG_ARM_ERRATA_742230
|
||
|
CONFIG_ARM_ERRATA_743622
|
||
|
CONFIG_ARM_ERRATA_751472
|
||
|
CONFIG_ARM_ERRATA_761320
|
||
|
CONFIG_ARM_ERRATA_773022
|
||
|
CONFIG_ARM_ERRATA_774769
|
||
|
CONFIG_ARM_ERRATA_794072
|
||
|
CONFIG_ARM_ERRATA_798870
|
||
|
CONFIG_ARM_ERRATA_801819
|
||
|
CONFIG_ARM_ERRATA_826974
|
||
|
CONFIG_ARM_ERRATA_828024
|
||
|
CONFIG_ARM_ERRATA_829520
|
||
|
CONFIG_ARM_ERRATA_833069
|
||
|
CONFIG_ARM_ERRATA_833471
|
||
|
CONFIG_ARM_FREQ
|
||
|
CONFIG_ARM_GIC_BASE_ADDRESS
|
||
|
CONFIG_ARM_PL180_MMCI
|
||
|
CONFIG_ARM_PL180_MMCI_BASE
|
||
|
CONFIG_ARM_PL180_MMCI_CLOCK_FREQ
|
||
|
CONFIG_ARM_THUMB
|
||
|
CONFIG_ARP_TIMEOUT
|
||
|
CONFIG_AS3722_POWER
|
||
|
CONFIG_ASTRO5373L
|
||
|
CONFIG_ASTRO_COFDMDUOS2
|
||
|
CONFIG_ASTRO_TWIN7S2
|
||
|
CONFIG_ASTRO_V512
|
||
|
CONFIG_ASTRO_V532
|
||
|
CONFIG_ASTRO_V912
|
||
|
CONFIG_AT32AP
|
||
|
CONFIG_AT32AP7000
|
||
|
CONFIG_AT32UC3A0xxx
|
||
|
CONFIG_AT91C_PQFP_UHPBUG
|
||
|
CONFIG_AT91FAMILY
|
||
|
CONFIG_AT91RESET_EXTRST
|
||
|
CONFIG_AT91RM9200
|
||
|
CONFIG_AT91RM9200EK
|
||
|
CONFIG_AT91SAM9260
|
||
|
CONFIG_AT91SAM9260EK
|
||
|
CONFIG_AT91SAM9261
|
||
|
CONFIG_AT91SAM9261EK
|
||
|
CONFIG_AT91SAM9263
|
||
|
CONFIG_AT91SAM9263EK
|
||
|
CONFIG_AT91SAM9G10
|
||
|
CONFIG_AT91SAM9G10EK
|
||
|
CONFIG_AT91SAM9G20
|
||
|
CONFIG_AT91SAM9G20EK
|
||
|
CONFIG_AT91SAM9G20EK_2MMC
|
||
|
CONFIG_AT91SAM9G45
|
||
|
CONFIG_AT91SAM9G45EKES
|
||
|
CONFIG_AT91SAM9G45_LCD_BASE
|
||
|
CONFIG_AT91SAM9M10G45
|
||
|
CONFIG_AT91SAM9M10G45EK
|
||
|
CONFIG_AT91SAM9N12
|
||
|
CONFIG_AT91SAM9RL
|
||
|
CONFIG_AT91SAM9RLEK
|
||
|
CONFIG_AT91SAM9X5
|
||
|
CONFIG_AT91SAM9X5EK
|
||
|
CONFIG_AT91SAM9XE
|
||
|
CONFIG_AT91SAM9_WATCHDOG
|
||
|
CONFIG_AT91_CAN
|
||
|
CONFIG_AT91_EFLASH
|
||
|
CONFIG_AT91_GPIO
|
||
|
CONFIG_AT91_GPIO_PULLUP
|
||
|
CONFIG_AT91_HW_WDT_TIMEOUT
|
||
|
CONFIG_AT91_LED
|
||
|
CONFIG_AT91_WANTS_COMMON_PHY
|
||
|
CONFIG_ATAPI
|
||
|
CONFIG_ATA_ACPI
|
||
|
CONFIG_ATI
|
||
|
CONFIG_ATI_RADEON_FB
|
||
|
CONFIG_ATM
|
||
|
CONFIG_ATMEL_DATAFLASH_SPI
|
||
|
CONFIG_ATMEL_HLCD
|
||
|
CONFIG_ATMEL_LCD
|
||
|
CONFIG_ATMEL_LCD_BGR555
|
||
|
CONFIG_ATMEL_LCD_RGB565
|
||
|
CONFIG_ATMEL_LEGACY
|
||
|
CONFIG_ATMEL_MCI_8BIT
|
||
|
CONFIG_ATMEL_NAND_HWECC
|
||
|
CONFIG_ATMEL_NAND_HW_PMECC
|
||
|
CONFIG_ATMEL_SPI0
|
||
|
CONFIG_ATNGW100
|
||
|
CONFIG_ATNGW100MKII
|
||
|
CONFIG_ATSTK1000
|
||
|
CONFIG_ATSTK1000_16MB_SDRAM
|
||
|
CONFIG_ATSTK1002
|
||
|
CONFIG_AT_TRANS
|
||
|
CONFIG_AUTOCALIB
|
||
|
CONFIG_AUTONEG_TIMEOUT
|
||
|
CONFIG_AUTO_COMPLETE
|
||
|
CONFIG_AUTO_ZRELADDR
|
||
|
CONFIG_BACKSIDE_L2_CACHE
|
||
|
CONFIG_BAMBOO
|
||
|
CONFIG_BAMBOO_NAND
|
||
|
CONFIG_BARIX_IPAM390
|
||
|
CONFIG_BAT_CMD
|
||
|
CONFIG_BAT_PAIR
|
||
|
CONFIG_BAT_RW
|
||
|
CONFIG_BAUDRATE
|
||
|
CONFIG_BCH
|
||
|
CONFIG_BCH_CONST_M
|
||
|
CONFIG_BCH_CONST_PARAMS
|
||
|
CONFIG_BCH_CONST_T
|
||
|
CONFIG_BCM2835_GPIO
|
||
|
CONFIG_BCM283X_MU_SERIAL
|
||
|
CONFIG_BCM_SF2_ETH
|
||
|
CONFIG_BCM_SF2_ETH_DEFAULT_PORT
|
||
|
CONFIG_BCM_SF2_ETH_GMAC
|
||
|
CONFIG_BD_NUM_CPUS
|
||
|
CONFIG_BF506_UART0_PORTF
|
||
|
CONFIG_BF506_UART1_PORTG
|
||
|
CONFIG_BF50x
|
||
|
CONFIG_BF51x
|
||
|
CONFIG_BF527_EZKIT_REV_2_1
|
||
|
CONFIG_BF52x
|
||
|
CONFIG_BF548_ATAPI_ALTERNATIVE_PORT
|
||
|
CONFIG_BF54x
|
||
|
CONFIG_BF60x
|
||
|
CONFIG_BFIN_ATAPI_BASE_ADDR
|
||
|
CONFIG_BFIN_ATA_MODE
|
||
|
CONFIG_BFIN_BOARD_VERSION_1_0
|
||
|
CONFIG_BFIN_BOOTROM_USES_EVT1
|
||
|
CONFIG_BFIN_BOOT_MODE
|
||
|
CONFIG_BFIN_CF_IDE
|
||
|
CONFIG_BFIN_CPU
|
||
|
CONFIG_BFIN_GET_DCLK_M
|
||
|
CONFIG_BFIN_GPIO_TRACK
|
||
|
CONFIG_BFIN_HDD_IDE
|
||
|
CONFIG_BFIN_IDE
|
||
|
CONFIG_BFIN_INS_LOWOVERHEAD
|
||
|
CONFIG_BFIN_LINKPORT
|
||
|
CONFIG_BFIN_MAC
|
||
|
CONFIG_BFIN_MAC_PINS
|
||
|
CONFIG_BFIN_NFC
|
||
|
CONFIG_BFIN_NFC_BOOTROM_ECC
|
||
|
CONFIG_BFIN_NFC_CTL_VAL
|
||
|
CONFIG_BFIN_NFC_NO_HW_ECC
|
||
|
CONFIG_BFIN_SCRATCH_REG
|
||
|
CONFIG_BFIN_SDH
|
||
|
CONFIG_BFIN_SERIAL
|
||
|
CONFIG_BFIN_SOFT_SWITCH
|
||
|
CONFIG_BFIN_SPI
|
||
|
CONFIG_BFIN_SPI6XX
|
||
|
CONFIG_BFIN_SPI_GPIO_CS
|
||
|
CONFIG_BFIN_SPI_IDLE_VAL
|
||
|
CONFIG_BFIN_SPI_IMG_SIZE
|
||
|
CONFIG_BFIN_TRUE_IDE
|
||
|
CONFIG_BFIN_WATCHDOG
|
||
|
CONFIG_BIOSEMU
|
||
|
CONFIG_BITBANGMII
|
||
|
CONFIG_BITBANGMII_MULTI
|
||
|
CONFIG_BKUP_FLASH
|
||
|
CONFIG_BL1_OFFSET
|
||
|
CONFIG_BL1_SIZE
|
||
|
CONFIG_BL2_OFFSET
|
||
|
CONFIG_BL2_SIZE
|
||
|
CONFIG_BMP_16BPP
|
||
|
CONFIG_BMP_24BMP
|
||
|
CONFIG_BMP_24BPP
|
||
|
CONFIG_BMP_32BPP
|
||
|
CONFIG_BOARDDIR
|
||
|
CONFIG_BOARDINFO
|
||
|
CONFIG_BOARDNAME
|
||
|
CONFIG_BOARDNAME_LOCAL
|
||
|
CONFIG_BOARD_AXM
|
||
|
CONFIG_BOARD_BOOTCMD
|
||
|
CONFIG_BOARD_COMMON
|
||
|
CONFIG_BOARD_EARLY_INIT_F
|
||
|
CONFIG_BOARD_EARLY_INIT_R
|
||
|
CONFIG_BOARD_ECC_SUPPORT
|
||
|
CONFIG_BOARD_EMAC_COUNT
|
||
|
CONFIG_BOARD_H2200
|
||
|
CONFIG_BOARD_IS_OPENRD_BASE
|
||
|
CONFIG_BOARD_IS_OPENRD_CLIENT
|
||
|
CONFIG_BOARD_IS_OPENRD_ULTIMATE
|
||
|
CONFIG_BOARD_LATE_INIT
|
||
|
CONFIG_BOARD_MEM_LIMIT
|
||
|
CONFIG_BOARD_NAME
|
||
|
CONFIG_BOARD_POSTCLK_INIT
|
||
|
CONFIG_BOARD_RESET
|
||
|
CONFIG_BOARD_REVISION_TAG
|
||
|
CONFIG_BOARD_SIZE_LIMIT
|
||
|
CONFIG_BOARD_TAURUS
|
||
|
CONFIG_BOARD_TYPES
|
||
|
CONFIG_BOOGER
|
||
|
CONFIG_BOOM
|
||
|
CONFIG_BOOTARGS
|
||
|
CONFIG_BOOTARGS_AXM
|
||
|
CONFIG_BOOTARGS_ROOT
|
||
|
CONFIG_BOOTARGS_TAURUS
|
||
|
CONFIG_BOOTARGS_VIDEO
|
||
|
CONFIG_BOOTBLOCK
|
||
|
CONFIG_BOOTCOMMAND
|
||
|
CONFIG_BOOTCOUNT_ALEN
|
||
|
CONFIG_BOOTCOUNT_AM33XX
|
||
|
CONFIG_BOOTCOUNT_ENV
|
||
|
CONFIG_BOOTCOUNT_I2C
|
||
|
CONFIG_BOOTCOUNT_LIMIT
|
||
|
CONFIG_BOOTCOUNT_RAM
|
||
|
CONFIG_BOOTFILE
|
||
|
CONFIG_BOOTMAPSZ
|
||
|
CONFIG_BOOTMODE
|
||
|
CONFIG_BOOTM_LINUX
|
||
|
CONFIG_BOOTM_NETBSD
|
||
|
CONFIG_BOOTM_OPENRTOS
|
||
|
CONFIG_BOOTM_OSE
|
||
|
CONFIG_BOOTM_PLAN9
|
||
|
CONFIG_BOOTM_RTEMS
|
||
|
CONFIG_BOOTM_VXWORKS
|
||
|
CONFIG_BOOTP_
|
||
|
CONFIG_BOOTP_BOOTFILE
|
||
|
CONFIG_BOOTP_BOOTFILESIZE
|
||
|
CONFIG_BOOTP_BOOTPATH
|
||
|
CONFIG_BOOTP_DEFAULT
|
||
|
CONFIG_BOOTP_DHCP_REQUEST_DELAY
|
||
|
CONFIG_BOOTP_DNS
|
||
|
CONFIG_BOOTP_DNS2
|
||
|
CONFIG_BOOTP_GATEWAY
|
||
|
CONFIG_BOOTP_HOSTNAME
|
||
|
CONFIG_BOOTP_ID_CACHE_SIZE
|
||
|
CONFIG_BOOTP_MAY_FAIL
|
||
|
CONFIG_BOOTP_NISDOMAIN
|
||
|
CONFIG_BOOTP_NTPSERVER
|
||
|
CONFIG_BOOTP_PXE
|
||
|
CONFIG_BOOTP_RANDOM_DELAY
|
||
|
CONFIG_BOOTP_SEND_HOSTNAME
|
||
|
CONFIG_BOOTP_SERVERIP
|
||
|
CONFIG_BOOTP_SUBNETMASK
|
||
|
CONFIG_BOOTP_TIMEOFFSET
|
||
|
CONFIG_BOOTP_VENDOREX
|
||
|
CONFIG_BOOTROM_ERR_REG
|
||
|
CONFIG_BOOTSCRIPT_ADDR
|
||
|
CONFIG_BOOTSCRIPT_COPY_RAM
|
||
|
CONFIG_BOOTSCRIPT_HDR_ADDR
|
||
|
CONFIG_BOOTSCRIPT_KEY_HASH
|
||
|
CONFIG_BOOT_DIR
|
||
|
CONFIG_BOOT_FROM_XMD
|
||
|
CONFIG_BOOT_MODE_BIT
|
||
|
CONFIG_BOOT_OS_NET
|
||
|
CONFIG_BOOT_PARAMS_ADDR
|
||
|
CONFIG_BOOT_PCI
|
||
|
CONFIG_BOOT_RETRY_MIN
|
||
|
CONFIG_BOOT_RETRY_TIME
|
||
|
CONFIG_BOUNCE_BUFFER
|
||
|
CONFIG_BPTR_VIRT_ADDR
|
||
|
CONFIG_BSEIP
|
||
|
CONFIG_BS_ADDR_DEVICE
|
||
|
CONFIG_BS_ADDR_RAM
|
||
|
CONFIG_BS_COPY_CMD
|
||
|
CONFIG_BS_COPY_ENV
|
||
|
CONFIG_BS_HDR_ADDR_DEVICE
|
||
|
CONFIG_BS_HDR_ADDR_RAM
|
||
|
CONFIG_BS_HDR_SIZE
|
||
|
CONFIG_BS_SIZE
|
||
|
CONFIG_BTB
|
||
|
CONFIG_BUBINGA
|
||
|
CONFIG_BUFNO_AUTO_INCR_BIT
|
||
|
CONFIG_BUILD_ENVCRC
|
||
|
CONFIG_BUILD_TARGET
|
||
|
CONFIG_BUS_WIDTH
|
||
|
CONFIG_BZIP2
|
||
|
CONFIG_CACHELINE_ALIGNED_L1
|
||
|
CONFIG_CADDY2
|
||
|
CONFIG_CALXEDA_XGMAC
|
||
|
CONFIG_CAM5200
|
||
|
CONFIG_CAM5200_NIOSFLASH
|
||
|
CONFIG_CANMB
|
||
|
CONFIG_CAN_DRIVER
|
||
|
CONFIG_CCLK_ACT_DIV
|
||
|
CONFIG_CCLK_DIV
|
||
|
CONFIG_CCLK_DIV_not_defined_properly
|
||
|
CONFIG_CCLK_HZ
|
||
|
CONFIG_CDP_APPLIANCE_VLAN_TYPE
|
||
|
CONFIG_CDP_CAPABILITIES
|
||
|
CONFIG_CDP_DEVICE_ID
|
||
|
CONFIG_CDP_DEVICE_ID_PREFIX
|
||
|
CONFIG_CDP_PLATFORM
|
||
|
CONFIG_CDP_PORT_ID
|
||
|
CONFIG_CDP_POWER_CONSUMPTION
|
||
|
CONFIG_CDP_TRIGGER
|
||
|
CONFIG_CDP_VERSION
|
||
|
CONFIG_CFG_DATA_SECTOR
|
||
|
CONFIG_CFG_FAT
|
||
|
CONFIG_CFG_USB
|
||
|
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
|
||
|
CONFIG_CF_ATASEL_DIS
|
||
|
CONFIG_CF_ATASEL_ENA
|
||
|
CONFIG_CF_DSPI
|
||
|
CONFIG_CF_SBF
|
||
|
CONFIG_CF_SPI
|
||
|
CONFIG_CF_V2
|
||
|
CONFIG_CF_V3
|
||
|
CONFIG_CF_V4
|
||
|
CONFIG_CF_V4E
|
||
|
CONFIG_CGU_CTL_VAL
|
||
|
CONFIG_CGU_DIV_VAL
|
||
|
CONFIG_CHAIN_BOOT_CMD
|
||
|
CONFIG_CHAIN_OF_TRUST
|
||
|
CONFIG_CHARON
|
||
|
CONFIG_CHIP_SELECTS_PER_CTRL
|
||
|
CONFIG_CHIP_SELECT_QUAD_CAPABLE
|
||
|
CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS
|
||
|
CONFIG_CIS8201_PHY
|
||
|
CONFIG_CI_UDC_HAS_HOSTPC
|
||
|
CONFIG_CLK0_DIV
|
||
|
CONFIG_CLK0_EN
|
||
|
CONFIG_CLKIN_HALF
|
||
|
CONFIG_CLKIN_HZ
|
||
|
CONFIG_CLK_1000_200_200
|
||
|
CONFIG_CLK_1000_330_165
|
||
|
CONFIG_CLK_1000_400_200
|
||
|
CONFIG_CLK_800_330_165
|
||
|
CONFIG_CLK_DEBUG
|
||
|
CONFIG_CLOCKS
|
||
|
CONFIG_CLOCKS_IN_MHZ
|
||
|
CONFIG_CLOCK_SYNTHESIZER
|
||
|
CONFIG_CM5200
|
||
|
CONFIG_CM922T_XA10
|
||
|
CONFIG_CMDLINE_EDITING
|
||
|
CONFIG_CMDLINE_PS_SUPPORT
|
||
|
CONFIG_CMDLINE_TAG
|
||
|
CONFIG_CMD_AES
|
||
|
CONFIG_CMD_ASKEN
|
||
|
CONFIG_CMD_BAT
|
||
|
CONFIG_CMD_BEDBUG
|
||
|
CONFIG_CMD_BLOB
|
||
|
CONFIG_CMD_BMODE
|
||
|
CONFIG_CMD_BMP
|
||
|
CONFIG_CMD_BOOTLDR
|
||
|
CONFIG_CMD_BSP
|
||
|
CONFIG_CMD_CBFS
|
||
|
CONFIG_CMD_CHIP_CONFIG
|
||
|
CONFIG_CMD_CLEAR
|
||
|
CONFIG_CMD_CLK
|
||
|
CONFIG_CMD_CPLBINFO
|
||
|
CONFIG_CMD_CRAMFS
|
||
|
CONFIG_CMD_DATE
|
||
|
CONFIG_CMD_DEFAULTENV_VARS
|
||
|
CONFIG_CMD_DEKBLOB
|
||
|
CONFIG_CMD_DFL
|
||
|
CONFIG_CMD_DIAG
|
||
|
CONFIG_CMD_DISPLAY
|
||
|
CONFIG_CMD_DS4510
|
||
|
CONFIG_CMD_DS4510_INFO
|
||
|
CONFIG_CMD_DS4510_MEM
|
||
|
CONFIG_CMD_DS4510_RST
|
||
|
CONFIG_CMD_DTT
|
||
|
CONFIG_CMD_ECCTEST
|
||
|
CONFIG_CMD_EECONFIG
|
||
|
CONFIG_CMD_EEPROM
|
||
|
CONFIG_CMD_EEPROM_LAYOUT
|
||
|
CONFIG_CMD_ENTERRCM
|
||
|
CONFIG_CMD_ENV
|
||
|
CONFIG_CMD_ENV_CALLBACK
|
||
|
CONFIG_CMD_ENV_FLAGS
|
||
|
CONFIG_CMD_ERRATA
|
||
|
CONFIG_CMD_ESBC_VALIDATE
|
||
|
CONFIG_CMD_ETHSW
|
||
|
CONFIG_CMD_FDC
|
||
|
CONFIG_CMD_FDT_MAX_DUMP
|
||
|
CONFIG_CMD_FPGAD
|
||
|
CONFIG_CMD_FPGA_LOADBP
|
||
|
CONFIG_CMD_FPGA_LOADFS
|
||
|
CONFIG_CMD_FPGA_LOADMK
|
||
|
CONFIG_CMD_FPGA_LOADP
|
||
|
CONFIG_CMD_FUSE
|
||
|
CONFIG_CMD_GETTIME
|
||
|
CONFIG_CMD_GPT
|
||
|
CONFIG_CMD_GSC
|
||
|
CONFIG_CMD_HASH
|
||
|
CONFIG_CMD_HD44760
|
||
|
CONFIG_CMD_HD44780
|
||
|
CONFIG_CMD_HDMIDETECT
|
||
|
CONFIG_CMD_IDE
|
||
|
CONFIG_CMD_IMMAP
|
||
|
CONFIG_CMD_IMXOTP
|
||
|
CONFIG_CMD_IMX_FUSE
|
||
|
CONFIG_CMD_IO
|
||
|
CONFIG_CMD_IOLOOP
|
||
|
CONFIG_CMD_IOTRACE
|
||
|
CONFIG_CMD_IRQ
|
||
|
CONFIG_CMD_JFFS2
|
||
|
CONFIG_CMD_KGDB
|
||
|
CONFIG_CMD_LDRINFO
|
||
|
CONFIG_CMD_LOADY
|
||
|
CONFIG_CMD_LZMADEC
|
||
|
CONFIG_CMD_MAX6957
|
||
|
CONFIG_CMD_MD5SUM
|
||
|
CONFIG_CMD_MEM
|
||
|
CONFIG_CMD_MFSL
|
||
|
CONFIG_CMD_MMC_SPI
|
||
|
CONFIG_CMD_MTDPARTS
|
||
|
CONFIG_CMD_MTDPARTS_SPREAD
|
||
|
CONFIG_CMD_NAND_LOCK_UNLOCK
|
||
|
CONFIG_CMD_NAND_TORTURE
|
||
|
CONFIG_CMD_NAND_TRIMFFS
|
||
|
CONFIG_CMD_ONENAND
|
||
|
CONFIG_CMD_OTP
|
||
|
CONFIG_CMD_PART
|
||
|
CONFIG_CMD_PCA953X
|
||
|
CONFIG_CMD_PCA953X_INFO
|
||
|
CONFIG_CMD_PCI
|
||
|
CONFIG_CMD_PCI_ENUM
|
||
|
CONFIG_CMD_PCMCIA
|
||
|
CONFIG_CMD_PORTIO
|
||
|
CONFIG_CMD_READ
|
||
|
CONFIG_CMD_REGINFO
|
||
|
CONFIG_CMD_REISER
|
||
|
CONFIG_CMD_SANDBOX
|
||
|
CONFIG_CMD_SATA
|
||
|
CONFIG_CMD_SAVES
|
||
|
CONFIG_CMD_SCSI
|
||
|
CONFIG_CMD_SDRAM
|
||
|
CONFIG_CMD_SF_TEST
|
||
|
CONFIG_CMD_SH_ZIMAGEBOOT
|
||
|
CONFIG_CMD_SOFTSWITCH
|
||
|
CONFIG_CMD_SPIBOOTLDR
|
||
|
CONFIG_CMD_SPL
|
||
|
CONFIG_CMD_SPL_NAND_OFS
|
||
|
CONFIG_CMD_SPL_WRITE_SIZE
|
||
|
CONFIG_CMD_STRINGS
|
||
|
CONFIG_CMD_SX151X
|
||
|
CONFIG_CMD_TCA642X
|
||
|
CONFIG_CMD_TERMINAL
|
||
|
CONFIG_CMD_TFTP
|
||
|
CONFIG_CMD_THOR_DOWNLOAD
|
||
|
CONFIG_CMD_TRACE
|
||
|
CONFIG_CMD_TSI148
|
||
|
CONFIG_CMD_UBIFS
|
||
|
CONFIG_CMD_UNIVERSE
|
||
|
CONFIG_CMD_UNZIP
|
||
|
CONFIG_CMD_USB_STORAGE
|
||
|
CONFIG_CMD_UUID
|
||
|
CONFIG_CMD_ZBOOT
|
||
|
CONFIG_CMD_ZFS
|
||
|
CONFIG_CM_INIT
|
||
|
CONFIG_CM_MULTIPLE_SSRAM
|
||
|
CONFIG_CM_REMAP
|
||
|
CONFIG_CM_SPD_DETECT
|
||
|
CONFIG_CM_T335
|
||
|
CONFIG_CM_T3517
|
||
|
CONFIG_CM_T3X
|
||
|
CONFIG_CM_T43
|
||
|
CONFIG_CM_T54
|
||
|
CONFIG_CM_TCRAM
|
||
|
CONFIG_CNTL
|
||
|
CONFIG_COLDFIRE
|
||
|
CONFIG_COMMANDS
|
||
|
CONFIG_COMMAND_HISTORY
|
||
|
CONFIG_COMMON_BOOT
|
||
|
CONFIG_COMMON_ENV_MISC
|
||
|
CONFIG_COMMON_ENV_SETTINGS
|
||
|
CONFIG_COMMON_ENV_UBI
|
||
|
CONFIG_COMPACT_FLASH
|
||
|
CONFIG_COMPAT
|
||
|
CONFIG_CONS_EXTC_PINSEL
|
||
|
CONFIG_CONS_EXTC_RATE
|
||
|
CONFIG_CONS_NONE
|
||
|
CONFIG_CONS_ON_SCC
|
||
|
CONFIG_CONS_ON_SMC
|
||
|
CONFIG_CONS_SCIF0
|
||
|
CONFIG_CONS_SCIF1
|
||
|
CONFIG_CONS_SCIF2
|
||
|
CONFIG_CONS_SCIF3
|
||
|
CONFIG_CONS_SCIF4
|
||
|
CONFIG_CONS_SCIF5
|
||
|
CONFIG_CONS_SCIF7
|
||
|
CONFIG_CONTROL
|
||
|
CONFIG_CONTROLCENTERD
|
||
|
CONFIG_CON_ROT
|
||
|
CONFIG_CORE1_RUN
|
||
|
CONFIG_CORE_COUNT
|
||
|
CONFIG_CORTINA_FW_ADDR
|
||
|
CONFIG_CORTINA_FW_LENGTH
|
||
|
CONFIG_CPCI405
|
||
|
CONFIG_CPCI405_6U
|
||
|
CONFIG_CPCI405_VER2
|
||
|
CONFIG_CPCI_AX2000
|
||
|
CONFIG_CPLD_BR_PRELIM
|
||
|
CONFIG_CPLD_OR_PRELIM
|
||
|
CONFIG_CPM2
|
||
|
CONFIG_CPUAT91
|
||
|
CONFIG_CPU_ARCHS34
|
||
|
CONFIG_CPU_ARMV8
|
||
|
CONFIG_CPU_CAVIUM_OCTEON
|
||
|
CONFIG_CPU_FREQ_HZ
|
||
|
CONFIG_CPU_HAS_LLSC
|
||
|
CONFIG_CPU_HAS_PREFETCH
|
||
|
CONFIG_CPU_HAS_SMARTMIPS
|
||
|
CONFIG_CPU_HAS_SR_RB
|
||
|
CONFIG_CPU_HAS_WB
|
||
|
CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED
|
||
|
CONFIG_CPU_LITTLE_ENDIAN
|
||
|
CONFIG_CPU_MICROMIPS
|
||
|
CONFIG_CPU_MIPSR2
|
||
|
CONFIG_CPU_MONAHANS
|
||
|
CONFIG_CPU_PXA25X
|
||
|
CONFIG_CPU_PXA26X
|
||
|
CONFIG_CPU_PXA27X
|
||
|
CONFIG_CPU_PXA300
|
||
|
CONFIG_CPU_R8000
|
||
|
CONFIG_CPU_SH7203
|
||
|
CONFIG_CPU_SH7264
|
||
|
CONFIG_CPU_SH7269
|
||
|
CONFIG_CPU_SH7706
|
||
|
CONFIG_CPU_SH7720
|
||
|
CONFIG_CPU_SH7722
|
||
|
CONFIG_CPU_SH7723
|
||
|
CONFIG_CPU_SH7724
|
||
|
CONFIG_CPU_SH7734
|
||
|
CONFIG_CPU_SH7750
|
||
|
CONFIG_CPU_SH7751
|
||
|
CONFIG_CPU_SH7752
|
||
|
CONFIG_CPU_SH7753
|
||
|
CONFIG_CPU_SH7757
|
||
|
CONFIG_CPU_SH7763
|
||
|
CONFIG_CPU_SH7780
|
||
|
CONFIG_CPU_SH7785
|
||
|
CONFIG_CPU_SH_TYPE_R
|
||
|
CONFIG_CPU_TYPE_R
|
||
|
CONFIG_CPU_VR41XX
|
||
|
CONFIG_CP_CLK_FREQ
|
||
|
CONFIG_CQSPI_DECODER
|
||
|
CONFIG_CQSPI_REF_CLK
|
||
|
CONFIG_CRC32
|
||
|
CONFIG_CRC32_VERIFY
|
||
|
CONFIG_CS8900
|
||
|
CONFIG_CS8900_BASE
|
||
|
CONFIG_CS8900_BUS16
|
||
|
CONFIG_CS8900_BUS32
|
||
|
CONFIG_CSF_SIZE
|
||
|
CONFIG_CTL_JTAG
|
||
|
CONFIG_CTL_TBE
|
||
|
CONFIG_CTRD1_PROBE_T1
|
||
|
CONFIG_CTRD1_PROBE_T2
|
||
|
CONFIG_CUSTOMER_BOARD_SUPPORT
|
||
|
CONFIG_CYRUS
|
||
|
CONFIG_D2NET_V2
|
||
|
CONFIG_DA850_AM18X_EVM
|
||
|
CONFIG_DA850_EVM_MAX_CPU_CLK
|
||
|
CONFIG_DA850_LOWLEVEL
|
||
|
CONFIG_DA8XX_GPIO
|
||
|
CONFIG_DASA_SIM
|
||
|
CONFIG_DATA
|
||
|
CONFIG_DAVINCI_MMC
|
||
|
CONFIG_DAVINCI_MMC_SD1
|
||
|
CONFIG_DAVINCI_SPI
|
||
|
CONFIG_DBAU1000
|
||
|
CONFIG_DBAU1X00
|
||
|
CONFIG_DBGU
|
||
|
CONFIG_DBG_MONITOR
|
||
|
CONFIG_DB_784MP_GP
|
||
|
CONFIG_DCACHE
|
||
|
CONFIG_DCACHE_OFF
|
||
|
CONFIG_DCACHE_WB
|
||
|
CONFIG_DCFG_ADDR
|
||
|
CONFIG_DCLK_DIV
|
||
|
CONFIG_DDR_
|
||
|
CONFIG_DDR_2HCLK
|
||
|
CONFIG_DDR_2T_TIMING
|
||
|
CONFIG_DDR_32BIT
|
||
|
CONFIG_DDR_64BIT
|
||
|
CONFIG_DDR_CLK_FREQ
|
||
|
CONFIG_DDR_DATA_EYE
|
||
|
CONFIG_DDR_DEFAULT_CL
|
||
|
CONFIG_DDR_ECC
|
||
|
CONFIG_DDR_ECC_CMD
|
||
|
CONFIG_DDR_ECC_ENABLE
|
||
|
CONFIG_DDR_ECC_INIT_VIA_DMA
|
||
|
CONFIG_DDR_FIXED_SIZE
|
||
|
CONFIG_DDR_HCLK
|
||
|
CONFIG_DDR_HYB25D512160BF
|
||
|
CONFIG_DDR_II
|
||
|
CONFIG_DDR_K4H511638C
|
||
|
CONFIG_DDR_LOG_LEVEL
|
||
|
CONFIG_DDR_MB
|
||
|
CONFIG_DDR_MT46V16M16
|
||
|
CONFIG_DDR_MT46V32M16
|
||
|
CONFIG_DDR_MT47H128M8
|
||
|
CONFIG_DDR_MT47H32M16
|
||
|
CONFIG_DDR_MT47H64M16
|
||
|
CONFIG_DDR_PLL2
|
||
|
CONFIG_DDR_RFDC_FIXED
|
||
|
CONFIG_DDR_RQDC_FIXED
|
||
|
CONFIG_DDR_SPD
|
||
|
CONFIG_DEBUG
|
||
|
CONFIG_DEBUG_DUMP
|
||
|
CONFIG_DEBUG_DUMP_SYMS
|
||
|
CONFIG_DEBUG_EARLY_SERIAL
|
||
|
CONFIG_DEBUG_FS
|
||
|
CONFIG_DEBUG_LED
|
||
|
CONFIG_DEBUG_LOCK_ALLOC
|
||
|
CONFIG_DEBUG_NULL_PTR
|
||
|
CONFIG_DEBUG_SECTION_MISMATCH
|
||
|
CONFIG_DEBUG_SEMIHOSTING
|
||
|
CONFIG_DEBUG_SERIAL
|
||
|
CONFIG_DEBUG_UART_LINFLEXUART
|
||
|
CONFIG_DEBUG_WRITECOUNT
|
||
|
CONFIG_DEB_DMA_URGENT
|
||
|
CONFIG_DEEP_SLEEP
|
||
|
CONFIG_DEFAULT
|
||
|
CONFIG_DEFAULT_CONSOLE
|
||
|
CONFIG_DEFAULT_IMMR
|
||
|
CONFIG_DEFAULT_KERNEL_COMMAND_LINE
|
||
|
CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC
|
||
|
CONFIG_DEFAULT_SPI_BUS
|
||
|
CONFIG_DEFAULT_SPI_CS
|
||
|
CONFIG_DEFAULT_SPI_MODE
|
||
|
CONFIG_DEF_HWCONFIG
|
||
|
CONFIG_DELAY_ENVIRONMENT
|
||
|
CONFIG_DENX_M28_V10
|
||
|
CONFIG_DESIGNWARE_ETH
|
||
|
CONFIG_DESIGNWARE_WATCHDOG
|
||
|
CONFIG_DEVCONCENTER
|
||
|
CONFIG_DEVELOP
|
||
|
CONFIG_DEVICE_TREE_LIST
|
||
|
CONFIG_DEV_USB_PHY_BASE
|
||
|
CONFIG_DFU_ALT
|
||
|
CONFIG_DFU_ALT_BOOT_EMMC
|
||
|
CONFIG_DFU_ALT_BOOT_SD
|
||
|
CONFIG_DFU_ALT_SYSTEM
|
||
|
CONFIG_DFU_ENV_SETTINGS
|
||
|
CONFIG_DFU_MTD
|
||
|
CONFIG_DHCP_MIN_EXT_LEN
|
||
|
CONFIG_DIALOG_POWER
|
||
|
CONFIG_DIGSY_MTC
|
||
|
CONFIG_DIGSY_REV5
|
||
|
CONFIG_DIMM_SLOTS_PER_CTLR
|
||
|
CONFIG_DIRECT_NOR_BOOT
|
||
|
CONFIG_DISABLE_CONSOLE
|
||
|
CONFIG_DISABLE_IMAGE_LEGACY
|
||
|
CONFIG_DISABLE_PISE_TEST
|
||
|
CONFIG_DISCONTIGMEM
|
||
|
CONFIG_DISCOVER_PHY
|
||
|
CONFIG_DISPLAY_AER_xxxx
|
||
|
CONFIG_DISPLAY_BOARDINFO_LATE
|
||
|
CONFIG_DLVISION
|
||
|
CONFIG_DLVISION_10G
|
||
|
CONFIG_DM9000_BASE
|
||
|
CONFIG_DM9000_BYTE_SWAPPED
|
||
|
CONFIG_DM9000_DEBUG
|
||
|
CONFIG_DM9000_NO_SROM
|
||
|
CONFIG_DM9000_USE_16BIT
|
||
|
CONFIG_DMA_COHERENT
|
||
|
CONFIG_DMA_COHERENT_SIZE
|
||
|
CONFIG_DMA_LPC32XX
|
||
|
CONFIG_DMA_NONCOHERENT
|
||
|
CONFIG_DMA_REQ_BIT
|
||
|
CONFIG_DMC_DDRCFG
|
||
|
CONFIG_DMC_DDRCTL
|
||
|
CONFIG_DMC_DDREMR1
|
||
|
CONFIG_DMC_DDRMR
|
||
|
CONFIG_DMC_DDRTR0
|
||
|
CONFIG_DMC_DDRTR1
|
||
|
CONFIG_DMC_DDRTR2
|
||
|
CONFIG_DNET_AUTONEG_TIMEOUT
|
||
|
CONFIG_DNP5370_EXT_WD_DISABLE
|
||
|
CONFIG_DOS_PARTITION
|
||
|
CONFIG_DP_DDR_CTRL
|
||
|
CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR
|
||
|
CONFIG_DP_DDR_NUM_CTRLS
|
||
|
CONFIG_DRA7XX
|
||
|
CONFIG_DRAM_2G
|
||
|
CONFIG_DRAM_TIMINGS_
|
||
|
CONFIG_DRIVER_AT91EMAC
|
||
|
CONFIG_DRIVER_AT91EMAC_PHYADDR
|
||
|
CONFIG_DRIVER_AT91EMAC_QUIET
|
||
|
CONFIG_DRIVER_AX88180
|
||
|
CONFIG_DRIVER_AX88796L
|
||
|
CONFIG_DRIVER_DM9000
|
||
|
CONFIG_DRIVER_EP93XX_MAC
|
||
|
CONFIG_DRIVER_ETHER
|
||
|
CONFIG_DRIVER_NAND_BFIN
|
||
|
CONFIG_DRIVER_NE2000
|
||
|
CONFIG_DRIVER_NE2000_BASE
|
||
|
CONFIG_DRIVER_NE2000_CCR
|
||
|
CONFIG_DRIVER_NE2000_VAL
|
||
|
CONFIG_DRIVER_SMC911X_BASE
|
||
|
CONFIG_DRIVER_TI_CPSW
|
||
|
CONFIG_DRIVER_TI_EMAC
|
||
|
CONFIG_DRIVER_TI_EMAC_RMII_NO_NEGOTIATE
|
||
|
CONFIG_DRIVER_TI_EMAC_USE_RMII
|
||
|
CONFIG_DRIVER_TI_KEYSTONE_NET
|
||
|
CONFIG_DRIVE_MMC
|
||
|
CONFIG_DRIVE_SATA
|
||
|
CONFIG_DRIVE_TYPES
|
||
|
CONFIG_DRIVE_USB
|
||
|
CONFIG_DS4510
|
||
|
CONFIG_DSP_CLUSTER_START
|
||
|
CONFIG_DTT
|
||
|
CONFIG_DTT_AD7414
|
||
|
CONFIG_DTT_ADM1021
|
||
|
CONFIG_DTT_DS1621
|
||
|
CONFIG_DTT_DS1775
|
||
|
CONFIG_DTT_DS620
|
||
|
CONFIG_DTT_HYSTERESIS
|
||
|
CONFIG_DTT_LM63
|
||
|
CONFIG_DTT_LM75
|
||
|
CONFIG_DTT_LM81
|
||
|
CONFIG_DTT_MAX_TEMP
|
||
|
CONFIG_DTT_MIN_TEMP
|
||
|
CONFIG_DTT_PWM_LOOKUPTABLE
|
||
|
CONFIG_DTT_SENSORS
|
||
|
CONFIG_DTT_TACH_LIMIT
|
||
|
CONFIG_DUOVERO
|
||
|
CONFIG_DV_USBPHY_CTL
|
||
|
CONFIG_DWC2_DFLT_SPEED_FULL
|
||
|
CONFIG_DWC2_DMA_BURST_SIZE
|
||
|
CONFIG_DWC2_DMA_ENABLE
|
||
|
CONFIG_DWC2_ENABLE_DYNAMIC_FIFO
|
||
|
CONFIG_DWC2_HOST_NPERIO_TX_FIFO_SIZE
|
||
|
CONFIG_DWC2_HOST_PERIO_TX_FIFO_SIZE
|
||
|
CONFIG_DWC2_HOST_RX_FIFO_SIZE
|
||
|
CONFIG_DWC2_I2C_ENABLE
|
||
|
CONFIG_DWC2_IC_USB_CAP
|
||
|
CONFIG_DWC2_MAX_CHANNELS
|
||
|
CONFIG_DWC2_MAX_PACKET_COUNT
|
||
|
CONFIG_DWC2_MAX_TRANSFER_SIZE
|
||
|
CONFIG_DWC2_PHY_TYPE
|
||
|
CONFIG_DWC2_PHY_ULPI_DDR
|
||
|
CONFIG_DWC2_PHY_ULPI_EXT_VBUS
|
||
|
CONFIG_DWC2_THR_CTL
|
||
|
CONFIG_DWC2_TS_DLINE
|
||
|
CONFIG_DWC2_TX_THR_LENGTH
|
||
|
CONFIG_DWC2_ULPI_FS_LS
|
||
|
CONFIG_DWC2_UTMI_WIDTH
|
||
|
CONFIG_DWCDDR21MCTL
|
||
|
CONFIG_DWCDDR21MCTL_BASE
|
||
|
CONFIG_DWC_AHSATA
|
||
|
CONFIG_DWC_AHSATA_BASE_ADDR
|
||
|
CONFIG_DWC_AHSATA_PORT_ID
|
||
|
CONFIG_DWMMC
|
||
|
CONFIG_DW_ALTDESCRIPTOR
|
||
|
CONFIG_DW_AXI_BURST_LEN
|
||
|
CONFIG_DW_GMAC_DEFAULT_DMA_PBL
|
||
|
CONFIG_DW_MAC_FORCE_THRESHOLD_MODE
|
||
|
CONFIG_DW_PORTS
|
||
|
CONFIG_DW_SERIAL
|
||
|
CONFIG_DW_UDC
|
||
|
CONFIG_DW_WDT_BASE
|
||
|
CONFIG_DW_WDT_CLOCK_KHZ
|
||
|
CONFIG_DYNAMIC_MMC_DEVNO
|
||
|
CONFIG_E1000_NO_NVM
|
||
|
CONFIG_E300
|
||
|
CONFIG_E5500
|
||
|
CONFIG_EBCAW_VAL
|
||
|
CONFIG_EBC_PPC4xx_IBM_VER1
|
||
|
CONFIG_EBIU_AMBCTL0_VAL
|
||
|
CONFIG_EBIU_AMBCTL1_VAL
|
||
|
CONFIG_EBIU_AMGCTL_VAL
|
||
|
CONFIG_EBIU_DDRCTL0_VAL
|
||
|
CONFIG_EBIU_DDRCTL1_VAL
|
||
|
CONFIG_EBIU_DDRCTL2_VAL
|
||
|
CONFIG_EBIU_DDRCTL3_VAL
|
||
|
CONFIG_EBIU_DDRQUE_VAL
|
||
|
CONFIG_EBIU_FCTL_VAL
|
||
|
CONFIG_EBIU_MBSCTL_VAL
|
||
|
CONFIG_EBIU_MODE_VAL
|
||
|
CONFIG_EBIU_RSTCTL_VAL
|
||
|
CONFIG_EBIU_SDBCTL_VAL
|
||
|
CONFIG_EBIU_SDGCTL_VAL
|
||
|
CONFIG_EBIU_SDRRC_VAL
|
||
|
CONFIG_EBSZ_VAL
|
||
|
CONFIG_ECC
|
||
|
CONFIG_ECC_INIT_VIA_DDRCONTROLLER
|
||
|
CONFIG_ECC_MODE_MASK
|
||
|
CONFIG_ECC_MODE_SHIFT
|
||
|
CONFIG_ECC_SRAM_ADDR_MASK
|
||
|
CONFIG_ECC_SRAM_ADDR_SHIFT
|
||
|
CONFIG_ECC_SRAM_REQ_BIT
|
||
|
CONFIG_ECOVEC
|
||
|
CONFIG_ECOVEC_ROMIMAGE_ADDR
|
||
|
CONFIG_EDB9301
|
||
|
CONFIG_EDB9302
|
||
|
CONFIG_EDB9302A
|
||
|
CONFIG_EDB9307
|
||
|
CONFIG_EDB9307A
|
||
|
CONFIG_EDB9312
|
||
|
CONFIG_EDB9315
|
||
|
CONFIG_EDB9315A
|
||
|
CONFIG_EDB93XX_INDUSTRIAL
|
||
|
CONFIG_EDB93XX_SDCS0
|
||
|
CONFIG_EDB93XX_SDCS1
|
||
|
CONFIG_EDB93XX_SDCS2
|
||
|
CONFIG_EDB93XX_SDCS3
|
||
|
CONFIG_EEPRO100
|
||
|
CONFIG_EEPRO100_SROM_WRITE
|
||
|
CONFIG_EEPROM_BUS_ADDRESS
|
||
|
CONFIG_EEPROM_CHIP_ADDRESS
|
||
|
CONFIG_EEPROM_LAYOUT_HELP_STRING
|
||
|
CONFIG_EFI_PARTITION
|
||
|
CONFIG_EFLASH_PROTSECTORS
|
||
|
CONFIG_EHCI_DESC_BIG_ENDIAN
|
||
|
CONFIG_EHCI_HCD_INIT_AFTER_RESET
|
||
|
CONFIG_EHCI_IS_TDI
|
||
|
CONFIG_EHCI_MMIO_BIG_ENDIAN
|
||
|
CONFIG_EHCI_MXS_PORT0
|
||
|
CONFIG_EHCI_MXS_PORT1
|
||
|
CONFIG_ELBC_NAND_SPL_STATIC_PGSIZE
|
||
|
CONFIG_EMAC_MDIO_PHY_NUM
|
||
|
CONFIG_EMAC_NR_START
|
||
|
CONFIG_EMAC_PHY_MODE
|
||
|
CONFIG_EMIF4
|
||
|
CONFIG_EMMC_BOOT
|
||
|
CONFIG_EMU
|
||
|
CONFIG_ENABLE_36BIT_PHYS
|
||
|
CONFIG_ENABLE_MMU
|
||
|
CONFIG_ENABLE_MUST_CHECK
|
||
|
CONFIG_ENABLE_VBOOT
|
||
|
CONFIG_ENABLE_WARN_DEPRECATED
|
||
|
CONFIG_ENC_SILENTLINK
|
||
|
CONFIG_ENV_ACCESS_IGNORE_FORCE
|
||
|
CONFIG_ENV_ADDR
|
||
|
CONFIG_ENV_ADDR_FLEX
|
||
|
CONFIG_ENV_ADDR_REDUND
|
||
|
CONFIG_ENV_AES
|
||
|
CONFIG_ENV_BASE
|
||
|
CONFIG_ENV_CALLBACK_LIST_DEFAULT
|
||
|
CONFIG_ENV_CALLBACK_LIST_STATIC
|
||
|
CONFIG_ENV_COMMON_BOOT
|
||
|
CONFIG_ENV_EEPROM_IS_ON_I2C
|
||
|
CONFIG_ENV_FIT_UCBOOT
|
||
|
CONFIG_ENV_FLAGS_LIST_DEFAULT
|
||
|
CONFIG_ENV_FLAGS_LIST_STATIC
|
||
|
CONFIG_ENV_FLASHBOOT
|
||
|
CONFIG_ENV_IS_EMBEDDED
|
||
|
CONFIG_ENV_IS_EMBEDDED_IN_LDR
|
||
|
CONFIG_ENV_IS_IN_
|
||
|
CONFIG_ENV_IS_IN_DATAFLASH
|
||
|
CONFIG_ENV_IS_IN_EEPROM
|
||
|
CONFIG_ENV_IS_IN_FAT
|
||
|
CONFIG_ENV_IS_IN_FLASH
|
||
|
CONFIG_ENV_IS_IN_MMC
|
||
|
CONFIG_ENV_IS_IN_MRAM
|
||
|
CONFIG_ENV_IS_IN_NAND
|
||
|
CONFIG_ENV_IS_IN_NVRAM
|
||
|
CONFIG_ENV_IS_IN_ONENAND
|
||
|
CONFIG_ENV_IS_IN_REMOTE
|
||
|
CONFIG_ENV_IS_IN_SPI_FLASH
|
||
|
CONFIG_ENV_IS_IN_UBI
|
||
|
CONFIG_ENV_IS_NOWHERE
|
||
|
CONFIG_ENV_MAX_ENTRIES
|
||
|
CONFIG_ENV_MIN_ENTRIES
|
||
|
CONFIG_ENV_OFFSET
|
||
|
CONFIG_ENV_OFFSET_OOB
|
||
|
CONFIG_ENV_OFFSET_REDUND
|
||
|
CONFIG_ENV_OVERWRITE
|
||
|
CONFIG_ENV_RANGE
|
||
|
CONFIG_ENV_RDADDR
|
||
|
CONFIG_ENV_REFLASH
|
||
|
CONFIG_ENV_SECT_SIZE
|
||
|
CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS
|
||
|
CONFIG_ENV_SETTINGS_NAND_V1
|
||
|
CONFIG_ENV_SETTINGS_NAND_V2
|
||
|
CONFIG_ENV_SETTINGS_V1
|
||
|
CONFIG_ENV_SETTINGS_V2
|
||
|
CONFIG_ENV_SIZE
|
||
|
CONFIG_ENV_SIZE_FLEX
|
||
|
CONFIG_ENV_SIZE_REDUND
|
||
|
CONFIG_ENV_SPI_BASE
|
||
|
CONFIG_ENV_SPI_BUS
|
||
|
CONFIG_ENV_SPI_CS
|
||
|
CONFIG_ENV_SPI_MAX_HZ
|
||
|
CONFIG_ENV_SPI_MODE
|
||
|
CONFIG_ENV_SROM_BANK
|
||
|
CONFIG_ENV_TOTAL_SIZE
|
||
|
CONFIG_ENV_UBIFS_OPTION
|
||
|
CONFIG_ENV_UBI_MTD
|
||
|
CONFIG_ENV_UBI_PART
|
||
|
CONFIG_ENV_UBI_VOLUME
|
||
|
CONFIG_ENV_UBI_VOLUME_REDUND
|
||
|
CONFIG_ENV_VARS_UBOOT_CONFIG
|
||
|
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
|
||
|
CONFIG_ENV_VERSION
|
||
|
CONFIG_ENV_xxx
|
||
|
CONFIG_EP9301
|
||
|
CONFIG_EP9302
|
||
|
CONFIG_EP9307
|
||
|
CONFIG_EP9312
|
||
|
CONFIG_EP9315
|
||
|
CONFIG_EP93XX
|
||
|
CONFIG_EP93XX_NO_FLASH_CFG
|
||
|
CONFIG_EPH_POWER_EN
|
||
|
CONFIG_EPOLL
|
||
|
CONFIG_ESBC_ADDR_64BIT
|
||
|
CONFIG_ESBC_HDR_LS
|
||
|
CONFIG_ESDHC_DETECT_8_BIT_QUIRK
|
||
|
CONFIG_ESDHC_DETECT_QUIRK
|
||
|
CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1
|
||
|
CONFIG_ESDHC_HC_BLK_ADDR
|
||
|
CONFIG_ESPRESSO7420
|
||
|
CONFIG_ESPT
|
||
|
CONFIG_ET1100_BASE
|
||
|
CONFIG_ETH1ADDR
|
||
|
CONFIG_ETH2ADDR
|
||
|
CONFIG_ETHADDR
|
||
|
CONFIG_ETHBASE
|
||
|
CONFIG_ETHER_INDEX
|
||
|
CONFIG_ETHER_LOOPBACK_TEST
|
||
|
CONFIG_ETHER_NONE
|
||
|
CONFIG_ETHER_ON_FCC
|
||
|
CONFIG_ETHER_ON_FCC1
|
||
|
CONFIG_ETHER_ON_FCC2
|
||
|
CONFIG_ETHER_ON_FCC3
|
||
|
CONFIG_ETHER_ON_FEC1
|
||
|
CONFIG_ETHER_ON_FEC2
|
||
|
CONFIG_ETHER_ON_SCC
|
||
|
CONFIG_ETHPRIME
|
||
|
CONFIG_ETH_BUFSIZE
|
||
|
CONFIG_ETH_RXSIZE
|
||
|
CONFIG_EXCEPTION_DEFER
|
||
|
CONFIG_EXT4_WRITE
|
||
|
CONFIG_EXTRA_BOOTARGS
|
||
|
CONFIG_EXTRA_CLOCK
|
||
|
CONFIG_EXTRA_ENV
|
||
|
CONFIG_EXTRA_ENV_BOARD_SETTINGS
|
||
|
CONFIG_EXTRA_ENV_ITB
|
||
|
CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS
|
||
|
CONFIG_EXTRA_ENV_SETTINGS
|
||
|
CONFIG_EXTRA_ENV_SETTINGS_BASE
|
||
|
CONFIG_EXTRA_ENV_SETTINGS_COMMON
|
||
|
CONFIG_EXTRA_ENV_SETTINGS_DEVEL
|
||
|
CONFIG_EXTRA_ENV_SETTINGS_SELECT
|
||
|
CONFIG_EXTRA_ENV_UNLOCK
|
||
|
CONFIG_EXTRA_ENV_USBTTY
|
||
|
CONFIG_EXT_AHB2AHB_BASE
|
||
|
CONFIG_EXT_AHBAPBBRG_BASE
|
||
|
CONFIG_EXT_AHBPCIBRG_BASE
|
||
|
CONFIG_EXT_AHBSLAVE01_BASE
|
||
|
CONFIG_EXT_AHBSLAVE02_BASE
|
||
|
CONFIG_EXT_PHY
|
||
|
CONFIG_EXT_USB_HOST_BASE
|
||
|
CONFIG_EXYNOS4
|
||
|
CONFIG_EXYNOS4210
|
||
|
CONFIG_EXYNOS5
|
||
|
CONFIG_EXYNOS5250
|
||
|
CONFIG_EXYNOS5420
|
||
|
CONFIG_EXYNOS5800
|
||
|
CONFIG_EXYNOS5_DT
|
||
|
CONFIG_EXYNOS7420
|
||
|
CONFIG_EXYNOS_ACE_SHA
|
||
|
CONFIG_EXYNOS_DP
|
||
|
CONFIG_EXYNOS_DWMMC
|
||
|
CONFIG_EXYNOS_FB
|
||
|
CONFIG_EXYNOS_MIPI_DSIM
|
||
|
CONFIG_EXYNOS_RELOCATE_CODE_BASE
|
||
|
CONFIG_EXYNOS_SPL
|
||
|
CONFIG_EXYNOS_TMU
|
||
|
CONFIG_FACTORYSET
|
||
|
CONFIG_FASTBOOT_FLASH_FILLBUF_SIZE
|
||
|
CONFIG_FASTBOOT_FLASH_NAND_DEV
|
||
|
CONFIG_FASTBOOT_FLASH_NAND_TRIMFFS
|
||
|
CONFIG_FAST_FLASH_BIT
|
||
|
CONFIG_FAT_WRITE
|
||
|
CONFIG_FB_ADDR
|
||
|
CONFIG_FB_BACKLIGHT
|
||
|
CONFIG_FB_DEFERRED_IO
|
||
|
CONFIG_FDT1_ENV_ADDR
|
||
|
CONFIG_FDT2_ENV_ADDR
|
||
|
CONFIG_FDTADDR
|
||
|
CONFIG_FDTFILE
|
||
|
CONFIG_FDT_ENV_ADDR
|
||
|
CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
|
||
|
CONFIG_FDT_FIXUP_PCI_IRQ
|
||
|
CONFIG_FEATURE_CLEAN_UP
|
||
|
CONFIG_FEATURE_COMMAND_EDITING
|
||
|
CONFIG_FEATURE_SH_APPLETS_ALWAYS_WIN
|
||
|
CONFIG_FEATURE_SH_EXTRA_QUIET
|
||
|
CONFIG_FEATURE_SH_FANCY_PROMPT
|
||
|
CONFIG_FEATURE_SH_STANDALONE_SHELL
|
||
|
CONFIG_FEC1_PHY
|
||
|
CONFIG_FEC2_PHY
|
||
|
CONFIG_FEC_10MBIT
|
||
|
CONFIG_FEC_AN_TIMEOUT
|
||
|
CONFIG_FEC_ENET
|
||
|
CONFIG_FEC_ENET_DEV
|
||
|
CONFIG_FEC_FIXED_SPEED
|
||
|
CONFIG_FEC_MXC_25M_REF_CLK
|
||
|
CONFIG_FEC_MXC_PHYADDR
|
||
|
CONFIG_FEC_MXC_SWAP_PACKET
|
||
|
CONFIG_FEC_XCV_TYPE
|
||
|
CONFIG_FEROCEON
|
||
|
CONFIG_FEROCEON_88FR131
|
||
|
CONFIG_FFUART
|
||
|
CONFIG_FILE
|
||
|
CONFIG_FIRMWARE_OFFSET
|
||
|
CONFIG_FIRMWARE_SIZE
|
||
|
CONFIG_FIT_DISABLE_SHA256
|
||
|
CONFIG_FIXED_PHY
|
||
|
CONFIG_FIXED_PHY_ADDR
|
||
|
CONFIG_FIXED_SDHCI_ALIGNED_BUFFER
|
||
|
CONFIG_FLASHBOOTCOMMAND
|
||
|
CONFIG_FLASHCARD
|
||
|
CONFIG_FLASH_16BIT
|
||
|
CONFIG_FLASH_8BIT
|
||
|
CONFIG_FLASH_BASE
|
||
|
CONFIG_FLASH_BR_PRELIM
|
||
|
CONFIG_FLASH_CFI_DRIVER
|
||
|
CONFIG_FLASH_CFI_LEGACY
|
||
|
CONFIG_FLASH_CFI_MTD
|
||
|
CONFIG_FLASH_END
|
||
|
CONFIG_FLASH_NOT_MEM_MAPPED
|
||
|
CONFIG_FLASH_OR_PRELIM
|
||
|
CONFIG_FLASH_PNOR
|
||
|
CONFIG_FLASH_SECTOR_SIZE
|
||
|
CONFIG_FLASH_SHOW_PROGRESS
|
||
|
CONFIG_FLASH_SPANSION_S29WS_N
|
||
|
CONFIG_FLASH_VERIFY
|
||
|
CONFIG_FMAN_ENET
|
||
|
CONFIG_FM_PLAT_CLK_DIV
|
||
|
CONFIG_FO300
|
||
|
CONFIG_FORCE_DDR_DATA_BUS_WIDTH_32
|
||
|
CONFIG_FORMIKE
|
||
|
CONFIG_FPGA_COUNT
|
||
|
CONFIG_FPGA_DELAY
|
||
|
CONFIG_FPGA_SOCFPGA
|
||
|
CONFIG_FPGA_SPARTAN2
|
||
|
CONFIG_FPGA_SPARTAN3
|
||
|
CONFIG_FPGA_STRATIX_V
|
||
|
CONFIG_FPGA_ZYNQPL
|
||
|
CONFIG_FSLDMAFEC
|
||
|
CONFIG_FSL_CADMUS
|
||
|
CONFIG_FSL_CORENET
|
||
|
CONFIG_FSL_CPLD
|
||
|
CONFIG_FSL_DCU_FB
|
||
|
CONFIG_FSL_DCU_SII9022A
|
||
|
CONFIG_FSL_DDR_BIST
|
||
|
CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
|
||
|
CONFIG_FSL_DDR_INTERACTIVE
|
||
|
CONFIG_FSL_DDR_SYNC_REFRESH
|
||
|
CONFIG_FSL_DEEP_SLEEP
|
||
|
CONFIG_FSL_DEVICE_DISABLE
|
||
|
CONFIG_FSL_DIU_CH7301
|
||
|
CONFIG_FSL_DIU_FB
|
||
|
CONFIG_FSL_DMA
|
||
|
CONFIG_FSL_DSPI1
|
||
|
CONFIG_FSL_ELBC
|
||
|
CONFIG_FSL_ESDHC
|
||
|
CONFIG_FSL_ESDHC_ADAPTER_IDENT
|
||
|
CONFIG_FSL_ESDHC_PIN_MUX
|
||
|
CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
|
||
|
CONFIG_FSL_FIXED_MMC_LOCATION
|
||
|
CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
|
||
|
CONFIG_FSL_I2C_CUSTOM_DFSR
|
||
|
CONFIG_FSL_I2C_CUSTOM_FDR
|
||
|
CONFIG_FSL_IFC
|
||
|
CONFIG_FSL_IIM
|
||
|
CONFIG_FSL_ISBC_KEY_EXT
|
||
|
CONFIG_FSL_LAYERSCAPE
|
||
|
CONFIG_FSL_LBC
|
||
|
CONFIG_FSL_LINFLEXUART
|
||
|
CONFIG_FSL_MC9SDZ60
|
||
|
CONFIG_FSL_MC_ENET
|
||
|
CONFIG_FSL_MEMAC
|
||
|
CONFIG_FSL_NFC_CHIPS
|
||
|
CONFIG_FSL_NFC_SPARE_SIZE
|
||
|
CONFIG_FSL_NFC_WIDTH
|
||
|
CONFIG_FSL_NFC_WRITE_SIZE
|
||
|
CONFIG_FSL_NGPIXIS
|
||
|
CONFIG_FSL_PCIE_DISABLE_ASPM
|
||
|
CONFIG_FSL_PCIE_RESET
|
||
|
CONFIG_FSL_PCI_INIT
|
||
|
CONFIG_FSL_PIXIS
|
||
|
CONFIG_FSL_PMIC_BITLEN
|
||
|
CONFIG_FSL_PMIC_BUS
|
||
|
CONFIG_FSL_PMIC_CLK
|
||
|
CONFIG_FSL_PMIC_CS
|
||
|
CONFIG_FSL_PMIC_MODE
|
||
|
CONFIG_FSL_QIXIS
|
||
|
CONFIG_FSL_QIXIS_CLOCK_MEASUREMENT
|
||
|
CONFIG_FSL_QIXIS_V2
|
||
|
CONFIG_FSL_SATA
|
||
|
CONFIG_FSL_SATA_V2
|
||
|
CONFIG_FSL_SDHC_V2_3
|
||
|
CONFIG_FSL_SDRAM_TYPE
|
||
|
CONFIG_FSL_SERDES
|
||
|
CONFIG_FSL_SERDES1
|
||
|
CONFIG_FSL_SERDES2
|
||
|
CONFIG_FSL_SGMII_RISER
|
||
|
CONFIG_FSL_SPI_INTERFACE
|
||
|
CONFIG_FSL_TBCLK_EXTRA_DIV
|
||
|
CONFIG_FSL_TRUST_ARCH_v1
|
||
|
CONFIG_FSL_TZASC_400
|
||
|
CONFIG_FSL_TZPC_BP147
|
||
|
CONFIG_FSL_USDHC
|
||
|
CONFIG_FSL_VIA
|
||
|
CONFIG_FSMC_NAND_BASE
|
||
|
CONFIG_FSMTDBLK
|
||
|
CONFIG_FSNOTIFY
|
||
|
CONFIG_FS_EXT4
|
||
|
CONFIG_FS_FAT
|
||
|
CONFIG_FS_FAT_MAX_CLUSTSIZE
|
||
|
CONFIG_FS_POSIX_ACL
|
||
|
CONFIG_FTAHBC020S
|
||
|
CONFIG_FTAHBC020S_BASE
|
||
|
CONFIG_FTAPBBRG020S_01_BASE
|
||
|
CONFIG_FTCFC010_BASE
|
||
|
CONFIG_FTDMAC020_BASE
|
||
|
CONFIG_FTGMAC100_BASE
|
||
|
CONFIG_FTGMAC100_EGIGA
|
||
|
CONFIG_FTGPIO010_BASE
|
||
|
CONFIG_FTI2C010_BASE1
|
||
|
CONFIG_FTI2C010_BASE2
|
||
|
CONFIG_FTI2C010_BASE3
|
||
|
CONFIG_FTI2C010_CLOCK
|
||
|
CONFIG_FTI2C010_TIMEOUT
|
||
|
CONFIG_FTIDE020S_BASE
|
||
|
CONFIG_FTIIC010_BASE
|
||
|
CONFIG_FTINTC010_BASE
|
||
|
CONFIG_FTLCDC100_BASE
|
||
|
CONFIG_FTMAC100
|
||
|
CONFIG_FTMAC100_BASE
|
||
|
CONFIG_FTMAC110_BASE
|
||
|
CONFIG_FTPCI100_BASE
|
||
|
CONFIG_FTPCI100_IO_SIZE
|
||
|
CONFIG_FTPCI100_MEM_BASE
|
||
|
CONFIG_FTPCI100_MEM_SIZE
|
||
|
CONFIG_FTPMU010
|
||
|
CONFIG_FTPMU010_BASE
|
||
|
CONFIG_FTPMU010_POWER
|
||
|
CONFIG_FTPWM010_BASE
|
||
|
CONFIG_FTRACE_MCOUNT_RECORD
|
||
|
CONFIG_FTRTC010_BASE
|
||
|
CONFIG_FTRTC010_EXTCLK
|
||
|
CONFIG_FTRTC010_PCLK
|
||
|
CONFIG_FTSDC010
|
||
|
CONFIG_FTSDC010_BASE
|
||
|
CONFIG_FTSDC010_BASE_LIST
|
||
|
CONFIG_FTSDC010_NUMBER
|
||
|
CONFIG_FTSDC010_SDIO
|
||
|
CONFIG_FTSDC021_CLOCK
|
||
|
CONFIG_FTSDMC021
|
||
|
CONFIG_FTSDMC021_BASE
|
||
|
CONFIG_FTSMC020
|
||
|
CONFIG_FTSMC020_BASE
|
||
|
CONFIG_FTSSP010_01_BASE
|
||
|
CONFIG_FTSSP010_02_BASE
|
||
|
CONFIG_FTTMR010_BASE
|
||
|
CONFIG_FTTMR010_EXT_CLK
|
||
|
CONFIG_FTUART010_01_BASE
|
||
|
CONFIG_FTUART010_02_BASE
|
||
|
CONFIG_FTUART010_03_BASE
|
||
|
CONFIG_FTWDT010_BASE
|
||
|
CONFIG_FTWDT010_WATCHDOG
|
||
|
CONFIG_FUNC_ISRAM_ADDR
|
||
|
CONFIG_FWUPDATE_DEBUG
|
||
|
CONFIG_FZOTG266HD0A_BASE
|
||
|
CONFIG_GATEWAYIP
|
||
|
CONFIG_GCOV_KERNEL
|
||
|
CONFIG_GCOV_PROFILE_ALL
|
||
|
CONFIG_GENERIC_ATMEL_MCI
|
||
|
CONFIG_GENERIC_MMC
|
||
|
CONFIG_GICV2
|
||
|
CONFIG_GICV3
|
||
|
CONFIG_GLOBAL_DATA_NOT_REG10
|
||
|
CONFIG_GLOBAL_TIMER
|
||
|
CONFIG_GMII
|
||
|
CONFIG_GOOD_SESH4
|
||
|
CONFIG_GPCNTRL
|
||
|
CONFIG_GPCS_PHY1_ADDR
|
||
|
CONFIG_GPCS_PHY2_ADDR
|
||
|
CONFIG_GPCS_PHY3_ADDR
|
||
|
CONFIG_GPCS_PHY_ADDR
|
||
|
CONFIG_GPIO
|
||
|
CONFIG_GPIO_ENABLE_SPI_FLASH
|
||
|
CONFIG_GPIO_LED_INVERTED_TABLE
|
||
|
CONFIG_GPIO_LED_STUBS
|
||
|
CONFIG_GREEN_LED
|
||
|
CONFIG_GRETH
|
||
|
CONFIG_GRETH_10MBIT
|
||
|
CONFIG_GRSIM
|
||
|
CONFIG_GRXC3S1500
|
||
|
CONFIG_GR_EP2S60
|
||
|
CONFIG_GURNARD_FPGA
|
||
|
CONFIG_GURNARD_SPLASH
|
||
|
CONFIG_GZIP
|
||
|
CONFIG_GZIP_COMPRESSED
|
||
|
CONFIG_GZIP_COMPRESS_DEF_SZ
|
||
|
CONFIG_G_DNL_THOR_PRODUCT_NUM
|
||
|
CONFIG_G_DNL_THOR_VENDOR_NUM
|
||
|
CONFIG_G_DNL_UMS_PRODUCT_NUM
|
||
|
CONFIG_G_DNL_UMS_VENDOR_NUM
|
||
|
CONFIG_H264_FREQ
|
||
|
CONFIG_H8300
|
||
|
CONFIG_HALEAKALA
|
||
|
CONFIG_HARD_I2C
|
||
|
CONFIG_HARD_SPI
|
||
|
CONFIG_HASH_VERIFY
|
||
|
CONFIG_HAS_DATAFLASH
|
||
|
CONFIG_HAS_ETH0
|
||
|
CONFIG_HAS_ETH1
|
||
|
CONFIG_HAS_ETH2
|
||
|
CONFIG_HAS_ETH3
|
||
|
CONFIG_HAS_ETH4
|
||
|
CONFIG_HAS_ETH5
|
||
|
CONFIG_HAS_ETH7
|
||
|
CONFIG_HAS_FEC
|
||
|
CONFIG_HAS_FSL_DR_USB
|
||
|
CONFIG_HAS_FSL_MPH_USB
|
||
|
CONFIG_HAS_FSL_XHCI_USB
|
||
|
CONFIG_HAS_POST
|
||
|
CONFIG_HAS_VR
|
||
|
CONFIG_HAVE_ACPI_RESUME
|
||
|
CONFIG_HAVE_OWN_RESET
|
||
|
CONFIG_HCLK_FREQ
|
||
|
CONFIG_HDBOOT
|
||
|
CONFIG_HDMI_ENCODER_I2C_ADDR
|
||
|
CONFIG_HETROGENOUS_CLUSTERS
|
||
|
CONFIG_HIDE_LOGO_VERSION
|
||
|
CONFIG_HIGH_BATS
|
||
|
CONFIG_HIKEY_DWMMC
|
||
|
CONFIG_HIKEY_GPIO
|
||
|
CONFIG_HIS_DRIVER
|
||
|
CONFIG_HITACHI_SP19X001_Z1A
|
||
|
CONFIG_HITACHI_SX14
|
||
|
CONFIG_HLD1045
|
||
|
CONFIG_HOSTNAME
|
||
|
CONFIG_HOST_MAX_DEVICES
|
||
|
CONFIG_HOTPLUG
|
||
|
CONFIG_HPS_ALTERAGRP_DBGATCLK
|
||
|
CONFIG_HPS_ALTERAGRP_MAINCLK
|
||
|
CONFIG_HPS_ALTERAGRP_MPUCLK
|
||
|
CONFIG_HPS_CLK_CAN0_HZ
|
||
|
CONFIG_HPS_CLK_CAN1_HZ
|
||
|
CONFIG_HPS_CLK_EMAC0_HZ
|
||
|
CONFIG_HPS_CLK_EMAC1_HZ
|
||
|
CONFIG_HPS_CLK_F2S_PER_REF_HZ
|
||
|
CONFIG_HPS_CLK_F2S_SDR_REF_HZ
|
||
|
CONFIG_HPS_CLK_GPIODB_HZ
|
||
|
CONFIG_HPS_CLK_L4_MP_HZ
|
||
|
CONFIG_HPS_CLK_L4_SP_HZ
|
||
|
CONFIG_HPS_CLK_MAINVCO_HZ
|
||
|
CONFIG_HPS_CLK_NAND_HZ
|
||
|
CONFIG_HPS_CLK_OSC1_HZ
|
||
|
CONFIG_HPS_CLK_OSC2_HZ
|
||
|
CONFIG_HPS_CLK_PERVCO_HZ
|
||
|
CONFIG_HPS_CLK_QSPI_HZ
|
||
|
CONFIG_HPS_CLK_SDMMC_HZ
|
||
|
CONFIG_HPS_CLK_SDRVCO_HZ
|
||
|
CONFIG_HPS_CLK_SPIM_HZ
|
||
|
CONFIG_HPS_CLK_USBCLK_HZ
|
||
|
CONFIG_HPS_DBCTRL_STAYOSC1
|
||
|
CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH
|
||
|
CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH
|
||
|
CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH
|
||
|
CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
|
||
|
CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT
|
||
|
CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT
|
||
|
CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK
|
||
|
CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK
|
||
|
CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP
|
||
|
CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP
|
||
|
CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT
|
||
|
CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK
|
||
|
CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK
|
||
|
CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK
|
||
|
CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK
|
||
|
CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT
|
||
|
CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT
|
||
|
CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT
|
||
|
CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK
|
||
|
CONFIG_HPS_MAINPLLGRP_VCO_DENOM
|
||
|
CONFIG_HPS_MAINPLLGRP_VCO_NUMER
|
||
|
CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK
|
||
|
CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK
|
||
|
CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK
|
||
|
CONFIG_HPS_PERPLLGRP_DIV_USBCLK
|
||
|
CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT
|
||
|
CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT
|
||
|
CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK
|
||
|
CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT
|
||
|
CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT
|
||
|
CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT
|
||
|
CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT
|
||
|
CONFIG_HPS_PERPLLGRP_SRC_NAND
|
||
|
CONFIG_HPS_PERPLLGRP_SRC_QSPI
|
||
|
CONFIG_HPS_PERPLLGRP_SRC_SDMMC
|
||
|
CONFIG_HPS_PERPLLGRP_VCO_DENOM
|
||
|
CONFIG_HPS_PERPLLGRP_VCO_NUMER
|
||
|
CONFIG_HPS_PERPLLGRP_VCO_PSRC
|
||
|
CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT
|
||
|
CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE
|
||
|
CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT
|
||
|
CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE
|
||
|
CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT
|
||
|
CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE
|
||
|
CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT
|
||
|
CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE
|
||
|
CONFIG_HPS_SDRPLLGRP_VCO_DENOM
|
||
|
CONFIG_HPS_SDRPLLGRP_VCO_NUMER
|
||
|
CONFIG_HPS_SDRPLLGRP_VCO_SSRC
|
||
|
CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR
|
||
|
CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP
|
||
|
CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH
|
||
|
CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP
|
||
|
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER
|
||
|
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN
|
||
|
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN
|
||
|
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN
|
||
|
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL
|
||
|
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE
|
||
|
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS
|
||
|
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN
|
||
|
CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT
|
||
|
CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT
|
||
|
CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT
|
||
|
CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC
|
||
|
CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE
|
||
|
CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST
|
||
|
CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_COMMAND_PORT_USED
|
||
|
CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_READ_PORT_USED
|
||
|
CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_WRITE_PORT_USED
|
||
|
CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK
|
||
|
CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES
|
||
|
CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES
|
||
|
CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0
|
||
|
CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32
|
||
|
CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0
|
||
|
CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4
|
||
|
CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36
|
||
|
CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY
|
||
|
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0
|
||
|
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32
|
||
|
CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64
|
||
|
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0
|
||
|
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32
|
||
|
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0
|
||
|
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14
|
||
|
CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46
|
||
|
CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0
|
||
|
CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN
|
||
|
CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP
|
||
|
CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL
|
||
|
CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA
|
||
|
CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP
|
||
|
CONFIG_HP_CLK_FREQ
|
||
|
CONFIG_HRCON
|
||
|
CONFIG_HRCON_DH
|
||
|
CONFIG_HRCON_FANS
|
||
|
CONFIG_HSMMC2_8BIT
|
||
|
CONFIG_HUSH_INIT_VAR
|
||
|
CONFIG_HVBOOT
|
||
|
CONFIG_HWCONFIG
|
||
|
CONFIG_HW_ENV_SETTINGS
|
||
|
CONFIG_HW_WATCHDOG
|
||
|
CONFIG_HW_WATCHDOG_TIMEOUT_INITCODE
|
||
|
CONFIG_HW_WATCHDOG_TIMEOUT_MS
|
||
|
CONFIG_I2C
|
||
|
CONFIG_I2CFAST
|
||
|
CONFIG_I2C_CHIPADDRESS
|
||
|
CONFIG_I2C_CMD_TREE
|
||
|
CONFIG_I2C_ENV_EEPROM_BUS
|
||
|
CONFIG_I2C_FPGA
|
||
|
CONFIG_I2C_GSC
|
||
|
CONFIG_I2C_MAC_OFFSET
|
||
|
CONFIG_I2C_MBB_TIMEOUT
|
||
|
CONFIG_I2C_MULTI_BUS
|
||
|
CONFIG_I2C_MV
|
||
|
CONFIG_I2C_MVTWSI
|
||
|
CONFIG_I2C_MVTWSI_BASE
|
||
|
CONFIG_I2C_MVTWSI_BASE0
|
||
|
CONFIG_I2C_MVTWSI_BASE1
|
||
|
CONFIG_I2C_MVTWSI_BASE2
|
||
|
CONFIG_I2C_MVTWSI_BASE3
|
||
|
CONFIG_I2C_MVTWSI_BASE4
|
||
|
CONFIG_I2C_MVTWSI_BASE5
|
||
|
CONFIG_I2C_MXC
|
||
|
CONFIG_I2C_PMIC
|
||
|
CONFIG_I2C_REPEATED_START
|
||
|
CONFIG_I2C_RTC_ADDR
|
||
|
CONFIG_I2C_TIMEOUT
|
||
|
CONFIG_IBM_EMAC4_V4
|
||
|
CONFIG_ICACHE
|
||
|
CONFIG_ICACHE_OFF
|
||
|
CONFIG_ICON
|
||
|
CONFIG_ICS307_REFCLK_HZ
|
||
|
CONFIG_IDE_8xx_DIRECT
|
||
|
CONFIG_IDE_8xx_PCCARD
|
||
|
CONFIG_IDE_INIT_POSTRESET
|
||
|
CONFIG_IDE_LED
|
||
|
CONFIG_IDE_PCMCIA
|
||
|
CONFIG_IDE_PREINIT
|
||
|
CONFIG_IDE_REG_CS
|
||
|
CONFIG_IDE_RESET
|
||
|
CONFIG_IDE_RESET_ROUTINE
|
||
|
CONFIG_IDE_SIL680
|
||
|
CONFIG_IDE_SWAP_IO
|
||
|
CONFIG_IDS8313
|
||
|
CONFIG_IDT8T49N222A
|
||
|
CONFIG_ID_EEPROM
|
||
|
CONFIG_IFM_DEFAULT_ENV_NEW
|
||
|
CONFIG_IFM_DEFAULT_ENV_OLD
|
||
|
CONFIG_IFM_DEFAULT_ENV_SETTINGS
|
||
|
CONFIG_IFM_SENSOR_TYPE
|
||
|
CONFIG_IMA
|
||
|
CONFIG_IMAGE_FORMAT_LEGACY
|
||
|
CONFIG_IMX
|
||
|
CONFIG_IMX31_PHYCORE_EET
|
||
|
CONFIG_IMX6_PWM_PER_CLK
|
||
|
CONFIG_IMX_HDMI
|
||
|
CONFIG_IMX_NAND
|
||
|
CONFIG_IMX_OTP
|
||
|
CONFIG_IMX_VIDEO_SKIP
|
||
|
CONFIG_IMX_WATCHDOG
|
||
|
CONFIG_INETSPACE_V2
|
||
|
CONFIG_INITRD_TAG
|
||
|
CONFIG_INIT_CRITICAL
|
||
|
CONFIG_INIT_IGNORE_ERROR
|
||
|
CONFIG_INIT_TLB
|
||
|
CONFIG_INI_ALLOW_MULTILINE
|
||
|
CONFIG_INI_CASE_INSENSITIVE
|
||
|
CONFIG_INI_MAX_LINE
|
||
|
CONFIG_INI_MAX_NAME
|
||
|
CONFIG_INI_MAX_SECTION
|
||
|
CONFIG_INKA4X0
|
||
|
CONFIG_INTEGRITY
|
||
|
CONFIG_INTEL_ICH6_GPIO
|
||
|
CONFIG_INTERRUPTS
|
||
|
CONFIG_INTIB
|
||
|
CONFIG_IO
|
||
|
CONFIG_IO64
|
||
|
CONFIG_IOCON
|
||
|
CONFIG_IODELAY_RECALIBRATION
|
||
|
CONFIG_IOMUX_LPSR
|
||
|
CONFIG_IOMUX_SHARE_CONF_REG
|
||
|
CONFIG_IOS
|
||
|
CONFIG_IO_TRACE
|
||
|
CONFIG_IP86x
|
||
|
CONFIG_IPADDR
|
||
|
CONFIG_IPADDR1
|
||
|
CONFIG_IPADDR2
|
||
|
CONFIG_IPAM390_GPIO_BOOTMODE
|
||
|
CONFIG_IPAM390_GPIO_LED_GREEN
|
||
|
CONFIG_IPAM390_GPIO_LED_RED
|
||
|
CONFIG_IPEK01
|
||
|
CONFIG_IPIPE
|
||
|
CONFIG_IPROC
|
||
|
CONFIG_IPUV3_CLK
|
||
|
CONFIG_IP_DEFRAG
|
||
|
CONFIG_IRAM_BASE
|
||
|
CONFIG_IRAM_END
|
||
|
CONFIG_IRAM_SIZE
|
||
|
CONFIG_IRAM_STACK
|
||
|
CONFIG_IRAM_TOP
|
||
|
CONFIG_IRDA_BASE
|
||
|
CONFIG_ISO_PARTITION
|
||
|
CONFIG_ISP1362_USB
|
||
|
CONFIG_IS_BUILTIN
|
||
|
CONFIG_IS_ENABLED
|
||
|
CONFIG_IS_INVALID
|
||
|
CONFIG_IS_MODULE
|
||
|
CONFIG_IS_VALID
|
||
|
CONFIG_IVMS8
|
||
|
CONFIG_JFFS2_CMDLINE
|
||
|
CONFIG_JFFS2_DEV
|
||
|
CONFIG_JFFS2_LZO
|
||
|
CONFIG_JFFS2_NAND
|
||
|
CONFIG_JFFS2_PART_OFFSET
|
||
|
CONFIG_JFFS2_PART_SIZE
|
||
|
CONFIG_JFFS2_SUMMARY
|
||
|
CONFIG_JRSTARTR_JR0
|
||
|
CONFIG_JTAG_CONSOLE
|
||
|
CONFIG_JTAG_CONSOLE_TIMEOUT
|
||
|
CONFIG_JUPITER
|
||
|
CONFIG_KALLSYMS
|
||
|
CONFIG_KASAN
|
||
|
CONFIG_KATMAI
|
||
|
CONFIG_KCLK_DIS
|
||
|
CONFIG_KEEP_SERVERADDR
|
||
|
CONFIG_KERNEL_OFFSET
|
||
|
CONFIG_KEYBOARD
|
||
|
CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE
|
||
|
CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE
|
||
|
CONFIG_KEYSTONE_RBL_NAND
|
||
|
CONFIG_KEY_REVOCATION
|
||
|
CONFIG_KGDB_BAUDRATE
|
||
|
CONFIG_KGDB_EXTC_PINSEL
|
||
|
CONFIG_KGDB_EXTC_RATE
|
||
|
CONFIG_KGDB_INDEX
|
||
|
CONFIG_KGDB_ON_SCC
|
||
|
CONFIG_KGDB_ON_SMC
|
||
|
CONFIG_KGDB_SER_INDEX
|
||
|
CONFIG_KILAUEA
|
||
|
CONFIG_KIRKWOOD_EGIGA_INIT
|
||
|
CONFIG_KIRKWOOD_GPIO
|
||
|
CONFIG_KIRKWOOD_PCIE_INIT
|
||
|
CONFIG_KIRKWOOD_RGMII_PAD_1V8
|
||
|
CONFIG_KIRKWOOD_SPI
|
||
|
CONFIG_KIRQ_EN
|
||
|
CONFIG_KM8321
|
||
|
CONFIG_KM8XX
|
||
|
CONFIG_KMCOGE4
|
||
|
CONFIG_KMCOGE5NE
|
||
|
CONFIG_KMETER1
|
||
|
CONFIG_KMLION1
|
||
|
CONFIG_KMOPTI2
|
||
|
CONFIG_KMP204X
|
||
|
CONFIG_KMSUPX5
|
||
|
CONFIG_KMTEGR1
|
||
|
CONFIG_KMTEPR2
|
||
|
CONFIG_KMVECT1
|
||
|
CONFIG_KM_82XX
|
||
|
CONFIG_KM_BOARD_EXTRA_ENV
|
||
|
CONFIG_KM_BOARD_NAME
|
||
|
CONFIG_KM_COGE5UN
|
||
|
CONFIG_KM_COMMON_ETH_INIT
|
||
|
CONFIG_KM_CONSOLE_TTY
|
||
|
CONFIG_KM_CRAMFS_ADDR
|
||
|
CONFIG_KM_DEF_ARCH
|
||
|
CONFIG_KM_DEF_BOOT_ARGS_CPU
|
||
|
CONFIG_KM_DEF_ENV
|
||
|
CONFIG_KM_DEF_ENV_BOOTARGS
|
||
|
CONFIG_KM_DEF_ENV_BOOTPARAMS
|
||
|
CONFIG_KM_DEF_ENV_BOOTTARGETS
|
||
|
CONFIG_KM_DEF_ENV_CONSTANTS
|
||
|
CONFIG_KM_DEF_ENV_CPU
|
||
|
CONFIG_KM_DEF_ENV_FLASH_BOOT
|
||
|
CONFIG_KM_DEF_NETDEV
|
||
|
CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI
|
||
|
CONFIG_KM_DISABLE_PCI
|
||
|
CONFIG_KM_DISABLE_PCIE
|
||
|
CONFIG_KM_ECC_MODE
|
||
|
CONFIG_KM_ENV_IS_IN_SPI_NOR
|
||
|
CONFIG_KM_FDT_ADDR
|
||
|
CONFIG_KM_FPGA_CONFIG
|
||
|
CONFIG_KM_I2C_ABORT
|
||
|
CONFIG_KM_IVM_BUS
|
||
|
CONFIG_KM_KERNEL_ADDR
|
||
|
CONFIG_KM_KIRKWOOD
|
||
|
CONFIG_KM_KIRKWOOD_128M16
|
||
|
CONFIG_KM_KIRKWOOD_PCI
|
||
|
CONFIG_KM_MGCOGE3UN
|
||
|
CONFIG_KM_MVEXTSW_ADDR
|
||
|
CONFIG_KM_NEW_ENV
|
||
|
CONFIG_KM_NUSA
|
||
|
CONFIG_KM_PHRAM
|
||
|
CONFIG_KM_PIGGY4_88E6061
|
||
|
CONFIG_KM_PIGGY4_88E6352
|
||
|
CONFIG_KM_PNVRAM
|
||
|
CONFIG_KM_PORTL2
|
||
|
CONFIG_KM_RESERVED_PRAM
|
||
|
CONFIG_KM_ROOTFSSIZE
|
||
|
CONFIG_KM_SUGP1
|
||
|
CONFIG_KM_SUV31
|
||
|
CONFIG_KM_UBI_LINUX_MTD
|
||
|
CONFIG_KM_UBI_PARTITION_NAME_APP
|
||
|
CONFIG_KM_UBI_PARTITION_NAME_BOOT
|
||
|
CONFIG_KM_UBI_PART_BOOT_OPTS
|
||
|
CONFIG_KM_UIMAGE_NAME
|
||
|
CONFIG_KM_UPDATE_UBOOT
|
||
|
CONFIG_KONA
|
||
|
CONFIG_KONA_GPIO
|
||
|
CONFIG_KONA_RESET_S
|
||
|
CONFIG_KPROBES
|
||
|
CONFIG_KS8851_MLL
|
||
|
CONFIG_KS8851_MLL_BASEADDR
|
||
|
CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE
|
||
|
CONFIG_KSNAV_NETCP_PDMA_RX_BASE
|
||
|
CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM
|
||
|
CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE
|
||
|
CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM
|
||
|
CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE
|
||
|
CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE
|
||
|
CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE
|
||
|
CONFIG_KSNAV_NETCP_PDMA_TX_BASE
|
||
|
CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM
|
||
|
CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE
|
||
|
CONFIG_KSNAV_PKTDMA_NETCP
|
||
|
CONFIG_KSNAV_QM_BASE_ADDRESS
|
||
|
CONFIG_KSNAV_QM_CONF_BASE
|
||
|
CONFIG_KSNAV_QM_DESC_SETUP_BASE
|
||
|
CONFIG_KSNAV_QM_INTD_CONF_BASE
|
||
|
CONFIG_KSNAV_QM_LINK_RAM_BASE
|
||
|
CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE
|
||
|
CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE
|
||
|
CONFIG_KSNAV_QM_PDSP1_CMD_BASE
|
||
|
CONFIG_KSNAV_QM_PDSP1_CTRL_BASE
|
||
|
CONFIG_KSNAV_QM_PDSP1_IRAM_BASE
|
||
|
CONFIG_KSNAV_QM_QPOOL_NUM
|
||
|
CONFIG_KSNAV_QM_QUEUE_STATUS_BASE
|
||
|
CONFIG_KSNAV_QM_REGION_NUM
|
||
|
CONFIG_KSNAV_QM_STATUS_RAM_BASE
|
||
|
CONFIG_KSNET_CPSW_NUM_PORTS
|
||
|
CONFIG_KSNET_MAC_ID_BASE
|
||
|
CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE
|
||
|
CONFIG_KSNET_NETCP_BASE
|
||
|
CONFIG_KSNET_NETCP_V1_0
|
||
|
CONFIG_KSNET_NETCP_V1_5
|
||
|
CONFIG_KSNET_SERDES_LANES_PER_SGMII
|
||
|
CONFIG_KSNET_SERDES_SGMII2_BASE
|
||
|
CONFIG_KSNET_SERDES_SGMII_BASE
|
||
|
CONFIG_KVM_GUEST
|
||
|
CONFIG_KW88F6192
|
||
|
CONFIG_KW88F6281
|
||
|
CONFIG_KW88F6702
|
||
|
CONFIG_KYOCERA_KCS057QV1AJ
|
||
|
CONFIG_KZM_A9_GT
|
||
|
CONFIG_L1_INIT_RAM
|
||
|
CONFIG_L2_CACHE
|
||
|
CONFIG_LAN91C96_USE_32_BIT
|
||
|
CONFIG_LAST_STAGE_INIT
|
||
|
CONFIG_LAYERSCAPE_NS_ACCESS
|
||
|
CONFIG_LBA48
|
||
|
CONFIG_LBD
|
||
|
CONFIG_LBDAF
|
||
|
CONFIG_LCD_ALIGNMENT
|
||
|
CONFIG_LCD_BMP_RLE8
|
||
|
CONFIG_LCD_DT_SIMPLEFB
|
||
|
CONFIG_LCD_INFO
|
||
|
CONFIG_LCD_INFO_BELOW_LOGO
|
||
|
CONFIG_LCD_IN_PSRAM
|
||
|
CONFIG_LCD_LOGO
|
||
|
CONFIG_LCD_MENU
|
||
|
CONFIG_LCD_MENU_BOARD
|
||
|
CONFIG_LCD_NOSTDOUT
|
||
|
CONFIG_LCD_ROTATION
|
||
|
CONFIG_LD9040
|
||
|
CONFIG_LEGACY
|
||
|
CONFIG_LEGACY_BOOTCMD_ENV
|
||
|
CONFIG_LEON_RAM_SDRAM
|
||
|
CONFIG_LEON_RAM_SDRAM_NOSRAM
|
||
|
CONFIG_LEON_RAM_SELECT
|
||
|
CONFIG_LEON_RAM_SRAM
|
||
|
CONFIG_LG4573
|
||
|
CONFIG_LG4573_BUS
|
||
|
CONFIG_LG4573_CS
|
||
|
CONFIG_LIBATA
|
||
|
CONFIG_LIB_HW_RAND
|
||
|
CONFIG_LIB_UUID
|
||
|
CONFIG_LINUX
|
||
|
CONFIG_LINUX_CMDLINE_ADDR
|
||
|
CONFIG_LINUX_CMDLINE_SIZE
|
||
|
CONFIG_LINUX_RESET_VEC
|
||
|
CONFIG_LITTLETON_LCD
|
||
|
CONFIG_LMB
|
||
|
CONFIG_LMS283GF05
|
||
|
CONFIG_LOADADDR
|
||
|
CONFIG_LOADCMD
|
||
|
CONFIG_LOADS_ECHO
|
||
|
CONFIG_LOGBUFFER
|
||
|
CONFIG_LOWBOOT
|
||
|
CONFIG_LOWPOWER_ADDR
|
||
|
CONFIG_LOWPOWER_FLAG
|
||
|
CONFIG_LOW_MCFCLK
|
||
|
CONFIG_LPC32XX_ETH
|
||
|
CONFIG_LPC32XX_ETH_BUFS_BASE
|
||
|
CONFIG_LPC32XX_HSUART
|
||
|
CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY
|
||
|
CONFIG_LPC32XX_NAND_MLC_NAND_TA
|
||
|
CONFIG_LPC32XX_NAND_MLC_RD_HIGH
|
||
|
CONFIG_LPC32XX_NAND_MLC_RD_LOW
|
||
|
CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY
|
||
|
CONFIG_LPC32XX_NAND_MLC_WR_HIGH
|
||
|
CONFIG_LPC32XX_NAND_MLC_WR_LOW
|
||
|
CONFIG_LPC32XX_NAND_SLC_RDR_CLKS
|
||
|
CONFIG_LPC32XX_NAND_SLC_RHOLD
|
||
|
CONFIG_LPC32XX_NAND_SLC_RSETUP
|
||
|
CONFIG_LPC32XX_NAND_SLC_RWIDTH
|
||
|
CONFIG_LPC32XX_NAND_SLC_WDR_CLKS
|
||
|
CONFIG_LPC32XX_NAND_SLC_WHOLD
|
||
|
CONFIG_LPC32XX_NAND_SLC_WSETUP
|
||
|
CONFIG_LPC32XX_NAND_SLC_WWIDTH
|
||
|
CONFIG_LPC32XX_SDRAM_
|
||
|
CONFIG_LPC32XX_SPL
|
||
|
CONFIG_LPC32XX_SSP
|
||
|
CONFIG_LPC32XX_SSP_TIMEOUT
|
||
|
CONFIG_LPC_BASE
|
||
|
CONFIG_LPC_IO_BASE
|
||
|
CONFIG_LPUART
|
||
|
CONFIG_LPUART_32B_REG
|
||
|
CONFIG_LQ035Q1_LCD_MODE
|
||
|
CONFIG_LQ035Q1_SPI_BUS
|
||
|
CONFIG_LQ035Q1_SPI_CS
|
||
|
CONFIG_LQ035Q1_USE_RGB565_8_BIT_PPI
|
||
|
CONFIG_LQ035Q1_USE_RGB888_8_BIT_PPI
|
||
|
CONFIG_LQ038J7DH53
|
||
|
CONFIG_LS102XA
|
||
|
CONFIG_LS102XA_STREAM_ID
|
||
|
CONFIG_LS1043A
|
||
|
CONFIG_LS2080A
|
||
|
CONFIG_LSCHLV2
|
||
|
CONFIG_LSXHL
|
||
|
CONFIG_LUAN
|
||
|
CONFIG_LWMON5
|
||
|
CONFIG_LXT971_NO_SLEEP
|
||
|
CONFIG_LYNXKDI
|
||
|
CONFIG_LZMA
|
||
|
CONFIG_LZO
|
||
|
CONFIG_M41T94_SPI_CS
|
||
|
CONFIG_M520x
|
||
|
CONFIG_M52277EVB
|
||
|
CONFIG_M5253DEMO
|
||
|
CONFIG_M5253EVBE
|
||
|
CONFIG_M5275EVB
|
||
|
CONFIG_M5301x
|
||
|
CONFIG_M54418TWR
|
||
|
CONFIG_M54451EVB
|
||
|
CONFIG_M54455EVB
|
||
|
CONFIG_M88E1111_DISABLE_FIBER
|
||
|
CONFIG_M88E1111_PHY
|
||
|
CONFIG_M88E1112_PHY
|
||
|
CONFIG_M88E1141_PHY
|
||
|
CONFIG_MACB
|
||
|
CONFIG_MACB0_PHY
|
||
|
CONFIG_MACB1_PHY
|
||
|
CONFIG_MACB2_PHY
|
||
|
CONFIG_MACB3_PHY
|
||
|
CONFIG_MACB_SEARCH_PHY
|
||
|
CONFIG_MACH_ASPENITE
|
||
|
CONFIG_MACH_DAVINCI_CALIMAIN
|
||
|
CONFIG_MACH_DAVINCI_DA850_EVM
|
||
|
CONFIG_MACH_DOCKSTAR
|
||
|
CONFIG_MACH_EDMINIV2
|
||
|
CONFIG_MACH_GOFLEXHOME
|
||
|
CONFIG_MACH_GONI
|
||
|
CONFIG_MACH_GURUPLUG
|
||
|
CONFIG_MACH_KM_KIRKWOOD
|
||
|
CONFIG_MACH_OMAPL138_LCDK
|
||
|
CONFIG_MACH_OPENRD_BASE
|
||
|
CONFIG_MACH_SHEEVAPLUG
|
||
|
CONFIG_MACH_SPECIFIC
|
||
|
CONFIG_MACH_TYPE
|
||
|
CONFIG_MACH_TYPE_COMPAT_REV
|
||
|
CONFIG_MACPWR
|
||
|
CONFIG_MACRESET_TIMEOUT
|
||
|
CONFIG_MAC_ADDR_IN_EEPROM
|
||
|
CONFIG_MAC_ADDR_IN_SPIFLASH
|
||
|
CONFIG_MAC_OFFSET
|
||
|
CONFIG_MAC_PARTITION
|
||
|
CONFIG_MAKALU
|
||
|
CONFIG_MALLOC_F_ADDR
|
||
|
CONFIG_MALTA
|
||
|
CONFIG_MARCO_MEMSET
|
||
|
CONFIG_MARUBUN_PCCARD
|
||
|
CONFIG_MARVELL
|
||
|
CONFIG_MARVELL_GPIO
|
||
|
CONFIG_MARVELL_MFP
|
||
|
CONFIG_MASK_AER_AO
|
||
|
CONFIG_MAX_DSP_CPUS
|
||
|
CONFIG_MAX_FPGA_DEVICES
|
||
|
CONFIG_MAX_MEM_MAPPED
|
||
|
CONFIG_MAX_PKT
|
||
|
CONFIG_MAX_RAM_BANK_SIZE
|
||
|
CONFIG_MCAST_TFTP
|
||
|
CONFIG_MCF5249
|
||
|
CONFIG_MCF5253
|
||
|
CONFIG_MCFFEC
|
||
|
CONFIG_MCFPIT
|
||
|
CONFIG_MCFRTC
|
||
|
CONFIG_MCFTMR
|
||
|
CONFIG_MCFUART
|
||
|
CONFIG_MCLK_DIS
|
||
|
CONFIG_MD5
|
||
|
CONFIG_MD5SUM_VERIFY
|
||
|
CONFIG_MDIO_TIMEOUT
|
||
|
CONFIG_MECP5123
|
||
|
CONFIG_MEMSIZE
|
||
|
CONFIG_MEMSIZE_IN_BYTES
|
||
|
CONFIG_MEMSIZE_MASK
|
||
|
CONFIG_MEM_ADD_WDTH
|
||
|
CONFIG_MEM_HOLE_16M
|
||
|
CONFIG_MEM_INIT_VALUE
|
||
|
CONFIG_MEM_REMAP
|
||
|
CONFIG_MEM_SIZE
|
||
|
CONFIG_MENUKEY
|
||
|
CONFIG_MENUPROMPT
|
||
|
CONFIG_MENU_SHOW
|
||
|
CONFIG_MFG_ENV_SETTINGS
|
||
|
CONFIG_MGCOGE
|
||
|
CONFIG_MGCOGE3NE
|
||
|
CONFIG_MIGO_R
|
||
|
CONFIG_MII
|
||
|
CONFIG_MIIM_ADDRESS
|
||
|
CONFIG_MII_DEFAULT_TSEC
|
||
|
CONFIG_MII_INIT
|
||
|
CONFIG_MII_SUPPRESS_PREAMBLE
|
||
|
CONFIG_MINIFAP
|
||
|
CONFIG_MIPS_HUGE_TLB_SUPPORT
|
||
|
CONFIG_MIPS_MT_FPAFF
|
||
|
CONFIG_MIRQ_EN
|
||
|
CONFIG_MISC_COMMON
|
||
|
CONFIG_MISC_INIT_F
|
||
|
CONFIG_MISC_INIT_R
|
||
|
CONFIG_MIU_1BIT_INTERLEAVED
|
||
|
CONFIG_MIU_2BIT_21_7_INTERLEAVED
|
||
|
CONFIG_MIU_2BIT_INTERLEAVED
|
||
|
CONFIG_MIU_LINEAR
|
||
|
CONFIG_MK_edb9301
|
||
|
CONFIG_MK_edb9315a
|
||
|
CONFIG_MMCBOOTCOMMAND
|
||
|
CONFIG_MMCROOT
|
||
|
CONFIG_MMC_DEFAULT_DEV
|
||
|
CONFIG_MMC_RPMB_TRACE
|
||
|
CONFIG_MMC_SPI
|
||
|
CONFIG_MMC_SPI_BUS
|
||
|
CONFIG_MMC_SPI_CRC_ON
|
||
|
CONFIG_MMC_SPI_CS
|
||
|
CONFIG_MMC_SPI_CS_EPGIO
|
||
|
CONFIG_MMC_SPI_MODE
|
||
|
CONFIG_MMC_SPI_SPEED
|
||
|
CONFIG_MMC_SUNXI
|
||
|
CONFIG_MMC_SUNXI_SLOT
|
||
|
CONFIG_MMC_TRACE
|
||
|
CONFIG_MMU
|
||
|
CONFIG_MODVERSIONS
|
||
|
CONFIG_MONITOR_IS_IN_RAM
|
||
|
CONFIG_MOTIONPRO
|
||
|
CONFIG_MP
|
||
|
CONFIG_MPC5121ADS
|
||
|
CONFIG_MPC5121ADS_REV2
|
||
|
CONFIG_MPC512x_FEC
|
||
|
CONFIG_MPC5200
|
||
|
CONFIG_MPC5200_DDR
|
||
|
CONFIG_MPC555
|
||
|
CONFIG_MPC5xxx_FEC
|
||
|
CONFIG_MPC5xxx_FEC_MII10
|
||
|
CONFIG_MPC5xxx_FEC_MII100
|
||
|
CONFIG_MPC823
|
||
|
CONFIG_MPC8247
|
||
|
CONFIG_MPC8255
|
||
|
CONFIG_MPC8272_FAMILY
|
||
|
CONFIG_MPC8308
|
||
|
CONFIG_MPC8308RDB
|
||
|
CONFIG_MPC8308_P1M
|
||
|
CONFIG_MPC8309
|
||
|
CONFIG_MPC830x
|
||
|
CONFIG_MPC8313
|
||
|
CONFIG_MPC8313ERDB
|
||
|
CONFIG_MPC8315
|
||
|
CONFIG_MPC8315ERDB
|
||
|
CONFIG_MPC831x
|
||
|
CONFIG_MPC832XEMDS
|
||
|
CONFIG_MPC832x
|
||
|
CONFIG_MPC8349
|
||
|
CONFIG_MPC8349EMDS
|
||
|
CONFIG_MPC8349ITX
|
||
|
CONFIG_MPC8349ITXGP
|
||
|
CONFIG_MPC834x
|
||
|
CONFIG_MPC8360
|
||
|
CONFIG_MPC837XEMDS
|
||
|
CONFIG_MPC837XERDB
|
||
|
CONFIG_MPC837x
|
||
|
CONFIG_MPC83XX_GPIO
|
||
|
CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION
|
||
|
CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN
|
||
|
CONFIG_MPC83XX_GPIO_0_INIT_VALUE
|
||
|
CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION
|
||
|
CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN
|
||
|
CONFIG_MPC83XX_GPIO_1_INIT_VALUE
|
||
|
CONFIG_MPC83XX_PCI2
|
||
|
CONFIG_MPC850
|
||
|
CONFIG_MPC855
|
||
|
CONFIG_MPC857
|
||
|
CONFIG_MPC85XX_FEC
|
||
|
CONFIG_MPC85XX_FEC_NAME
|
||
|
CONFIG_MPC85XX_PCI2
|
||
|
CONFIG_MPC860
|
||
|
CONFIG_MPC860T
|
||
|
CONFIG_MPC862
|
||
|
CONFIG_MPC866
|
||
|
CONFIG_MPC866_FAMILY
|
||
|
CONFIG_MPC86x
|
||
|
CONFIG_MPC885
|
||
|
CONFIG_MPC885_FAMILY
|
||
|
CONFIG_MPC8XXX_SPI
|
||
|
CONFIG_MPC8XX_LCD
|
||
|
CONFIG_MPC8xxx_DISABLE_BPTR
|
||
|
CONFIG_MPLL_FREQ
|
||
|
CONFIG_MPR2
|
||
|
CONFIG_MPX5200
|
||
|
CONFIG_MP_CLK_FREQ
|
||
|
CONFIG_MS7720SE
|
||
|
CONFIG_MS7722SE
|
||
|
CONFIG_MS7750SE
|
||
|
CONFIG_MSHC_FREQ
|
||
|
CONFIG_MTDMAP
|
||
|
CONFIG_MTDPARTS
|
||
|
CONFIG_MTD_CONCAT
|
||
|
CONFIG_MTD_DEBUG
|
||
|
CONFIG_MTD_DEBUG_VERBOSE
|
||
|
CONFIG_MTD_DEVICE
|
||
|
CONFIG_MTD_ECC_SOFT
|
||
|
CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR
|
||
|
CONFIG_MTD_NAND_ECC_SMC
|
||
|
CONFIG_MTD_NAND_MUSEUM_IDS
|
||
|
CONFIG_MTD_NAND_VERIFY_WRITE
|
||
|
CONFIG_MTD_ONENAND_VERIFY_WRITE
|
||
|
CONFIG_MTD_PARTITION
|
||
|
CONFIG_MTD_PARTITIONS
|
||
|
CONFIG_MTD_UBI_BEB_RESERVE
|
||
|
CONFIG_MTD_UBI_BLOCK
|
||
|
CONFIG_MTD_UBI_DEBUG
|
||
|
CONFIG_MTD_UBI_DEBUG_MSG
|
||
|
CONFIG_MTD_UBI_DEBUG_MSG_BLD
|
||
|
CONFIG_MTD_UBI_DEBUG_MSG_EBA
|
||
|
CONFIG_MTD_UBI_DEBUG_MSG_IO
|
||
|
CONFIG_MTD_UBI_DEBUG_MSG_WL
|
||
|
CONFIG_MTD_UBI_DEBUG_PARANOID
|
||
|
CONFIG_MTD_UBI_GLUEBI
|
||
|
CONFIG_MTD_UBI_MODULE
|
||
|
CONFIG_MULTI_CS
|
||
|
CONFIG_MUNICES
|
||
|
CONFIG_MUSB_HOST
|
||
|
CONFIG_MV88E61XX_CPU_PORT
|
||
|
CONFIG_MV88E61XX_PHY_PORTS
|
||
|
CONFIG_MV88E61XX_SWITCH
|
||
|
CONFIG_MV88E6352_SWITCH
|
||
|
CONFIG_MVEBU_MMC
|
||
|
CONFIG_MVGBE
|
||
|
CONFIG_MVGBE_PORTS
|
||
|
CONFIG_MVMFP_V2
|
||
|
CONFIG_MVNETA
|
||
|
CONFIG_MVS
|
||
|
CONFIG_MVSATA_IDE
|
||
|
CONFIG_MVSATA_IDE_USE_PORT0
|
||
|
CONFIG_MVSATA_IDE_USE_PORT1
|
||
|
CONFIG_MV_ETH_RXQ
|
||
|
CONFIG_MV_I2C_NUM
|
||
|
CONFIG_MV_I2C_REG
|
||
|
CONFIG_MX23
|
||
|
CONFIG_MX25
|
||
|
CONFIG_MX25_CLK32
|
||
|
CONFIG_MX25_HCLK_FREQ
|
||
|
CONFIG_MX27
|
||
|
CONFIG_MX27_CLK32
|
||
|
CONFIG_MX27_TIMER_HIGH_PRECISION
|
||
|
CONFIG_MX28
|
||
|
CONFIG_MX28_FEC_MAC_IN_OCOTP
|
||
|
CONFIG_MX31
|
||
|
CONFIG_MX31_CLK32
|
||
|
CONFIG_MX31_HCLK_FREQ
|
||
|
CONFIG_MX35
|
||
|
CONFIG_MX35_CLK32
|
||
|
CONFIG_MX35_HCLK_FREQ
|
||
|
CONFIG_MX6DL_LPDDR2
|
||
|
CONFIG_MX6DQ_LPDDR2
|
||
|
CONFIG_MX6SX_SABRESD_REVA
|
||
|
CONFIG_MX6UL_14X14_EVK_EMMC_REWORK
|
||
|
CONFIG_MXC_EPDC
|
||
|
CONFIG_MXC_GPIO
|
||
|
CONFIG_MXC_GPT_HCLK
|
||
|
CONFIG_MXC_MCI_REGS_BASE
|
||
|
CONFIG_MXC_MMC
|
||
|
CONFIG_MXC_NAND_HWECC
|
||
|
CONFIG_MXC_NAND_IP_REGS_BASE
|
||
|
CONFIG_MXC_NAND_REGS_BASE
|
||
|
CONFIG_MXC_SPI
|
||
|
CONFIG_MXC_UART_BASE
|
||
|
CONFIG_MXC_USB_FLAGS
|
||
|
CONFIG_MXC_USB_PORT
|
||
|
CONFIG_MXC_USB_PORTSC
|
||
|
CONFIG_MXS
|
||
|
CONFIG_MXS_AUART
|
||
|
CONFIG_MXS_AUART_BASE
|
||
|
CONFIG_MXS_GPIO
|
||
|
CONFIG_MXS_MMC
|
||
|
CONFIG_MXS_OCOTP
|
||
|
CONFIG_MXS_SPI
|
||
|
CONFIG_MX_CYCLIC
|
||
|
CONFIG_MY_OPTION
|
||
|
CONFIG_NAND
|
||
|
CONFIG_NANDFLASH_SIZE
|
||
|
CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
|
||
|
CONFIG_NAND_ACTL
|
||
|
CONFIG_NAND_ATMEL
|
||
|
CONFIG_NAND_CS_INIT
|
||
|
CONFIG_NAND_DATA_REG
|
||
|
CONFIG_NAND_DAVINCI
|
||
|
CONFIG_NAND_DENALI_ECC_SIZE
|
||
|
CONFIG_NAND_ECC_BCH
|
||
|
CONFIG_NAND_ENV_DST
|
||
|
CONFIG_NAND_FSL_ELBC
|
||
|
CONFIG_NAND_FSL_IFC
|
||
|
CONFIG_NAND_FSL_NFC
|
||
|
CONFIG_NAND_FSMC
|
||
|
CONFIG_NAND_KIRKWOOD
|
||
|
CONFIG_NAND_KMETER1
|
||
|
CONFIG_NAND_LPC32XX_MLC
|
||
|
CONFIG_NAND_LPC32XX_SLC
|
||
|
CONFIG_NAND_MODE_REG
|
||
|
CONFIG_NAND_MPC5121_NFC
|
||
|
CONFIG_NAND_MXC
|
||
|
CONFIG_NAND_MXC_V1_1
|
||
|
CONFIG_NAND_NDFC
|
||
|
CONFIG_NAND_OMAP_ECCSCHEME
|
||
|
CONFIG_NAND_OMAP_ELM
|
||
|
CONFIG_NAND_OMAP_GPMC
|
||
|
CONFIG_NAND_OMAP_GPMC_PREFETCH
|
||
|
CONFIG_NAND_OMAP_GPMC_WSCFG
|
||
|
CONFIG_NAND_PLAT
|
||
|
CONFIG_NAND_SECBOOT
|
||
|
CONFIG_NAND_SPL
|
||
|
CONFIG_NAND_U_BOOT
|
||
|
CONFIG_NATSEMI
|
||
|
CONFIG_NB
|
||
|
CONFIG_NCEL2C100_BASE
|
||
|
CONFIG_NCEMIC100_BASE
|
||
|
CONFIG_NDS_DLM1_BASE
|
||
|
CONFIG_NDS_DLM2_BASE
|
||
|
CONFIG_NEC_NL6448AC33
|
||
|
CONFIG_NEC_NL6448BC20
|
||
|
CONFIG_NEC_NL6448BC33_54
|
||
|
CONFIG_NEEDS_MANUAL_RELOC
|
||
|
CONFIG_NEO
|
||
|
CONFIG_NET2BIG_V2
|
||
|
CONFIG_NETCONSOLE_BUFFER_SIZE
|
||
|
CONFIG_NETDEV
|
||
|
CONFIG_NETMASK
|
||
|
CONFIG_NETSPACE_LITE_V2
|
||
|
CONFIG_NETSPACE_MAX_V2
|
||
|
CONFIG_NETSPACE_MINI_V2
|
||
|
CONFIG_NETSPACE_V2
|
||
|
CONFIG_NET_MAXDEFRAG
|
||
|
CONFIG_NET_MULTI
|
||
|
CONFIG_NET_RETRY_COUNT
|
||
|
CONFIG_NEVER_ASSERT_ODT_TO_CPU
|
||
|
CONFIG_NFC_FREQ
|
||
|
CONFIG_NFSBOOTCOMMAND
|
||
|
CONFIG_NFS_READ_SIZE
|
||
|
CONFIG_NFS_TIMEOUT
|
||
|
CONFIG_NOBQFMAN
|
||
|
CONFIG_NON_SECURE
|
||
|
CONFIG_NORBOOT
|
||
|
CONFIG_NORFLASH_PS32BIT
|
||
|
CONFIG_NOT_SELECTED
|
||
|
CONFIG_NO_ETH
|
||
|
CONFIG_NO_RELOCATION
|
||
|
CONFIG_NO_SERIAL_EEPROM
|
||
|
CONFIG_NO_WAIT
|
||
|
CONFIG_NR_CPUS
|
||
|
CONFIG_NR_DRAM_BANKS
|
||
|
CONFIG_NR_DRAM_BANKS_MAX
|
||
|
CONFIG_NR_DRAM_POPULATED
|
||
|
CONFIG_NS16550_MIN_FUNCTIONS
|
||
|
CONFIG_NS8382X
|
||
|
CONFIG_NS87308
|
||
|
CONFIG_NUM_DSP_CPUS
|
||
|
CONFIG_NUM_PAMU
|
||
|
CONFIG_OCLK_DIV
|
||
|
CONFIG_ODROID_REV_AIN
|
||
|
CONFIG_OFF_PADCONF
|
||
|
CONFIG_OF_
|
||
|
CONFIG_OF_IDE_FIXUP
|
||
|
CONFIG_OF_SPI
|
||
|
CONFIG_OF_SPI_FLASH
|
||
|
CONFIG_OF_STDOUT_PATH
|
||
|
CONFIG_OF_SUPPORT_OLD_DEVICE_TREES
|
||
|
CONFIG_OMAP
|
||
|
CONFIG_OMAP3430
|
||
|
CONFIG_OMAP3_AM3517CRANE
|
||
|
CONFIG_OMAP3_DEVKIT8000
|
||
|
CONFIG_OMAP3_EVM
|
||
|
CONFIG_OMAP3_GPIO_2
|
||
|
CONFIG_OMAP3_GPIO_3
|
||
|
CONFIG_OMAP3_GPIO_4
|
||
|
CONFIG_OMAP3_GPIO_5
|
||
|
CONFIG_OMAP3_GPIO_6
|
||
|
CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID
|
||
|
CONFIG_OMAP3_MCX
|
||
|
CONFIG_OMAP3_MICRON_DDR
|
||
|
CONFIG_OMAP3_RX51
|
||
|
CONFIG_OMAP3_SPI_D0_D1_SWAPPED
|
||
|
CONFIG_OMAP3_ZOOM1
|
||
|
CONFIG_OMAP4430
|
||
|
CONFIG_OMAP54X
|
||
|
CONFIG_OMAP_EHCI_PHY1_RESET_GPIO
|
||
|
CONFIG_OMAP_EHCI_PHY2_RESET_GPIO
|
||
|
CONFIG_OMAP_EHCI_PHY3_RESET_GPIO
|
||
|
CONFIG_OMAP_GPIO
|
||
|
CONFIG_OMAP_HSMMC
|
||
|
CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC
|
||
|
CONFIG_OMAP_USB2PHY2_HOST
|
||
|
CONFIG_OMAP_USB3PHY1_HOST
|
||
|
CONFIG_OMAP_USB_PHY
|
||
|
CONFIG_OMAP_VC_I2C_HS_MCODE
|
||
|
CONFIG_OMAP_WATCHDOG
|
||
|
CONFIG_OPTREX_BW
|
||
|
CONFIG_ORIGEN
|
||
|
CONFIG_OS1_ENV_ADDR
|
||
|
CONFIG_OS2_ENV_ADDR
|
||
|
CONFIG_OS_ENV_ADDR
|
||
|
CONFIG_OTHBOOTARGS
|
||
|
CONFIG_OVERWRITE_ETHADDR_ONCE
|
||
|
CONFIG_PAGE_CNT_MASK
|
||
|
CONFIG_PAGE_CNT_SHIFT
|
||
|
CONFIG_PALMAS_AUDPWR
|
||
|
CONFIG_PALMAS_POWER
|
||
|
CONFIG_PALMAS_SMPS7_FPWM
|
||
|
CONFIG_PALMAS_USB_SS_PWR
|
||
|
CONFIG_PANIC_HANG
|
||
|
CONFIG_PARAVIRT
|
||
|
CONFIG_PARTITION_TYPE_GUID
|
||
|
CONFIG_PARTITION_UUIDS
|
||
|
CONFIG_PATA_BFIN
|
||
|
CONFIG_PATI
|
||
|
CONFIG_PB1000
|
||
|
CONFIG_PB1100
|
||
|
CONFIG_PB1500
|
||
|
CONFIG_PB1X00
|
||
|
CONFIG_PCA953X
|
||
|
CONFIG_PCA9564_BASE
|
||
|
CONFIG_PCA9564_I2C
|
||
|
CONFIG_PCA9698
|
||
|
CONFIG_PCI1
|
||
|
CONFIG_PCI2
|
||
|
CONFIG_PCIAUTO_SKIP_HOST_BRIDGE
|
||
|
CONFIG_PCIE
|
||
|
CONFIG_PCIE1
|
||
|
CONFIG_PCIE2
|
||
|
CONFIG_PCIE3
|
||
|
CONFIG_PCIE4
|
||
|
CONFIG_PCIE_IMX
|
||
|
CONFIG_PCIE_IMX_PERST_GPIO
|
||
|
CONFIG_PCIE_IMX_POWER_GPIO
|
||
|
CONFIG_PCIE_LAYERSCAPE
|
||
|
CONFIG_PCISLAVE
|
||
|
CONFIG_PCIX_CHECK
|
||
|
CONFIG_PCI_33M
|
||
|
CONFIG_PCI_4xx_PTM_OVERWRITE
|
||
|
CONFIG_PCI_66M
|
||
|
CONFIG_PCI_BOOTDELAY
|
||
|
CONFIG_PCI_CLK_FREQ
|
||
|
CONFIG_PCI_CONFIG_HOST_BRIDGE
|
||
|
CONFIG_PCI_DISABLE_PCIE
|
||
|
CONFIG_PCI_EHCI_DEVICE
|
||
|
CONFIG_PCI_EHCI_DEVNO
|
||
|
CONFIG_PCI_ENUM_ONLY
|
||
|
CONFIG_PCI_FIXUP_DEV
|
||
|
CONFIG_PCI_GT64120
|
||
|
CONFIG_PCI_HOST
|
||
|
CONFIG_PCI_INDIRECT_BRIDGE
|
||
|
CONFIG_PCI_IO_BUS
|
||
|
CONFIG_PCI_IO_PHYS
|
||
|
CONFIG_PCI_IO_SIZE
|
||
|
CONFIG_PCI_MEMORY_BUS
|
||
|
CONFIG_PCI_MEMORY_PHYS
|
||
|
CONFIG_PCI_MEMORY_SIZE
|
||
|
CONFIG_PCI_MEM_BUS
|
||
|
CONFIG_PCI_MEM_PHYS
|
||
|
CONFIG_PCI_MEM_SIZE
|
||
|
CONFIG_PCI_MSC01
|
||
|
CONFIG_PCI_MVEBU
|
||
|
CONFIG_PCI_NOSCAN
|
||
|
CONFIG_PCI_OHCI
|
||
|
CONFIG_PCI_OHCI_DEVNO
|
||
|
CONFIG_PCI_PREF_BUS
|
||
|
CONFIG_PCI_PREF_PHYS
|
||
|
CONFIG_PCI_PREF_SIZE
|
||
|
CONFIG_PCI_SCAN_SHOW
|
||
|
CONFIG_PCI_SKIP_HOST_BRIDGE
|
||
|
CONFIG_PCI_SYS_BUS
|
||
|
CONFIG_PCI_SYS_MEM_BUS
|
||
|
CONFIG_PCI_SYS_MEM_PHYS
|
||
|
CONFIG_PCI_SYS_MEM_SIZE
|
||
|
CONFIG_PCI_SYS_PHYS
|
||
|
CONFIG_PCI_SYS_SIZE
|
||
|
CONFIG_PCMCIA
|
||
|
CONFIG_PCMCIA_SLOT_A
|
||
|
CONFIG_PCMCIA_SLOT_B
|
||
|
CONFIG_PCNET
|
||
|
CONFIG_PCNET_79C973
|
||
|
CONFIG_PCNET_79C975
|
||
|
CONFIG_PDM360NG
|
||
|
CONFIG_PDSP188x
|
||
|
CONFIG_PEN_ADDR_BIG_ENDIAN
|
||
|
CONFIG_PERIF1_FREQ
|
||
|
CONFIG_PERIF2_FREQ
|
||
|
CONFIG_PERIF3_FREQ
|
||
|
CONFIG_PERIF4_FREQ
|
||
|
CONFIG_PHY1_ADDR
|
||
|
CONFIG_PHY2_ADDR
|
||
|
CONFIG_PHY3_ADDR
|
||
|
CONFIG_PHYCORE_MPC5200B_TINY
|
||
|
CONFIG_PHYLIB_10G
|
||
|
CONFIG_PHYSMEM
|
||
|
CONFIG_PHY_ADDR
|
||
|
CONFIG_PHY_AQUANTIA
|
||
|
CONFIG_PHY_ATHEROS
|
||
|
CONFIG_PHY_BASE_ADR
|
||
|
CONFIG_PHY_BCM5421S
|
||
|
CONFIG_PHY_BROADCOM
|
||
|
CONFIG_PHY_CLK_FREQ
|
||
|
CONFIG_PHY_CLOCK_FREQ
|
||
|
CONFIG_PHY_CMD_DELAY
|
||
|
CONFIG_PHY_CORTINA
|
||
|
CONFIG_PHY_DAVICOM
|
||
|
CONFIG_PHY_DYNAMIC_ANEG
|
||
|
CONFIG_PHY_ET1011C
|
||
|
CONFIG_PHY_ET1011C_TX_CLK_FIX
|
||
|
CONFIG_PHY_GIGE
|
||
|
CONFIG_PHY_ID
|
||
|
CONFIG_PHY_INTERFACE_MODE
|
||
|
CONFIG_PHY_IRAM_BASE
|
||
|
CONFIG_PHY_KSZ9031
|
||
|
CONFIG_PHY_LXT
|
||
|
CONFIG_PHY_M88E1111
|
||
|
CONFIG_PHY_MARVELL
|
||
|
CONFIG_PHY_MAX_ADDR
|
||
|
CONFIG_PHY_MICREL
|
||
|
CONFIG_PHY_MICREL_KSZ9021
|
||
|
CONFIG_PHY_MICREL_KSZ9031
|
||
|
CONFIG_PHY_MODE_NEED_CHANGE
|
||
|
CONFIG_PHY_NATSEMI
|
||
|
CONFIG_PHY_REALTEK
|
||
|
CONFIG_PHY_RESET
|
||
|
CONFIG_PHY_RESET_DELAY
|
||
|
CONFIG_PHY_SMSC
|
||
|
CONFIG_PHY_TERANETICS
|
||
|
CONFIG_PHY_TI
|
||
|
CONFIG_PHY_TYPE
|
||
|
CONFIG_PHY_VITESSE
|
||
|
CONFIG_PHY_XILINX
|
||
|
CONFIG_PHYx_ADDR
|
||
|
CONFIG_PICOSAM
|
||
|
CONFIG_PIGGY_MAC_ADRESS_OFFSET
|
||
|
CONFIG_PIP405
|
||
|
CONFIG_PIXIS_BRDCFG0_SPI
|
||
|
CONFIG_PIXIS_BRDCFG0_USB2
|
||
|
CONFIG_PIXIS_BRDCFG1_AUDCLK_11
|
||
|
CONFIG_PIXIS_BRDCFG1_AUDCLK_12
|
||
|
CONFIG_PIXIS_BRDCFG1_AUDCLK_MASK
|
||
|
CONFIG_PIXIS_BRDCFG1_SSI_TDM_MASK
|
||
|
CONFIG_PIXIS_BRDCFG1_SSI_TDM_SSI
|
||
|
CONFIG_PIXIS_BRDCFG1_TDM
|
||
|
CONFIG_PIXIS_SGMII_CMD
|
||
|
CONFIG_PL010_SERIAL
|
||
|
CONFIG_PL011_CLOCK
|
||
|
CONFIG_PL011_SERIAL
|
||
|
CONFIG_PL011_SERIAL_RLCR
|
||
|
CONFIG_PL01X_SERIAL
|
||
|
CONFIG_PL01x_PORTS
|
||
|
CONFIG_PLATFORM_ENV_SETTINGS
|
||
|
CONFIG_PLATINUM_BOARD
|
||
|
CONFIG_PLATINUM_CPU
|
||
|
CONFIG_PLATINUM_PICON
|
||
|
CONFIG_PLATINUM_PROJECT
|
||
|
CONFIG_PLATINUM_TITANIUM
|
||
|
CONFIG_PLL
|
||
|
CONFIG_PLL1_CLK_FREQ
|
||
|
CONFIG_PLL1_DIV2_CLK_FREQ
|
||
|
CONFIG_PLL_BYPASS
|
||
|
CONFIG_PLL_CTL_VAL
|
||
|
CONFIG_PLL_DIV_VAL
|
||
|
CONFIG_PLL_LOCKCNT_VAL
|
||
|
CONFIG_PLU405
|
||
|
CONFIG_PM
|
||
|
CONFIG_PM9261
|
||
|
CONFIG_PM9263
|
||
|
CONFIG_PM9G45
|
||
|
CONFIG_PMC405DE
|
||
|
CONFIG_PMC_BR_PRELIM
|
||
|
CONFIG_PMC_OR_PRELIM
|
||
|
CONFIG_PMECC_CAP
|
||
|
CONFIG_PMECC_INDEX_TABLE_OFFSET
|
||
|
CONFIG_PMECC_SECTOR_SIZE
|
||
|
CONFIG_PME_PLAT_CLK_DIV
|
||
|
CONFIG_PMIC
|
||
|
CONFIG_PMU
|
||
|
CONFIG_PMW_BASE
|
||
|
CONFIG_PM_SLEEP
|
||
|
CONFIG_PORTMUX_PIO
|
||
|
CONFIG_PORT_ADDR
|
||
|
CONFIG_PORT_AP
|
||
|
CONFIG_PORT_BEM
|
||
|
CONFIG_PORT_BME
|
||
|
CONFIG_PORT_BS
|
||
|
CONFIG_PORT_BU
|
||
|
CONFIG_PORT_BW
|
||
|
CONFIG_PORT_CR
|
||
|
CONFIG_PORT_CSN
|
||
|
CONFIG_PORT_OEN
|
||
|
CONFIG_PORT_PEN
|
||
|
CONFIG_PORT_RE
|
||
|
CONFIG_PORT_SOR
|
||
|
CONFIG_PORT_TH
|
||
|
CONFIG_PORT_TWE
|
||
|
CONFIG_PORT_WBF
|
||
|
CONFIG_PORT_WBN
|
||
|
CONFIG_POST
|
||
|
CONFIG_POSTBOOTMENU
|
||
|
CONFIG_POST_ALT_LIST
|
||
|
CONFIG_POST_BSPEC1
|
||
|
CONFIG_POST_BSPEC1_GPIO_LEDS
|
||
|
CONFIG_POST_BSPEC2
|
||
|
CONFIG_POST_BSPEC2_GPIO_BUTTONS
|
||
|
CONFIG_POST_BSPEC2_GPIO_NAMES
|
||
|
CONFIG_POST_BSPEC3
|
||
|
CONFIG_POST_BSPEC4
|
||
|
CONFIG_POST_BSPEC5
|
||
|
CONFIG_POST_EXTERNAL_WORD_FUNCS
|
||
|
CONFIG_POST_KEY_MAGIC
|
||
|
CONFIG_POST_SKIP_ENV_FLAGS
|
||
|
CONFIG_POST_STD_LIST
|
||
|
CONFIG_POST_UART
|
||
|
CONFIG_POST_WATCHDOG
|
||
|
CONFIG_POWER
|
||
|
CONFIG_POWER_FSL
|
||
|
CONFIG_POWER_FSL_MC13892
|
||
|
CONFIG_POWER_FSL_MC34704
|
||
|
CONFIG_POWER_HI6553
|
||
|
CONFIG_POWER_I2C
|
||
|
CONFIG_POWER_LTC3676
|
||
|
CONFIG_POWER_LTC3676_I2C_ADDR
|
||
|
CONFIG_POWER_MAX77696
|
||
|
CONFIG_POWER_MAX77696_I2C_ADDR
|
||
|
CONFIG_POWER_PFUZE100
|
||
|
CONFIG_POWER_PFUZE100_I2C_ADDR
|
||
|
CONFIG_POWER_PFUZE3000
|
||
|
CONFIG_POWER_PFUZE3000_I2C_ADDR
|
||
|
CONFIG_POWER_SPI
|
||
|
CONFIG_POWER_TPS62362
|
||
|
CONFIG_POWER_TPS65090_EC
|
||
|
CONFIG_POWER_TPS65217
|
||
|
CONFIG_POWER_TPS65218
|
||
|
CONFIG_POWER_TPS65910
|
||
|
CONFIG_PPC4XX_RAPIDIO_DEBUG
|
||
|
CONFIG_PPC4XX_RAPIDIO_IN_BAR_USE_OCM
|
||
|
CONFIG_PPC4XX_RAPIDIO_LOOPBACK
|
||
|
CONFIG_PPC4XX_RAPIDIO_PROMISCUOUS_MODE
|
||
|
CONFIG_PPC4XX_RAPIDIO_USE_HB_PLB
|
||
|
CONFIG_PPC4xx_DDR_AUTOCALIBRATION
|
||
|
CONFIG_PPC4xx_DDR_METHOD_A
|
||
|
CONFIG_PPC4xx_EMAC
|
||
|
CONFIG_PPC64BRIDGE
|
||
|
CONFIG_PPC_CLUSTER_START
|
||
|
CONFIG_PPC_SPINTABLE_COMPATIBLE
|
||
|
CONFIG_PQ_MDS_PIB
|
||
|
CONFIG_PQ_MDS_PIB_ATM
|
||
|
CONFIG_PRAM
|
||
|
CONFIG_PREBOOT
|
||
|
CONFIG_PRIMEVIEW_V16C6448AC
|
||
|
CONFIG_PRINTK
|
||
|
CONFIG_PROC_FS
|
||
|
CONFIG_PROFILE_ALL_BRANCHES
|
||
|
CONFIG_PROFILING
|
||
|
CONFIG_PROG_FDT
|
||
|
CONFIG_PROG_FDT1
|
||
|
CONFIG_PROG_FDT2
|
||
|
CONFIG_PROG_OS
|
||
|
CONFIG_PROG_OS1
|
||
|
CONFIG_PROG_OS2
|
||
|
CONFIG_PROG_SDRAM_TLB
|
||
|
CONFIG_PROG_UBOOT
|
||
|
CONFIG_PROG_UBOOT1
|
||
|
CONFIG_PROG_UBOOT2
|
||
|
CONFIG_PROOF_POINTS
|
||
|
CONFIG_PRPMC_PCI_ALIAS
|
||
|
CONFIG_PS2KBD
|
||
|
CONFIG_PS2MULT
|
||
|
CONFIG_PS2MULT_DELAY
|
||
|
CONFIG_PS2SERIAL
|
||
|
CONFIG_PSC3_USB
|
||
|
CONFIG_PSC_CONSOLE
|
||
|
CONFIG_PSC_CONSOLE2
|
||
|
CONFIG_PSRAM_SCFG
|
||
|
CONFIG_PWM
|
||
|
CONFIG_PWM_IMX
|
||
|
CONFIG_PXA_LCD
|
||
|
CONFIG_PXA_MMC_GENERIC
|
||
|
CONFIG_PXA_PWR_I2C
|
||
|
CONFIG_PXA_STD_I2C
|
||
|
CONFIG_PXA_VGA
|
||
|
CONFIG_PXA_VIDEO
|
||
|
CONFIG_P_CLK_FREQ
|
||
|
CONFIG_QBMAN_CLK_DIV
|
||
|
CONFIG_QE
|
||
|
CONFIG_QEMU_MIPS
|
||
|
CONFIG_QIXIS_I2C_ACCESS
|
||
|
CONFIG_QSPI
|
||
|
CONFIG_QSPI_QUAD_SUPPORT
|
||
|
CONFIG_QSPI_SEL_GPIO
|
||
|
CONFIG_QUOTA
|
||
|
CONFIG_R0P7734
|
||
|
CONFIG_R2DPLUS
|
||
|
CONFIG_R7780MP
|
||
|
CONFIG_R8A66597_BASE_ADDR
|
||
|
CONFIG_R8A66597_ENDIAN
|
||
|
CONFIG_R8A66597_LDRV
|
||
|
CONFIG_R8A66597_XTAL
|
||
|
CONFIG_R8A7740
|
||
|
CONFIG_R8A7790
|
||
|
CONFIG_R8A7791
|
||
|
CONFIG_R8A7792
|
||
|
CONFIG_R8A7793
|
||
|
CONFIG_R8A7794
|
||
|
CONFIG_RAINIER
|
||
|
CONFIG_RAMBOOT
|
||
|
CONFIG_RAMBOOTCOMMAND
|
||
|
CONFIG_RAMBOOTCOMMAND_TFTP
|
||
|
CONFIG_RAMBOOT_NAND
|
||
|
CONFIG_RAMBOOT_PBL
|
||
|
CONFIG_RAMBOOT_SDCARD
|
||
|
CONFIG_RAMBOOT_SPIFLASH
|
||
|
CONFIG_RAMBOOT_TEXT_BASE
|
||
|
CONFIG_RAMDISKFILE
|
||
|
CONFIG_RAMDISK_ADDR
|
||
|
CONFIG_RAMDISK_BOOT
|
||
|
CONFIG_RAM_BOOT
|
||
|
CONFIG_RAM_BOOT_PHYS
|
||
|
CONFIG_RANDOM_UUID
|
||
|
CONFIG_RAPIDIO
|
||
|
CONFIG_RBTREE
|
||
|
CONFIG_RCAR_BOARD_STRING
|
||
|
CONFIG_RD_LVL
|
||
|
CONFIG_REALMODE_DEBUG
|
||
|
CONFIG_RED_LED
|
||
|
CONFIG_REFCLK_FREQ
|
||
|
CONFIG_REG
|
||
|
CONFIG_REG_0
|
||
|
CONFIG_REG_1_BASE
|
||
|
CONFIG_REG_2
|
||
|
CONFIG_REG_3
|
||
|
CONFIG_REG_8
|
||
|
CONFIG_REG_APER_SIZE
|
||
|
CONFIG_RELOC_GOT_SKIP_NULL
|
||
|
CONFIG_REMAKE_ELF
|
||
|
CONFIG_REQ
|
||
|
CONFIG_RESERVED_01_BASE
|
||
|
CONFIG_RESERVED_02_BASE
|
||
|
CONFIG_RESERVED_03_BASE
|
||
|
CONFIG_RESERVED_04_BASE
|
||
|
CONFIG_RESET
|
||
|
CONFIG_RESET_PHY_R
|
||
|
CONFIG_RESET_TO_RETRY
|
||
|
CONFIG_RESET_VECTOR_ADDRESS
|
||
|
CONFIG_RESTORE_FLASH
|
||
|
CONFIG_RES_BLOCK_SIZE
|
||
|
CONFIG_REV1
|
||
|
CONFIG_REV3
|
||
|
CONFIG_REVISION_TAG
|
||
|
CONFIG_RFSPART
|
||
|
CONFIG_RGMII
|
||
|
CONFIG_RIO
|
||
|
CONFIG_RMII
|
||
|
CONFIG_RMOBILE_BOARD_STRING
|
||
|
CONFIG_RMSTP0_ENA
|
||
|
CONFIG_RMSTP10_ENA
|
||
|
CONFIG_RMSTP11_ENA
|
||
|
CONFIG_RMSTP1_ENA
|
||
|
CONFIG_RMSTP2_ENA
|
||
|
CONFIG_RMSTP3_ENA
|
||
|
CONFIG_RMSTP4_ENA
|
||
|
CONFIG_RMSTP5_ENA
|
||
|
CONFIG_RMSTP6_ENA
|
||
|
CONFIG_RMSTP7_ENA
|
||
|
CONFIG_RMSTP8_ENA
|
||
|
CONFIG_RMSTP9_ENA
|
||
|
CONFIG_ROCKCHIP_CHIP_TAG
|
||
|
CONFIG_ROCKCHIP_MAX_INIT_SIZE
|
||
|
CONFIG_ROCKCHIP_SDHCI_MAX_FREQ
|
||
|
CONFIG_ROCKCHIP_USB2_PHY
|
||
|
CONFIG_ROM_STUBS
|
||
|
CONFIG_ROOTFS_OFFSET
|
||
|
CONFIG_ROOTPATH
|
||
|
CONFIG_RSK7203
|
||
|
CONFIG_RSK7264
|
||
|
CONFIG_RSK7269
|
||
|
CONFIG_RTC_BFIN
|
||
|
CONFIG_RTC_DS1307
|
||
|
CONFIG_RTC_DS1337
|
||
|
CONFIG_RTC_DS1338
|
||
|
CONFIG_RTC_DS1374
|
||
|
CONFIG_RTC_DS1388
|
||
|
CONFIG_RTC_DS1556
|
||
|
CONFIG_RTC_DS174x
|
||
|
CONFIG_RTC_DS3231
|
||
|
CONFIG_RTC_FTRTC010
|
||
|
CONFIG_RTC_IMXDI
|
||
|
CONFIG_RTC_INTERNAL
|
||
|
CONFIG_RTC_M41T11
|
||
|
CONFIG_RTC_M41T60
|
||
|
CONFIG_RTC_M41T62
|
||
|
CONFIG_RTC_M48T35A
|
||
|
CONFIG_RTC_MC13XXX
|
||
|
CONFIG_RTC_MC146818
|
||
|
CONFIG_RTC_MCFRRTC
|
||
|
CONFIG_RTC_MCP79411
|
||
|
CONFIG_RTC_MPC5200
|
||
|
CONFIG_RTC_MPC8xx
|
||
|
CONFIG_RTC_MV
|
||
|
CONFIG_RTC_MXS
|
||
|
CONFIG_RTC_PCF8563
|
||
|
CONFIG_RTC_PT7C4338
|
||
|
CONFIG_RTC_RTC4543
|
||
|
CONFIG_RTC_RV3029
|
||
|
CONFIG_RTC_RX8025
|
||
|
CONFIG_RTC_X1205
|
||
|
CONFIG_RUN_FROM_DDR0
|
||
|
CONFIG_RUN_FROM_DDR1
|
||
|
CONFIG_RUN_FROM_IRAM_ONLY
|
||
|
CONFIG_RX_DESCR_NUM
|
||
|
CONFIG_S32V234
|
||
|
CONFIG_S3C2400
|
||
|
CONFIG_S3C2410
|
||
|
CONFIG_S3C2410_NAND_BBT
|
||
|
CONFIG_S3C2410_NAND_HWECC
|
||
|
CONFIG_S3C2440
|
||
|
CONFIG_S3C24X0
|
||
|
CONFIG_S3C24XX_TACLS
|
||
|
CONFIG_S3C24XX_TWRPH0
|
||
|
CONFIG_S3C24XX_TWRPH1
|
||
|
CONFIG_S3D2_CLK_FREQ
|
||
|
CONFIG_S5P
|
||
|
CONFIG_S5PC100
|
||
|
CONFIG_S5PC110
|
||
|
CONFIG_S5P_PA_SYSRAM
|
||
|
CONFIG_S6E63D6
|
||
|
CONFIG_S6E8AX0
|
||
|
CONFIG_SABRELITE
|
||
|
CONFIG_SAMA5D2
|
||
|
CONFIG_SAMA5D3
|
||
|
CONFIG_SAMA5D3_LCD_BASE
|
||
|
CONFIG_SAMA5D4
|
||
|
CONFIG_SAMSUNG
|
||
|
CONFIG_SAMSUNG_ONENAND
|
||
|
CONFIG_SANDBOX_ARCH
|
||
|
CONFIG_SANDBOX_BIG_ENDIAN
|
||
|
CONFIG_SANDBOX_BITS_PER_LONG
|
||
|
CONFIG_SANDBOX_SDL
|
||
|
CONFIG_SANDBOX_SPI_MAX_BUS
|
||
|
CONFIG_SANDBOX_SPI_MAX_CS
|
||
|
CONFIG_SAR2_REG
|
||
|
CONFIG_SAR_REG
|
||
|
CONFIG_SATA1
|
||
|
CONFIG_SATA2
|
||
|
CONFIG_SATAPWR
|
||
|
CONFIG_SATA_DWC
|
||
|
CONFIG_SATA_MV
|
||
|
CONFIG_SATA_SIL
|
||
|
CONFIG_SATA_SIL3114
|
||
|
CONFIG_SATA_ULI5288
|
||
|
CONFIG_SBC8349
|
||
|
CONFIG_SBC8548
|
||
|
CONFIG_SBC8641D
|
||
|
CONFIG_SCC1_ENET
|
||
|
CONFIG_SCC2_ENET
|
||
|
CONFIG_SCF0403_LCD
|
||
|
CONFIG_SCIF
|
||
|
CONFIG_SCIF_A
|
||
|
CONFIG_SCIF_CONSOLE
|
||
|
CONFIG_SCIF_EXT_CLOCK
|
||
|
CONFIG_SCIF_USE_EXT_CLK
|
||
|
CONFIG_SCLK0_DIV
|
||
|
CONFIG_SCLK1_DIV
|
||
|
CONFIG_SCLK_DIV
|
||
|
CONFIG_SCLK_HZ
|
||
|
CONFIG_SCSI
|
||
|
CONFIG_SCSI_AHCI
|
||
|
CONFIG_SCSI_AHCI_PLAT
|
||
|
CONFIG_SCSI_DEV_ID
|
||
|
CONFIG_SCSI_DEV_LIST
|
||
|
CONFIG_SCSI_SYM53C8XX
|
||
|
CONFIG_SC_TIMER_CLK
|
||
|
CONFIG_SDCARD
|
||
|
CONFIG_SDRAM_BANK0
|
||
|
CONFIG_SDRAM_BANK1
|
||
|
CONFIG_SDRAM_ECC
|
||
|
CONFIG_SDRAM_OFFSET_FOR_RT
|
||
|
CONFIG_SDRAM_PPC4xx_DENALI_DDR2
|
||
|
CONFIG_SDRAM_PPC4xx_IBM_DDR
|
||
|
CONFIG_SDRAM_PPC4xx_IBM_DDR2
|
||
|
CONFIG_SDRAM_PPC4xx_IBM_SDRAM
|
||
|
CONFIG_SDRC
|
||
|
CONFIG_SDR_MT48LC16M16A2
|
||
|
CONFIG_SD_BOOT_QSPI
|
||
|
CONFIG_SECBOOT
|
||
|
CONFIG_SECURE_BL1_ONLY
|
||
|
CONFIG_SECURE_RUNTIME_RESV_SRAM_SZ
|
||
|
CONFIG_SECURITY
|
||
|
CONFIG_SEC_DEQ_TIMEOUT
|
||
|
CONFIG_SEC_FW_SIZE
|
||
|
CONFIG_SELECTED
|
||
|
CONFIG_SEQUOIA
|
||
|
CONFIG_SERIAL0
|
||
|
CONFIG_SERIAL1
|
||
|
CONFIG_SERIAL2
|
||
|
CONFIG_SERIAL3
|
||
|
CONFIG_SERIAL_BOOT
|
||
|
CONFIG_SERIAL_FLASH
|
||
|
CONFIG_SERIAL_HW_FLOW_CONTROL
|
||
|
CONFIG_SERIAL_MULTI
|
||
|
CONFIG_SERIAL_SOFTWARE_FIFO
|
||
|
CONFIG_SERIAL_TAG
|
||
|
CONFIG_SERIRQ_CONTINUOUS_MODE
|
||
|
CONFIG_SERVERIP
|
||
|
CONFIG_SETUP_INITRD_TAG
|
||
|
CONFIG_SETUP_MEMORY_TAGS
|
||
|
CONFIG_SET_BIST
|
||
|
CONFIG_SET_BOOTARGS
|
||
|
CONFIG_SET_DFU_ALT_BUF_LEN
|
||
|
CONFIG_SET_DFU_ALT_INFO
|
||
|
CONFIG_SFIO
|
||
|
CONFIG_SF_DATAFLASH
|
||
|
CONFIG_SF_DEFAULT_BUS
|
||
|
CONFIG_SF_DEFAULT_CS
|
||
|
CONFIG_SF_DEFAULT_HZ
|
||
|
CONFIG_SF_DEFAULT_MODE
|
||
|
CONFIG_SF_DEFAULT_SPEED
|
||
|
CONFIG_SF_DUAL_FLASH
|
||
|
CONFIG_SGI_IP28
|
||
|
CONFIG_SH4_PCI
|
||
|
CONFIG_SH73A0
|
||
|
CONFIG_SH7751_PCI
|
||
|
CONFIG_SH7752EVB
|
||
|
CONFIG_SH7753EVB
|
||
|
CONFIG_SH7757LCR
|
||
|
CONFIG_SH7757LCR_DDR_ECC
|
||
|
CONFIG_SH7763RDP
|
||
|
CONFIG_SH7780_PCI
|
||
|
CONFIG_SH7780_PCI_BAR
|
||
|
CONFIG_SH7780_PCI_LAR
|
||
|
CONFIG_SH7780_PCI_LSR
|
||
|
CONFIG_SH7785LCR
|
||
|
CONFIG_SHA1SUM_VERIFY
|
||
|
CONFIG_SHARP_16x9
|
||
|
CONFIG_SHARP_LM8V31
|
||
|
CONFIG_SHARP_LQ035Q7DH06
|
||
|
CONFIG_SHARP_LQ057Q3DC02
|
||
|
CONFIG_SHARP_LQ065T9DR51U
|
||
|
CONFIG_SHARP_LQ084V1DG21
|
||
|
CONFIG_SHARP_LQ104V7DS01
|
||
|
CONFIG_SHARP_LQ64D341
|
||
|
CONFIG_SHEEVA_88SV131
|
||
|
CONFIG_SHEEVA_88SV331xV5
|
||
|
CONFIG_SHELL
|
||
|
CONFIG_SHMIN
|
||
|
CONFIG_SHOW_ACTIVITY
|
||
|
CONFIG_SHOW_BOOT_PROGRESS
|
||
|
CONFIG_SH_CMT_CLK_FREQ
|
||
|
CONFIG_SH_DSP
|
||
|
CONFIG_SH_ETHER
|
||
|
CONFIG_SH_ETHER_ALIGNE_SIZE
|
||
|
CONFIG_SH_ETHER_BASE_ADDR
|
||
|
CONFIG_SH_ETHER_CACHE_INVALIDATE
|
||
|
CONFIG_SH_ETHER_CACHE_WRITEBACK
|
||
|
CONFIG_SH_ETHER_PHY_ADDR
|
||
|
CONFIG_SH_ETHER_PHY_MODE
|
||
|
CONFIG_SH_ETHER_SH7734_MII
|
||
|
CONFIG_SH_ETHER_USE_GETHER
|
||
|
CONFIG_SH_ETHER_USE_PORT
|
||
|
CONFIG_SH_GPIO_PFC
|
||
|
CONFIG_SH_I2C_8BIT
|
||
|
CONFIG_SH_I2C_BASE0
|
||
|
CONFIG_SH_I2C_BASE1
|
||
|
CONFIG_SH_I2C_CLOCK
|
||
|
CONFIG_SH_I2C_DATA_HIGH
|
||
|
CONFIG_SH_I2C_DATA_LOW
|
||
|
CONFIG_SH_MMCIF
|
||
|
CONFIG_SH_MMCIF_ADDR
|
||
|
CONFIG_SH_MMCIF_CLK
|
||
|
CONFIG_SH_QSPI
|
||
|
CONFIG_SH_QSPI_BASE
|
||
|
CONFIG_SH_SCIF_CLK_FREQ
|
||
|
CONFIG_SH_SDHI_FREQ
|
||
|
CONFIG_SH_SDRAM_OFFSET
|
||
|
CONFIG_SH_SH7734_I2C
|
||
|
CONFIG_SH_SPI
|
||
|
CONFIG_SH_SPI_BASE
|
||
|
CONFIG_SH_TMU_CLK_FREQ
|
||
|
CONFIG_SIEMENS_DRACO
|
||
|
CONFIG_SIEMENS_MACH_TYPE
|
||
|
CONFIG_SIEMENS_PXM2
|
||
|
CONFIG_SIEMENS_RUT
|
||
|
CONFIG_SIMU
|
||
|
CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION
|
||
|
CONFIG_SKIP_LOWLEVEL_INIT
|
||
|
CONFIG_SKIP_LOWLEVEL_INIT_ONLY
|
||
|
CONFIG_SKIP_TRUNOFF_WATCHDOG
|
||
|
CONFIG_SLIC
|
||
|
CONFIG_SLTTMR
|
||
|
CONFIG_SMC91111
|
||
|
CONFIG_SMC91111_BASE
|
||
|
CONFIG_SMC91111_EXT_PHY
|
||
|
CONFIG_SMC911X
|
||
|
CONFIG_SMC911X_16_BIT
|
||
|
CONFIG_SMC911X_32_BIT
|
||
|
CONFIG_SMC911X_BASE
|
||
|
CONFIG_SMC911X_NO_EEPROM
|
||
|
CONFIG_SMC_91111_EXT_PHY
|
||
|
CONFIG_SMC_AUTONEG_TIMEOUT
|
||
|
CONFIG_SMC_B0CTL_VAL
|
||
|
CONFIG_SMC_B0ETIM_VAL
|
||
|
CONFIG_SMC_B0TIM_VAL
|
||
|
CONFIG_SMC_B1CTL_VAL
|
||
|
CONFIG_SMC_B1ETIM_VAL
|
||
|
CONFIG_SMC_B1TIM_VAL
|
||
|
CONFIG_SMC_B2CTL_VAL
|
||
|
CONFIG_SMC_B2ETIM_VAL
|
||
|
CONFIG_SMC_B2TIM_VAL
|
||
|
CONFIG_SMC_B3CTL_VAL
|
||
|
CONFIG_SMC_B3ETIM_VAL
|
||
|
CONFIG_SMC_B3TIM_VAL
|
||
|
CONFIG_SMC_GCTL_VAL
|
||
|
CONFIG_SMC_USE_32_BIT
|
||
|
CONFIG_SMC_USE_IOFUNCS
|
||
|
CONFIG_SMDK5420
|
||
|
CONFIG_SMDKC100
|
||
|
CONFIG_SMDKV310
|
||
|
CONFIG_SMP_PEN_ADDR
|
||
|
CONFIG_SMSC_LPC47M
|
||
|
CONFIG_SMSC_SIO1007
|
||
|
CONFIG_SMSTP0_ENA
|
||
|
CONFIG_SMSTP10_ENA
|
||
|
CONFIG_SMSTP11_ENA
|
||
|
CONFIG_SMSTP1_ENA
|
||
|
CONFIG_SMSTP2_ENA
|
||
|
CONFIG_SMSTP3_ENA
|
||
|
CONFIG_SMSTP4_ENA
|
||
|
CONFIG_SMSTP5_ENA
|
||
|
CONFIG_SMSTP6_ENA
|
||
|
CONFIG_SMSTP7_ENA
|
||
|
CONFIG_SMSTP8_ENA
|
||
|
CONFIG_SMSTP9_ENA
|
||
|
CONFIG_SOCFPGA_DWMMC
|
||
|
CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH
|
||
|
CONFIG_SOCFPGA_VIRTUAL_TARGET
|
||
|
CONFIG_SOCRATES
|
||
|
CONFIG_SOC_AU1000
|
||
|
CONFIG_SOC_AU1100
|
||
|
CONFIG_SOC_AU1500
|
||
|
CONFIG_SOC_AU1550
|
||
|
CONFIG_SOC_AU1X00
|
||
|
CONFIG_SOC_DA850
|
||
|
CONFIG_SOC_DA8XX
|
||
|
CONFIG_SOC_DM355
|
||
|
CONFIG_SOC_DM365
|
||
|
CONFIG_SOC_DM644X
|
||
|
CONFIG_SOC_DM646X
|
||
|
CONFIG_SOC_K2E
|
||
|
CONFIG_SOC_K2G
|
||
|
CONFIG_SOC_K2HK
|
||
|
CONFIG_SOC_K2L
|
||
|
CONFIG_SOC_KEYSTONE
|
||
|
CONFIG_SOC_OMAP3430
|
||
|
CONFIG_SOFT_I2C_GPIO_SCL
|
||
|
CONFIG_SOFT_I2C_GPIO_SDA
|
||
|
CONFIG_SOFT_I2C_I2C10_SCL
|
||
|
CONFIG_SOFT_I2C_I2C10_SDA
|
||
|
CONFIG_SOFT_I2C_I2C5_SCL
|
||
|
CONFIG_SOFT_I2C_I2C5_SDA
|
||
|
CONFIG_SOFT_I2C_I2C9_SCL
|
||
|
CONFIG_SOFT_I2C_I2C9_SDA
|
||
|
CONFIG_SOFT_I2C_MULTI_BUS
|
||
|
CONFIG_SOFT_I2C_READ_REPEATED_START
|
||
|
CONFIG_SOFT_SPI
|
||
|
CONFIG_SOFT_TWS
|
||
|
CONFIG_SOURCE
|
||
|
CONFIG_SPARSE_RCU_POINTER
|
||
|
CONFIG_SPDDRAM_SILENT
|
||
|
CONFIG_SPD_EEPROM
|
||
|
CONFIG_SPEAR300
|
||
|
CONFIG_SPEAR310
|
||
|
CONFIG_SPEAR320
|
||
|
CONFIG_SPEAR3XX
|
||
|
CONFIG_SPEAR600
|
||
|
CONFIG_SPEAR_BOOTSTRAPCFG
|
||
|
CONFIG_SPEAR_BOOTSTRAPMASK
|
||
|
CONFIG_SPEAR_BOOTSTRAPSHFT
|
||
|
CONFIG_SPEAR_EMI
|
||
|
CONFIG_SPEAR_EMIBASE
|
||
|
CONFIG_SPEAR_ETHBASE
|
||
|
CONFIG_SPEAR_GPIO
|
||
|
CONFIG_SPEAR_HZ
|
||
|
CONFIG_SPEAR_HZ_CLOCK
|
||
|
CONFIG_SPEAR_MISCBASE
|
||
|
CONFIG_SPEAR_MPMCBASE
|
||
|
CONFIG_SPEAR_MPMCREGS
|
||
|
CONFIG_SPEAR_NORNAND16BOOT
|
||
|
CONFIG_SPEAR_NORNAND8BOOT
|
||
|
CONFIG_SPEAR_NORNANDBOOT
|
||
|
CONFIG_SPEAR_ONLYSNORBOOT
|
||
|
CONFIG_SPEAR_RASBASE
|
||
|
CONFIG_SPEAR_SYSCNTLBASE
|
||
|
CONFIG_SPEAR_TIMERBASE
|
||
|
CONFIG_SPEAR_UART48M
|
||
|
CONFIG_SPEAR_UARTCLKMSK
|
||
|
CONFIG_SPEAR_USBBOOT
|
||
|
CONFIG_SPEAR_USBTTY
|
||
|
CONFIG_SPI
|
||
|
CONFIG_SPI_ADDR
|
||
|
CONFIG_SPI_BAUD_INITBLOCK
|
||
|
CONFIG_SPI_BOOTING
|
||
|
CONFIG_SPI_CS_IS_VALID
|
||
|
CONFIG_SPI_DATAFLASH_WRITE_VERIFY
|
||
|
CONFIG_SPI_FLASH_ALL
|
||
|
CONFIG_SPI_FLASH_ISSI
|
||
|
CONFIG_SPI_FLASH_QUAD
|
||
|
CONFIG_SPI_FLASH_SIZE
|
||
|
CONFIG_SPI_HALF_DUPLEX
|
||
|
CONFIG_SPI_IDLE_VAL
|
||
|
CONFIG_SPI_LENGTH
|
||
|
CONFIG_SPI_N25Q256A_RESET
|
||
|
CONFIG_SPLASHIMAGE_GUARD
|
||
|
CONFIG_SPLASH_SCREEN
|
||
|
CONFIG_SPLASH_SCREEN_ALIGN
|
||
|
CONFIG_SPLASH_SOURCE
|
||
|
CONFIG_SPLL_FREQ
|
||
|
CONFIG_SPL_
|
||
|
CONFIG_SPL_ABORT_ON_RAW_IMAGE
|
||
|
CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
|
||
|
CONFIG_SPL_ATMEL_SIZE
|
||
|
CONFIG_SPL_BOARD_INIT
|
||
|
CONFIG_SPL_BOARD_LOAD_IMAGE
|
||
|
CONFIG_SPL_BOOTROM_SAVE
|
||
|
CONFIG_SPL_BOOT_DEVICE
|
||
|
CONFIG_SPL_BSS_MAX_SIZE
|
||
|
CONFIG_SPL_BSS_START_ADDR
|
||
|
CONFIG_SPL_CMT
|
||
|
CONFIG_SPL_CMT_DEBUG
|
||
|
CONFIG_SPL_COMMON_INIT_DDR
|
||
|
CONFIG_SPL_CONSOLE
|
||
|
CONFIG_SPL_ETH_DEVICE
|
||
|
CONFIG_SPL_FLUSH_IMAGE
|
||
|
CONFIG_SPL_FRAMEWORK
|
||
|
CONFIG_SPL_FSL_PBL
|
||
|
CONFIG_SPL_FS_LOAD_ARGS_NAME
|
||
|
CONFIG_SPL_FS_LOAD_KERNEL_NAME
|
||
|
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
|
||
|
CONFIG_SPL_GD_ADDR
|
||
|
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
|
||
|
CONFIG_SPL_INIT_MINIMAL
|
||
|
CONFIG_SPL_JR0_LIODN_NS
|
||
|
CONFIG_SPL_JR0_LIODN_S
|
||
|
CONFIG_SPL_LDSCRIPT
|
||
|
CONFIG_SPL_LOAD_FIT_ADDRESS
|
||
|
CONFIG_SPL_MAX_FOOTPRINT
|
||
|
CONFIG_SPL_MAX_PEB_SIZE
|
||
|
CONFIG_SPL_MAX_SIZE
|
||
|
CONFIG_SPL_MMC_BOOT
|
||
|
CONFIG_SPL_MMC_LOAD
|
||
|
CONFIG_SPL_MMC_MINIMAL
|
||
|
CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
|
||
|
CONFIG_SPL_MXS_PSWITCH_WAIT
|
||
|
CONFIG_SPL_NAND_AM33XX_BCH
|
||
|
CONFIG_SPL_NAND_BASE
|
||
|
CONFIG_SPL_NAND_BOOT
|
||
|
CONFIG_SPL_NAND_DRIVERS
|
||
|
CONFIG_SPL_NAND_ECC
|
||
|
CONFIG_SPL_NAND_INIT
|
||
|
CONFIG_SPL_NAND_LOAD
|
||
|
CONFIG_SPL_NAND_MINIMAL
|
||
|
CONFIG_SPL_NAND_MXS
|
||
|
CONFIG_SPL_NAND_RAW_ONLY
|
||
|
CONFIG_SPL_NAND_SIMPLE
|
||
|
CONFIG_SPL_NAND_SOFTECC
|
||
|
CONFIG_SPL_NAND_WORKSPACE
|
||
|
CONFIG_SPL_NO_CPU_SUPPORT_CODE
|
||
|
CONFIG_SPL_OMAP3_ID_NAND
|
||
|
CONFIG_SPL_PAD_TO
|
||
|
CONFIG_SPL_PANIC_ON_RAW_IMAGE
|
||
|
CONFIG_SPL_PBL_PAD
|
||
|
CONFIG_SPL_PPAACT_ADDR
|
||
|
CONFIG_SPL_RAM_DEVICE
|
||
|
CONFIG_SPL_RELOC_MALLOC_ADDR
|
||
|
CONFIG_SPL_RELOC_MALLOC_SIZE
|
||
|
CONFIG_SPL_RELOC_STACK
|
||
|
CONFIG_SPL_RELOC_STACK_SIZE
|
||
|
CONFIG_SPL_RELOC_TEXT_BASE
|
||
|
CONFIG_SPL_SATA_BOOT_DEVICE
|
||
|
CONFIG_SPL_SIZE
|
||
|
CONFIG_SPL_SKIP_RELOCATE
|
||
|
CONFIG_SPL_SPAACT_ADDR
|
||
|
CONFIG_SPL_SPI_BOOT
|
||
|
CONFIG_SPL_SPI_FLASH_MINIMAL
|
||
|
CONFIG_SPL_SPI_LOAD
|
||
|
CONFIG_SPL_STACK
|
||
|
CONFIG_SPL_STACK_ADDR
|
||
|
CONFIG_SPL_STACK_SIZE
|
||
|
CONFIG_SPL_START_S_PATH
|
||
|
CONFIG_SPL_TARGET
|
||
|
CONFIG_SPL_TEXT_BASE
|
||
|
CONFIG_SPL_UBI
|
||
|
CONFIG_SPL_UBI_INFO_ADDR
|
||
|
CONFIG_SPL_UBI_LEB_START
|
||
|
CONFIG_SPL_UBI_LOAD_ARGS_ID
|
||
|
CONFIG_SPL_UBI_LOAD_KERNEL_ID
|
||
|
CONFIG_SPL_UBI_LOAD_MONITOR_ID
|
||
|
CONFIG_SPL_UBI_MAX_PEBS
|
||
|
CONFIG_SPL_UBI_MAX_PEB_SIZE
|
||
|
CONFIG_SPL_UBI_MAX_VOL_LEBS
|
||
|
CONFIG_SPL_UBI_PEB_OFFSET
|
||
|
CONFIG_SPL_UBI_VID_OFFSET
|
||
|
CONFIG_SPL_UBI_VOL_IDS
|
||
|
CONFIG_SPL_UBOOT_KEY_HASH
|
||
|
CONFIG_SRAM_BASE
|
||
|
CONFIG_SRAM_SIZE
|
||
|
CONFIG_SRIO1
|
||
|
CONFIG_SRIO2
|
||
|
CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET
|
||
|
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1
|
||
|
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2
|
||
|
CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS
|
||
|
CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE
|
||
|
CONFIG_SRIO_PCIE_BOOT_MASTER
|
||
|
CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK
|
||
|
CONFIG_SRIO_PCIE_BOOT_SLAVE
|
||
|
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS
|
||
|
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS
|
||
|
CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE
|
||
|
CONFIG_SSD_BR_PRELIM
|
||
|
CONFIG_SSD_OR_PRELIM
|
||
|
CONFIG_SSE2
|
||
|
CONFIG_SSI1_FREQ
|
||
|
CONFIG_SSI2_FREQ
|
||
|
CONFIG_SSP1_BASE
|
||
|
CONFIG_SSP2_BASE
|
||
|
CONFIG_SSP3_BASE
|
||
|
CONFIG_STACKBASE
|
||
|
CONFIG_STACKSIZE
|
||
|
CONFIG_STACKSIZE_FIQ
|
||
|
CONFIG_STACKSIZE_IRQ
|
||
|
CONFIG_STAMP_CF
|
||
|
CONFIG_STANDALONE_LOAD_ADDR
|
||
|
CONFIG_STATIC_BOARD_REV
|
||
|
CONFIG_STATIC_RELA
|
||
|
CONFIG_STD_DEVICES_SETTINGS
|
||
|
CONFIG_STK52XX
|
||
|
CONFIG_STK52XX_REV100
|
||
|
CONFIG_STM32F4DISCOVERY
|
||
|
CONFIG_STM32X7_SERIAL
|
||
|
CONFIG_STM32_FLASH
|
||
|
CONFIG_STM32_GPIO
|
||
|
CONFIG_STM32_HSE_HZ
|
||
|
CONFIG_STM32_HZ
|
||
|
CONFIG_STM32_SERIAL
|
||
|
CONFIG_STRESS
|
||
|
CONFIG_STRIDER
|
||
|
CONFIG_STRIDER_CON
|
||
|
CONFIG_STRIDER_CON_DP
|
||
|
CONFIG_STRIDER_CPU
|
||
|
CONFIG_STRIDER_CPU_DP
|
||
|
CONFIG_STRIDER_FANS
|
||
|
CONFIG_STUART
|
||
|
CONFIG_STV0991
|
||
|
CONFIG_STV0991_HZ
|
||
|
CONFIG_STV0991_HZ_CLOCK
|
||
|
CONFIG_ST_SMI
|
||
|
CONFIG_SUN4
|
||
|
CONFIG_SUNXI_AHCI
|
||
|
CONFIG_SUNXI_EMAC
|
||
|
CONFIG_SUNXI_GMAC
|
||
|
CONFIG_SUNXI_GPIO
|
||
|
CONFIG_SUNXI_MAX_FB_SIZE
|
||
|
CONFIG_SUNXI_USB_PHYS
|
||
|
CONFIG_SUPERH_ON_CHIP_R8A66597
|
||
|
CONFIG_SUPPORT_EMMC_BOOT
|
||
|
CONFIG_SUPPORT_EMMC_RPMB
|
||
|
CONFIG_SUPPORT_RAW_INITRD
|
||
|
CONFIG_SUPPORT_VFAT
|
||
|
CONFIG_SUVD3
|
||
|
CONFIG_SX151X_GPIO_COUNT_8
|
||
|
CONFIG_SX151X_SPI_BUS
|
||
|
CONFIG_SXNI855T
|
||
|
CONFIG_SYSCOUNTER_TIMER
|
||
|
CONFIG_SYSFLAGS_ADDR
|
||
|
CONFIG_SYSFS
|
||
|
CONFIG_SYSMGR_ISWGRP_HANDOFF
|
||
|
CONFIG_SYSTEMACE
|
||
|
CONFIG_SYS_33MHZ
|
||
|
CONFIG_SYS_405_UART_ERRATA_59
|
||
|
CONFIG_SYS_460GT_SRIO_ERRATA_1
|
||
|
CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY
|
||
|
CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY
|
||
|
CONFIG_SYS_4xx_CHIP_21_405EXr_NO_SECURITY
|
||
|
CONFIG_SYS_4xx_CHIP_21_405EXr_SECURITY
|
||
|
CONFIG_SYS_4xx_CHIP_21_ERRATA
|
||
|
CONFIG_SYS_4xx_GPIO_TABLE
|
||
|
CONFIG_SYS_4xx_RESET_TYPE
|
||
|
CONFIG_SYS_64BIT
|
||
|
CONFIG_SYS_64BIT_LBA
|
||
|
CONFIG_SYS_64BIT_VSPRINTF
|
||
|
CONFIG_SYS_66MHZ
|
||
|
CONFIG_SYS_8313ERDB_BROKEN_PMC
|
||
|
CONFIG_SYS_83XX_DDR_USES_CS0
|
||
|
CONFIG_SYS_8XX_XIN
|
||
|
CONFIG_SYS_8xx_CPUCLK_MAX
|
||
|
CONFIG_SYS_8xx_CPUCLK_MIN
|
||
|
CONFIG_SYS_ACE_BASE
|
||
|
CONFIG_SYS_ACE_BASE_PHYS_H
|
||
|
CONFIG_SYS_ACE_BASE_PHYS_L
|
||
|
CONFIG_SYS_ACR_APARK
|
||
|
CONFIG_SYS_ACR_PARKM
|
||
|
CONFIG_SYS_ACR_PIPE_DEP
|
||
|
CONFIG_SYS_ACR_RPTCNT
|
||
|
CONFIG_SYS_ADDRESS_MAP_A
|
||
|
CONFIG_SYS_ADV7611_I2C
|
||
|
CONFIG_SYS_AHB_BASE
|
||
|
CONFIG_SYS_ALT_BOOT
|
||
|
CONFIG_SYS_ALT_FLASH
|
||
|
CONFIG_SYS_ALT_MEMTEST
|
||
|
CONFIG_SYS_AMASK0
|
||
|
CONFIG_SYS_AMASK0_FINAL
|
||
|
CONFIG_SYS_AMASK1
|
||
|
CONFIG_SYS_AMASK1_FINAL
|
||
|
CONFIG_SYS_AMASK2
|
||
|
CONFIG_SYS_AMASK2_FINAL
|
||
|
CONFIG_SYS_AMASK3
|
||
|
CONFIG_SYS_AMASK3_FINAL
|
||
|
CONFIG_SYS_AMASK4
|
||
|
CONFIG_SYS_AMASK5
|
||
|
CONFIG_SYS_AMASK6
|
||
|
CONFIG_SYS_AMASK7
|
||
|
CONFIG_SYS_APP1_BASE
|
||
|
CONFIG_SYS_APP1_SIZE
|
||
|
CONFIG_SYS_APP2_BASE
|
||
|
CONFIG_SYS_APP2_SIZE
|
||
|
CONFIG_SYS_ARCH_TIMER
|
||
|
CONFIG_SYS_ARIA_FPGA_BASE
|
||
|
CONFIG_SYS_ARIA_FPGA_SIZE
|
||
|
CONFIG_SYS_ARIA_SRAM_BASE
|
||
|
CONFIG_SYS_ARIA_SRAM_SIZE
|
||
|
CONFIG_SYS_ARM_CACHE_WRITETHROUGH
|
||
|
CONFIG_SYS_AT91_CPU_NAME
|
||
|
CONFIG_SYS_AT91_MAIN_CLOCK
|
||
|
CONFIG_SYS_AT91_PLLA
|
||
|
CONFIG_SYS_AT91_PLLB
|
||
|
CONFIG_SYS_AT91_SLOW_CLOCK
|
||
|
CONFIG_SYS_ATA_ALT_OFFSET
|
||
|
CONFIG_SYS_ATA_BASE_ADDR
|
||
|
CONFIG_SYS_ATA_CS_ON_I2C2
|
||
|
CONFIG_SYS_ATA_CS_ON_TIMER01
|
||
|
CONFIG_SYS_ATA_DATA_OFFSET
|
||
|
CONFIG_SYS_ATA_IDE0_OFFSET
|
||
|
CONFIG_SYS_ATA_IDE1_OFFSET
|
||
|
CONFIG_SYS_ATA_PORT_ADDR
|
||
|
CONFIG_SYS_ATA_REG_OFFSET
|
||
|
CONFIG_SYS_ATA_STRIDE
|
||
|
CONFIG_SYS_ATI_REV_A11
|
||
|
CONFIG_SYS_ATI_REV_A12
|
||
|
CONFIG_SYS_ATI_REV_A13
|
||
|
CONFIG_SYS_ATI_REV_ID_MASK
|
||
|
CONFIG_SYS_ATMEL_BASE
|
||
|
CONFIG_SYS_ATMEL_BOOT
|
||
|
CONFIG_SYS_ATMEL_CPU_NAME
|
||
|
CONFIG_SYS_ATMEL_REGION
|
||
|
CONFIG_SYS_ATMEL_SECT
|
||
|
CONFIG_SYS_ATMEL_SECTSZ
|
||
|
CONFIG_SYS_ATMEL_TOTALSECT
|
||
|
CONFIG_SYS_AUTOLOAD
|
||
|
CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
|
||
|
CONFIG_SYS_AUXCORE_BOOTDATA
|
||
|
CONFIG_SYS_BARGSIZE
|
||
|
CONFIG_SYS_BASE_BAUD
|
||
|
CONFIG_SYS_BAUDRATE_TABLE
|
||
|
CONFIG_SYS_BCR
|
||
|
CONFIG_SYS_BCR_60x
|
||
|
CONFIG_SYS_BCR_SINGLE
|
||
|
CONFIG_SYS_BCSR
|
||
|
CONFIG_SYS_BCSR3_PCIE
|
||
|
CONFIG_SYS_BCSR5_PCI66EN
|
||
|
CONFIG_SYS_BCSR_ADDR
|
||
|
CONFIG_SYS_BCSR_BASE
|
||
|
CONFIG_SYS_BCSR_BASE_PHYS
|
||
|
CONFIG_SYS_BCSR_SIZE
|
||
|
CONFIG_SYS_BD_INFO_ADDR
|
||
|
CONFIG_SYS_BD_REV
|
||
|
CONFIG_SYS_BFTIC3_BASE
|
||
|
CONFIG_SYS_BFTIC3_SIZE
|
||
|
CONFIG_SYS_BITBANG_PHY_PORT
|
||
|
CONFIG_SYS_BITBANG_PHY_PORTS
|
||
|
CONFIG_SYS_BLACK_IN_WRITE
|
||
|
CONFIG_SYS_BMAN_CENA_BASE
|
||
|
CONFIG_SYS_BMAN_CENA_SIZE
|
||
|
CONFIG_SYS_BMAN_CINH_BASE
|
||
|
CONFIG_SYS_BMAN_CINH_SIZE
|
||
|
CONFIG_SYS_BMAN_MEM_BASE
|
||
|
CONFIG_SYS_BMAN_MEM_PHYS
|
||
|
CONFIG_SYS_BMAN_MEM_SIZE
|
||
|
CONFIG_SYS_BMAN_NUM_PORTALS
|
||
|
CONFIG_SYS_BMAN_SP_CENA_SIZE
|
||
|
CONFIG_SYS_BMAN_SP_CINH_SIZE
|
||
|
CONFIG_SYS_BMAN_SWP_ISDR_REG
|
||
|
CONFIG_SYS_BOARD_NAME
|
||
|
CONFIG_SYS_BOARD_OMAP3_HA
|
||
|
CONFIG_SYS_BOARD_VERSION
|
||
|
CONFIG_SYS_BOOK3E_HV
|
||
|
CONFIG_SYS_BOOTCOUNT_ADDR
|
||
|
CONFIG_SYS_BOOTCOUNT_BE
|
||
|
CONFIG_SYS_BOOTCOUNT_LE
|
||
|
CONFIG_SYS_BOOTCOUNT_SINGLEWORD
|
||
|
CONFIG_SYS_BOOTCS_CFG
|
||
|
CONFIG_SYS_BOOTCS_SIZE
|
||
|
CONFIG_SYS_BOOTCS_START
|
||
|
CONFIG_SYS_BOOTFILE
|
||
|
CONFIG_SYS_BOOTFILE_PREFIX
|
||
|
CONFIG_SYS_BOOTMAPSZ
|
||
|
CONFIG_SYS_BOOTM_LEN
|
||
|
CONFIG_SYS_BOOTPARAMS_LEN
|
||
|
CONFIG_SYS_BOOTSZ
|
||
|
CONFIG_SYS_BOOT_BASE_ADDR
|
||
|
CONFIG_SYS_BOOT_BLOCK
|
||
|
CONFIG_SYS_BOOT_EEPROM_PAGE_WRITE_BITS
|
||
|
CONFIG_SYS_BOOT_GET_CMDLINE
|
||
|
CONFIG_SYS_BOOT_GET_KBD
|
||
|
CONFIG_SYS_BOOT_RAMDISK_HIGH
|
||
|
CONFIG_SYS_BOOT_SPINOR
|
||
|
CONFIG_SYS_BR0_64M
|
||
|
CONFIG_SYS_BR0_8M
|
||
|
CONFIG_SYS_BR0_PRELIM
|
||
|
CONFIG_SYS_BR10_PRELIM
|
||
|
CONFIG_SYS_BR11_PRELIM
|
||
|
CONFIG_SYS_BR1_PRELIM
|
||
|
CONFIG_SYS_BR2_PRELIM
|
||
|
CONFIG_SYS_BR3_CAN
|
||
|
CONFIG_SYS_BR3_PRELIM
|
||
|
CONFIG_SYS_BR4_PRELIM
|
||
|
CONFIG_SYS_BR5_ISP1362
|
||
|
CONFIG_SYS_BR5_PRELIM
|
||
|
CONFIG_SYS_BR6_64M
|
||
|
CONFIG_SYS_BR6_8M
|
||
|
CONFIG_SYS_BR6_PRELIM
|
||
|
CONFIG_SYS_BR7_PRELIM
|
||
|
CONFIG_SYS_BR8_PRELIM
|
||
|
CONFIG_SYS_BR9_PRELIM
|
||
|
CONFIG_SYS_BRGCLK_PRESCALE
|
||
|
CONFIG_SYS_BRIGHTNESS
|
||
|
CONFIG_SYS_BUSCLK
|
||
|
CONFIG_SYS_CACHELINE_SHIFT
|
||
|
CONFIG_SYS_CACHE_ACR0
|
||
|
CONFIG_SYS_CACHE_ACR1
|
||
|
CONFIG_SYS_CACHE_ACR2
|
||
|
CONFIG_SYS_CACHE_ACR3
|
||
|
CONFIG_SYS_CACHE_ACR4
|
||
|
CONFIG_SYS_CACHE_ACR5
|
||
|
CONFIG_SYS_CACHE_ACR6
|
||
|
CONFIG_SYS_CACHE_ACR7
|
||
|
CONFIG_SYS_CACHE_DCACR
|
||
|
CONFIG_SYS_CACHE_ICACR
|
||
|
CONFIG_SYS_CACHE_STASHING
|
||
|
CONFIG_SYS_CADMUS_BASE_REG
|
||
|
CONFIG_SYS_CAN_BASE
|
||
|
CONFIG_SYS_CAN_OR_AM
|
||
|
CONFIG_SYS_CBSIZE
|
||
|
CONFIG_SYS_CCCR
|
||
|
CONFIG_SYS_CCI400_ADDR
|
||
|
CONFIG_SYS_CCSRBAR
|
||
|
CONFIG_SYS_CCSRBAR_PHYS
|
||
|
CONFIG_SYS_CCSRBAR_PHYS_HIGH
|
||
|
CONFIG_SYS_CCSRBAR_PHYS_LOW
|
||
|
CONFIG_SYS_CCSR_DEFAULT_DBATL
|
||
|
CONFIG_SYS_CCSR_DEFAULT_DBATU
|
||
|
CONFIG_SYS_CCSR_DEFAULT_IBATL
|
||
|
CONFIG_SYS_CCSR_DEFAULT_IBATU
|
||
|
CONFIG_SYS_CCSR_DO_NOT_RELOCATE
|
||
|
CONFIG_SYS_CFI_FLASH_CONFIG_REGS
|
||
|
CONFIG_SYS_CFI_FLASH_STATUS_POLL
|
||
|
CONFIG_SYS_CF_BASE
|
||
|
CONFIG_SYS_CF_INTC_REG1
|
||
|
CONFIG_SYS_CF_SIZE
|
||
|
CONFIG_SYS_CH7301_I2C
|
||
|
CONFIG_SYS_CKEN
|
||
|
CONFIG_SYS_CLK
|
||
|
CONFIG_SYS_CLKDIV_CPU
|
||
|
CONFIG_SYS_CLKDIV_HSB
|
||
|
CONFIG_SYS_CLKDIV_PBA
|
||
|
CONFIG_SYS_CLKDIV_PBB
|
||
|
CONFIG_SYS_CLKTL_CBCDR
|
||
|
CONFIG_SYS_CLK_100
|
||
|
CONFIG_SYS_CLK_100_DDR_100
|
||
|
CONFIG_SYS_CLK_100_DDR_133
|
||
|
CONFIG_SYS_CLK_DIV
|
||
|
CONFIG_SYS_CLK_FREQ_C100
|
||
|
CONFIG_SYS_CLK_FREQ_C110
|
||
|
CONFIG_SYS_CMD_CONFIGURE
|
||
|
CONFIG_SYS_CMD_EL
|
||
|
CONFIG_SYS_CMD_IAS
|
||
|
CONFIG_SYS_CMD_INT
|
||
|
CONFIG_SYS_CMD_SUSPEND
|
||
|
CONFIG_SYS_CMXFCR_MASK1
|
||
|
CONFIG_SYS_CMXFCR_MASK2
|
||
|
CONFIG_SYS_CMXFCR_MASK3
|
||
|
CONFIG_SYS_CMXFCR_VALUE1
|
||
|
CONFIG_SYS_CMXFCR_VALUE2
|
||
|
CONFIG_SYS_CMXFCR_VALUE3
|
||
|
CONFIG_SYS_CMXSCR_VALUE
|
||
|
CONFIG_SYS_CORE_SRAM
|
||
|
CONFIG_SYS_CORE_SRAM_SIZE
|
||
|
CONFIG_SYS_CORTEX_R4
|
||
|
CONFIG_SYS_CORTINA_FW_IN_MMC
|
||
|
CONFIG_SYS_CORTINA_FW_IN_NAND
|
||
|
CONFIG_SYS_CORTINA_FW_IN_NOR
|
||
|
CONFIG_SYS_CORTINA_FW_IN_REMOTE
|
||
|
CONFIG_SYS_CORTINA_FW_IN_SPIFLASH
|
||
|
CONFIG_SYS_CPC_REINIT_F
|
||
|
CONFIG_SYS_CPLD
|
||
|
CONFIG_SYS_CPLD_ADDR
|
||
|
CONFIG_SYS_CPLD_AMASK
|
||
|
CONFIG_SYS_CPLD_BASE
|
||
|
CONFIG_SYS_CPLD_BASE_PHYS
|
||
|
CONFIG_SYS_CPLD_CSOR
|
||
|
CONFIG_SYS_CPLD_CSPR
|
||
|
CONFIG_SYS_CPLD_CSPR_EXT
|
||
|
CONFIG_SYS_CPLD_DATA
|
||
|
CONFIG_SYS_CPLD_FTIM0
|
||
|
CONFIG_SYS_CPLD_FTIM1
|
||
|
CONFIG_SYS_CPLD_FTIM2
|
||
|
CONFIG_SYS_CPLD_FTIM3
|
||
|
CONFIG_SYS_CPLD_SIZE
|
||
|
CONFIG_SYS_CPMFCR_RAMTYPE
|
||
|
CONFIG_SYS_CPM_BOOTCOUNT_ADDR
|
||
|
CONFIG_SYS_CPM_INTERRUPT
|
||
|
CONFIG_SYS_CPM_POST_WORD_ADDR
|
||
|
CONFIG_SYS_CPRI
|
||
|
CONFIG_SYS_CPRI_CLK
|
||
|
CONFIG_SYS_CPUSPEED
|
||
|
CONFIG_SYS_CPU_CLK
|
||
|
CONFIG_SYS_CPU_PCI_IO_START
|
||
|
CONFIG_SYS_CPU_PCI_MEMIO_START
|
||
|
CONFIG_SYS_CPU_PCI_MEM_START
|
||
|
CONFIG_SYS_CS0_BASE
|
||
|
CONFIG_SYS_CS0_CFG
|
||
|
CONFIG_SYS_CS0_CTRL
|
||
|
CONFIG_SYS_CS0_FTIM0
|
||
|
CONFIG_SYS_CS0_FTIM1
|
||
|
CONFIG_SYS_CS0_FTIM2
|
||
|
CONFIG_SYS_CS0_FTIM3
|
||
|
CONFIG_SYS_CS0_MASK
|
||
|
CONFIG_SYS_CS0_SIZE
|
||
|
CONFIG_SYS_CS0_START
|
||
|
CONFIG_SYS_CS1_BASE
|
||
|
CONFIG_SYS_CS1_CFG
|
||
|
CONFIG_SYS_CS1_CTRL
|
||
|
CONFIG_SYS_CS1_FLASH_BASE
|
||
|
CONFIG_SYS_CS1_FTIM0
|
||
|
CONFIG_SYS_CS1_FTIM1
|
||
|
CONFIG_SYS_CS1_FTIM2
|
||
|
CONFIG_SYS_CS1_FTIM3
|
||
|
CONFIG_SYS_CS1_MASK
|
||
|
CONFIG_SYS_CS1_SIZE
|
||
|
CONFIG_SYS_CS1_START
|
||
|
CONFIG_SYS_CS2_BASE
|
||
|
CONFIG_SYS_CS2_CFG
|
||
|
CONFIG_SYS_CS2_CTRL
|
||
|
CONFIG_SYS_CS2_FLASH_BASE
|
||
|
CONFIG_SYS_CS2_FTIM0
|
||
|
CONFIG_SYS_CS2_FTIM1
|
||
|
CONFIG_SYS_CS2_FTIM2
|
||
|
CONFIG_SYS_CS2_FTIM3
|
||
|
CONFIG_SYS_CS2_MASK
|
||
|
CONFIG_SYS_CS2_SIZE
|
||
|
CONFIG_SYS_CS2_START
|
||
|
CONFIG_SYS_CS3_BASE
|
||
|
CONFIG_SYS_CS3_CFG
|
||
|
CONFIG_SYS_CS3_CTRL
|
||
|
CONFIG_SYS_CS3_FLASH_BASE
|
||
|
CONFIG_SYS_CS3_FTIM0
|
||
|
CONFIG_SYS_CS3_FTIM1
|
||
|
CONFIG_SYS_CS3_FTIM2
|
||
|
CONFIG_SYS_CS3_FTIM3
|
||
|
CONFIG_SYS_CS3_MASK
|
||
|
CONFIG_SYS_CS3_SIZE
|
||
|
CONFIG_SYS_CS3_START
|
||
|
CONFIG_SYS_CS4_BASE
|
||
|
CONFIG_SYS_CS4_CFG
|
||
|
CONFIG_SYS_CS4_CTRL
|
||
|
CONFIG_SYS_CS4_FLASH_BASE
|
||
|
CONFIG_SYS_CS4_FTIM0
|
||
|
CONFIG_SYS_CS4_FTIM1
|
||
|
CONFIG_SYS_CS4_FTIM2
|
||
|
CONFIG_SYS_CS4_FTIM3
|
||
|
CONFIG_SYS_CS4_MASK
|
||
|
CONFIG_SYS_CS4_SIZE
|
||
|
CONFIG_SYS_CS4_START
|
||
|
CONFIG_SYS_CS5_BASE
|
||
|
CONFIG_SYS_CS5_CFG
|
||
|
CONFIG_SYS_CS5_CTRL
|
||
|
CONFIG_SYS_CS5_FLASH_BASE
|
||
|
CONFIG_SYS_CS5_FTIM0
|
||
|
CONFIG_SYS_CS5_FTIM1
|
||
|
CONFIG_SYS_CS5_FTIM2
|
||
|
CONFIG_SYS_CS5_FTIM3
|
||
|
CONFIG_SYS_CS5_MASK
|
||
|
CONFIG_SYS_CS5_SIZE
|
||
|
CONFIG_SYS_CS5_START
|
||
|
CONFIG_SYS_CS6_BASE
|
||
|
CONFIG_SYS_CS6_CFG
|
||
|
CONFIG_SYS_CS6_CTRL
|
||
|
CONFIG_SYS_CS6_FTIM0
|
||
|
CONFIG_SYS_CS6_FTIM1
|
||
|
CONFIG_SYS_CS6_FTIM2
|
||
|
CONFIG_SYS_CS6_FTIM3
|
||
|
CONFIG_SYS_CS6_MASK
|
||
|
CONFIG_SYS_CS6_SIZE
|
||
|
CONFIG_SYS_CS6_START
|
||
|
CONFIG_SYS_CS7_BASE
|
||
|
CONFIG_SYS_CS7_CFG
|
||
|
CONFIG_SYS_CS7_CTRL
|
||
|
CONFIG_SYS_CS7_FTIM0
|
||
|
CONFIG_SYS_CS7_FTIM1
|
||
|
CONFIG_SYS_CS7_FTIM2
|
||
|
CONFIG_SYS_CS7_FTIM3
|
||
|
CONFIG_SYS_CS7_MASK
|
||
|
CONFIG_SYS_CS7_SIZE
|
||
|
CONFIG_SYS_CS7_START
|
||
|
CONFIG_SYS_CSOR0
|
||
|
CONFIG_SYS_CSOR0_EXT
|
||
|
CONFIG_SYS_CSOR1
|
||
|
CONFIG_SYS_CSOR1_EXT
|
||
|
CONFIG_SYS_CSOR2
|
||
|
CONFIG_SYS_CSOR2_EXT
|
||
|
CONFIG_SYS_CSOR3
|
||
|
CONFIG_SYS_CSOR3_EXT
|
||
|
CONFIG_SYS_CSOR4
|
||
|
CONFIG_SYS_CSOR4_EXT
|
||
|
CONFIG_SYS_CSOR5
|
||
|
CONFIG_SYS_CSOR5_EXT
|
||
|
CONFIG_SYS_CSOR6
|
||
|
CONFIG_SYS_CSOR6_EXT
|
||
|
CONFIG_SYS_CSOR7
|
||
|
CONFIG_SYS_CSOR7_EXT
|
||
|
CONFIG_SYS_CSPR0
|
||
|
CONFIG_SYS_CSPR0_EXT
|
||
|
CONFIG_SYS_CSPR0_FINAL
|
||
|
CONFIG_SYS_CSPR1
|
||
|
CONFIG_SYS_CSPR1_EXT
|
||
|
CONFIG_SYS_CSPR1_FINAL
|
||
|
CONFIG_SYS_CSPR2
|
||
|
CONFIG_SYS_CSPR2_EXT
|
||
|
CONFIG_SYS_CSPR2_FINAL
|
||
|
CONFIG_SYS_CSPR3
|
||
|
CONFIG_SYS_CSPR3_EXT
|
||
|
CONFIG_SYS_CSPR3_FINAL
|
||
|
CONFIG_SYS_CSPR4
|
||
|
CONFIG_SYS_CSPR4_EXT
|
||
|
CONFIG_SYS_CSPR5
|
||
|
CONFIG_SYS_CSPR5_EXT
|
||
|
CONFIG_SYS_CSPR6
|
||
|
CONFIG_SYS_CSPR6_EXT
|
||
|
CONFIG_SYS_CSPR7
|
||
|
CONFIG_SYS_CSPR7_EXT
|
||
|
CONFIG_SYS_CS_ALETIMING
|
||
|
CONFIG_SYS_CS_BURST
|
||
|
CONFIG_SYS_CS_DEADCYCLE
|
||
|
CONFIG_SYS_CS_HOLDCYCLE
|
||
|
CONFIG_SYS_DA850_CS2CFG
|
||
|
CONFIG_SYS_DA850_CS3CFG
|
||
|
CONFIG_SYS_DA850_DDR2_DDRPHYCR
|
||
|
CONFIG_SYS_DA850_DDR2_PBBPR
|
||
|
CONFIG_SYS_DA850_DDR2_SDBCR
|
||
|
CONFIG_SYS_DA850_DDR2_SDBCR2
|
||
|
CONFIG_SYS_DA850_DDR2_SDRCR
|
||
|
CONFIG_SYS_DA850_DDR2_SDTIMR
|
||
|
CONFIG_SYS_DA850_DDR2_SDTIMR2
|
||
|
CONFIG_SYS_DA850_PLL0_PLLDIV1
|
||
|
CONFIG_SYS_DA850_PLL0_PLLDIV2
|
||
|
CONFIG_SYS_DA850_PLL0_PLLDIV3
|
||
|
CONFIG_SYS_DA850_PLL0_PLLDIV4
|
||
|
CONFIG_SYS_DA850_PLL0_PLLDIV5
|
||
|
CONFIG_SYS_DA850_PLL0_PLLDIV6
|
||
|
CONFIG_SYS_DA850_PLL0_PLLDIV7
|
||
|
CONFIG_SYS_DA850_PLL0_PLLM
|
||
|
CONFIG_SYS_DA850_PLL0_POSTDIV
|
||
|
CONFIG_SYS_DA850_PLL0_PREDIV
|
||
|
CONFIG_SYS_DA850_PLL1_PLLDIV1
|
||
|
CONFIG_SYS_DA850_PLL1_PLLDIV2
|
||
|
CONFIG_SYS_DA850_PLL1_PLLDIV3
|
||
|
CONFIG_SYS_DA850_PLL1_PLLM
|
||
|
CONFIG_SYS_DA850_PLL1_POSTDIV
|
||
|
CONFIG_SYS_DA850_SYSCFG_SUSPSRC
|
||
|
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0
|
||
|
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
|
||
|
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2
|
||
|
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
|
||
|
CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
|
||
|
CONFIG_SYS_DAVINCI_I2C_SLAVE
|
||
|
CONFIG_SYS_DAVINCI_I2C_SLAVE1
|
||
|
CONFIG_SYS_DAVINCI_I2C_SLAVE2
|
||
|
CONFIG_SYS_DAVINCI_I2C_SPEED
|
||
|
CONFIG_SYS_DAVINCI_I2C_SPEED1
|
||
|
CONFIG_SYS_DAVINCI_I2C_SPEED2
|
||
|
CONFIG_SYS_DBAT
|
||
|
CONFIG_SYS_DBAT0L
|
||
|
CONFIG_SYS_DBAT0U
|
||
|
CONFIG_SYS_DBAT1L
|
||
|
CONFIG_SYS_DBAT1U
|
||
|
CONFIG_SYS_DBAT2L
|
||
|
CONFIG_SYS_DBAT2U
|
||
|
CONFIG_SYS_DBAT3L
|
||
|
CONFIG_SYS_DBAT3U
|
||
|
CONFIG_SYS_DBAT4L
|
||
|
CONFIG_SYS_DBAT4U
|
||
|
CONFIG_SYS_DBAT5L
|
||
|
CONFIG_SYS_DBAT5U
|
||
|
CONFIG_SYS_DBAT6L
|
||
|
CONFIG_SYS_DBAT6L_EARLY
|
||
|
CONFIG_SYS_DBAT6U
|
||
|
CONFIG_SYS_DBAT6U_EARLY
|
||
|
CONFIG_SYS_DBAT7L
|
||
|
CONFIG_SYS_DBAT7U
|
||
|
CONFIG_SYS_DCACHE_INV
|
||
|
CONFIG_SYS_DCACHE_LINESZ
|
||
|
CONFIG_SYS_DCACHE_SACR_VALUE
|
||
|
CONFIG_SYS_DCSRBAR
|
||
|
CONFIG_SYS_DCSRBAR_PHYS
|
||
|
CONFIG_SYS_DCSR_COP_CCP_ADDR
|
||
|
CONFIG_SYS_DCSR_DCFG_ADDR
|
||
|
CONFIG_SYS_DCSR_DCFG_OFFSET
|
||
|
CONFIG_SYS_DCU_ADDR
|
||
|
CONFIG_SYS_DDR1_CS0_BNDS
|
||
|
CONFIG_SYS_DDR2_CFG_1A
|
||
|
CONFIG_SYS_DDR2_CFG_1B
|
||
|
CONFIG_SYS_DDR2_CFG_2
|
||
|
CONFIG_SYS_DDR2_CLK_CTRL
|
||
|
CONFIG_SYS_DDR2_CS0_BNDS
|
||
|
CONFIG_SYS_DDR2_CS0_CONFIG
|
||
|
CONFIG_SYS_DDR2_CS1_BNDS
|
||
|
CONFIG_SYS_DDR2_CS1_CONFIG
|
||
|
CONFIG_SYS_DDR2_CS2_BNDS
|
||
|
CONFIG_SYS_DDR2_CS2_CONFIG
|
||
|
CONFIG_SYS_DDR2_CS3_BNDS
|
||
|
CONFIG_SYS_DDR2_CS3_CONFIG
|
||
|
CONFIG_SYS_DDR2_DATA_INIT
|
||
|
CONFIG_SYS_DDR2_EXT_REFRESH
|
||
|
CONFIG_SYS_DDR2_INTERVAL
|
||
|
CONFIG_SYS_DDR2_MODE_1
|
||
|
CONFIG_SYS_DDR2_MODE_2
|
||
|
CONFIG_SYS_DDR2_MODE_CTL
|
||
|
CONFIG_SYS_DDR2_TIMING_0
|
||
|
CONFIG_SYS_DDR2_TIMING_1
|
||
|
CONFIG_SYS_DDR2_TIMING_2
|
||
|
CONFIG_SYS_DDRCDR
|
||
|
CONFIG_SYS_DDRCDR_VALUE
|
||
|
CONFIG_SYS_DDRCMD_EM2
|
||
|
CONFIG_SYS_DDRCMD_EM3
|
||
|
CONFIG_SYS_DDRCMD_EN_DLL
|
||
|
CONFIG_SYS_DDRCMD_NOP
|
||
|
CONFIG_SYS_DDRCMD_OCD_DEFAULT
|
||
|
CONFIG_SYS_DDRCMD_OCD_EXIT
|
||
|
CONFIG_SYS_DDRCMD_PCHG_ALL
|
||
|
CONFIG_SYS_DDRCMD_RES_DLL
|
||
|
CONFIG_SYS_DDRCMD_RFSH
|
||
|
CONFIG_SYS_DDRD
|
||
|
CONFIG_SYS_DDRTC
|
||
|
CONFIG_SYS_DDRUA
|
||
|
CONFIG_SYS_DDR_BASE
|
||
|
CONFIG_SYS_DDR_BLOCK1_SIZE
|
||
|
CONFIG_SYS_DDR_BLOCK2_BASE
|
||
|
CONFIG_SYS_DDR_CACHED_ADDR
|
||
|
CONFIG_SYS_DDR_CDR_1
|
||
|
CONFIG_SYS_DDR_CDR_2
|
||
|
CONFIG_SYS_DDR_CFG_1A
|
||
|
CONFIG_SYS_DDR_CFG_1B
|
||
|
CONFIG_SYS_DDR_CFG_2
|
||
|
CONFIG_SYS_DDR_CLKSEL
|
||
|
CONFIG_SYS_DDR_CLK_CNTL
|
||
|
CONFIG_SYS_DDR_CLK_CONTROL
|
||
|
CONFIG_SYS_DDR_CLK_CTRL
|
||
|
CONFIG_SYS_DDR_CLK_CTRL_1000
|
||
|
CONFIG_SYS_DDR_CLK_CTRL_1200
|
||
|
CONFIG_SYS_DDR_CLK_CTRL_1333
|
||
|
CONFIG_SYS_DDR_CLK_CTRL_667
|
||
|
CONFIG_SYS_DDR_CLK_CTRL_800
|
||
|
CONFIG_SYS_DDR_CLK_CTRL_900
|
||
|
CONFIG_SYS_DDR_CONFIG
|
||
|
CONFIG_SYS_DDR_CONFIG_2
|
||
|
CONFIG_SYS_DDR_CONFIG_256
|
||
|
CONFIG_SYS_DDR_CONTROL
|
||
|
CONFIG_SYS_DDR_CONTROL2
|
||
|
CONFIG_SYS_DDR_CONTROL_1333
|
||
|
CONFIG_SYS_DDR_CONTROL_2
|
||
|
CONFIG_SYS_DDR_CONTROL_2_1333
|
||
|
CONFIG_SYS_DDR_CONTROL_2_800
|
||
|
CONFIG_SYS_DDR_CONTROL_800
|
||
|
CONFIG_SYS_DDR_CPO
|
||
|
CONFIG_SYS_DDR_CS0_BNDS
|
||
|
CONFIG_SYS_DDR_CS0_CONFIG
|
||
|
CONFIG_SYS_DDR_CS0_CONFIG_1333
|
||
|
CONFIG_SYS_DDR_CS0_CONFIG_2
|
||
|
CONFIG_SYS_DDR_CS0_CONFIG_800
|
||
|
CONFIG_SYS_DDR_CS1_BNDS
|
||
|
CONFIG_SYS_DDR_CS1_CONFIG
|
||
|
CONFIG_SYS_DDR_CS1_CONFIG_2
|
||
|
CONFIG_SYS_DDR_CS2_BNDS
|
||
|
CONFIG_SYS_DDR_CS2_CONFIG
|
||
|
CONFIG_SYS_DDR_CS3_BNDS
|
||
|
CONFIG_SYS_DDR_CS3_CONFIG
|
||
|
CONFIG_SYS_DDR_DATA_INIT
|
||
|
CONFIG_SYS_DDR_ERR_DIS
|
||
|
CONFIG_SYS_DDR_ERR_INT_EN
|
||
|
CONFIG_SYS_DDR_INIT_ADDR
|
||
|
CONFIG_SYS_DDR_INIT_EXT_ADDR
|
||
|
CONFIG_SYS_DDR_INTERVAL
|
||
|
CONFIG_SYS_DDR_INTERVAL_1000
|
||
|
CONFIG_SYS_DDR_INTERVAL_1200
|
||
|
CONFIG_SYS_DDR_INTERVAL_1333
|
||
|
CONFIG_SYS_DDR_INTERVAL_667
|
||
|
CONFIG_SYS_DDR_INTERVAL_800
|
||
|
CONFIG_SYS_DDR_INTERVAL_900
|
||
|
CONFIG_SYS_DDR_MODE
|
||
|
CONFIG_SYS_DDR_MODE2
|
||
|
CONFIG_SYS_DDR_MODE_1
|
||
|
CONFIG_SYS_DDR_MODE_1_1000
|
||
|
CONFIG_SYS_DDR_MODE_1_1200
|
||
|
CONFIG_SYS_DDR_MODE_1_1333
|
||
|
CONFIG_SYS_DDR_MODE_1_667
|
||
|
CONFIG_SYS_DDR_MODE_1_800
|
||
|
CONFIG_SYS_DDR_MODE_1_900
|
||
|
CONFIG_SYS_DDR_MODE_2
|
||
|
CONFIG_SYS_DDR_MODE_2_1000
|
||
|
CONFIG_SYS_DDR_MODE_2_1200
|
||
|
CONFIG_SYS_DDR_MODE_2_1333
|
||
|
CONFIG_SYS_DDR_MODE_2_667
|
||
|
CONFIG_SYS_DDR_MODE_2_800
|
||
|
CONFIG_SYS_DDR_MODE_2_900
|
||
|
CONFIG_SYS_DDR_MODE_CONTROL
|
||
|
CONFIG_SYS_DDR_MODE_CTL
|
||
|
CONFIG_SYS_DDR_MODE_WEAK
|
||
|
CONFIG_SYS_DDR_OCD_CTRL
|
||
|
CONFIG_SYS_DDR_OCD_STATUS
|
||
|
CONFIG_SYS_DDR_RAW_TIMING
|
||
|
CONFIG_SYS_DDR_RCW_1
|
||
|
CONFIG_SYS_DDR_RCW_2
|
||
|
CONFIG_SYS_DDR_SBE
|
||
|
CONFIG_SYS_DDR_SDRAM_BASE
|
||
|
CONFIG_SYS_DDR_SDRAM_BASE2
|
||
|
CONFIG_SYS_DDR_SDRAM_CFG
|
||
|
CONFIG_SYS_DDR_SDRAM_CFG2
|
||
|
CONFIG_SYS_DDR_SDRAM_CFG_2
|
||
|
CONFIG_SYS_DDR_SDRAM_CLK_CNTL
|
||
|
CONFIG_SYS_DDR_SDRAM_INTERVAL
|
||
|
CONFIG_SYS_DDR_SDRAM_MODE
|
||
|
CONFIG_SYS_DDR_SDRAM_MODE_2
|
||
|
CONFIG_SYS_DDR_SIZE
|
||
|
CONFIG_SYS_DDR_SR_CNTR
|
||
|
CONFIG_SYS_DDR_TIMING_0
|
||
|
CONFIG_SYS_DDR_TIMING_0_1000
|
||
|
CONFIG_SYS_DDR_TIMING_0_1200
|
||
|
CONFIG_SYS_DDR_TIMING_0_1333
|
||
|
CONFIG_SYS_DDR_TIMING_0_667
|
||
|
CONFIG_SYS_DDR_TIMING_0_800
|
||
|
CONFIG_SYS_DDR_TIMING_0_900
|
||
|
CONFIG_SYS_DDR_TIMING_1
|
||
|
CONFIG_SYS_DDR_TIMING_1_1000
|
||
|
CONFIG_SYS_DDR_TIMING_1_1200
|
||
|
CONFIG_SYS_DDR_TIMING_1_1333
|
||
|
CONFIG_SYS_DDR_TIMING_1_667
|
||
|
CONFIG_SYS_DDR_TIMING_1_800
|
||
|
CONFIG_SYS_DDR_TIMING_1_900
|
||
|
CONFIG_SYS_DDR_TIMING_2
|
||
|
CONFIG_SYS_DDR_TIMING_2_1000
|
||
|
CONFIG_SYS_DDR_TIMING_2_1200
|
||
|
CONFIG_SYS_DDR_TIMING_2_1333
|
||
|
CONFIG_SYS_DDR_TIMING_2_667
|
||
|
CONFIG_SYS_DDR_TIMING_2_800
|
||
|
CONFIG_SYS_DDR_TIMING_2_900
|
||
|
CONFIG_SYS_DDR_TIMING_3
|
||
|
CONFIG_SYS_DDR_TIMING_3_1000
|
||
|
CONFIG_SYS_DDR_TIMING_3_1200
|
||
|
CONFIG_SYS_DDR_TIMING_3_1333
|
||
|
CONFIG_SYS_DDR_TIMING_3_667
|
||
|
CONFIG_SYS_DDR_TIMING_3_800
|
||
|
CONFIG_SYS_DDR_TIMING_3_900
|
||
|
CONFIG_SYS_DDR_TIMING_4
|
||
|
CONFIG_SYS_DDR_TIMING_4_1333
|
||
|
CONFIG_SYS_DDR_TIMING_4_800
|
||
|
CONFIG_SYS_DDR_TIMING_5
|
||
|
CONFIG_SYS_DDR_TIMING_5_1333
|
||
|
CONFIG_SYS_DDR_TIMING_5_800
|
||
|
CONFIG_SYS_DDR_WRITE_DATA_DELAY
|
||
|
CONFIG_SYS_DDR_WRLVL_CNTL
|
||
|
CONFIG_SYS_DDR_WRLVL_CONTROL
|
||
|
CONFIG_SYS_DDR_WRLVL_CONTROL_1333
|
||
|
CONFIG_SYS_DDR_WRLVL_CONTROL_667
|
||
|
CONFIG_SYS_DDR_WRLVL_CONTROL_800
|
||
|
CONFIG_SYS_DDR_ZQ_CNTL
|
||
|
CONFIG_SYS_DDR_ZQ_CONTROL
|
||
|
CONFIG_SYS_DEBUG
|
||
|
CONFIG_SYS_DEBUG_SERVER_FW_ADDR
|
||
|
CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR
|
||
|
CONFIG_SYS_DECREMENT_PATTERNS
|
||
|
CONFIG_SYS_DEFAULT_IMMR
|
||
|
CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
|
||
|
CONFIG_SYS_DEFAULT_MBAR
|
||
|
CONFIG_SYS_DEFAULT_VIDEO_MODE
|
||
|
CONFIG_SYS_DEF_EEPROM_ADDR
|
||
|
CONFIG_SYS_DELAYED_ICACHE
|
||
|
CONFIG_SYS_DER
|
||
|
CONFIG_SYS_DEVICE_NULLDEV
|
||
|
CONFIG_SYS_DFU_DATA_BUF_SIZE
|
||
|
CONFIG_SYS_DFU_MAX_FILE_SIZE
|
||
|
CONFIG_SYS_DIAG_ADDR
|
||
|
CONFIG_SYS_DIALOG_PMIC_I2C_ADDR
|
||
|
CONFIG_SYS_DIMM_SLOTS_PER_CTLR
|
||
|
CONFIG_SYS_DIRECT_FLASH_NFS
|
||
|
CONFIG_SYS_DIRECT_FLASH_TFTP
|
||
|
CONFIG_SYS_DISCOVER_PHY
|
||
|
CONFIG_SYS_DISPLAY_BASE
|
||
|
CONFIG_SYS_DISP_CHR_RAM
|
||
|
CONFIG_SYS_DIU_ADDR
|
||
|
CONFIG_SYS_DM36x_PINMUX0
|
||
|
CONFIG_SYS_DM36x_PINMUX1
|
||
|
CONFIG_SYS_DM36x_PINMUX2
|
||
|
CONFIG_SYS_DM36x_PINMUX3
|
||
|
CONFIG_SYS_DM36x_PINMUX4
|
||
|
CONFIG_SYS_DM36x_PLL1_PREDIV
|
||
|
CONFIG_SYS_DM36x_PLL2_PREDIV
|
||
|
CONFIG_SYS_DMA_USE_INTSRAM
|
||
|
CONFIG_SYS_DOC_SHORT_TIMEOUT
|
||
|
CONFIG_SYS_DOC_SUPPORT_2000
|
||
|
CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
|
||
|
CONFIG_SYS_DP501_BASE
|
||
|
CONFIG_SYS_DP501_DIFFERENTIAL
|
||
|
CONFIG_SYS_DP501_I2C
|
||
|
CONFIG_SYS_DP501_VCAPCTRL0
|
||
|
CONFIG_SYS_DPAA_DCE
|
||
|
CONFIG_SYS_DPAA_FMAN
|
||
|
CONFIG_SYS_DPAA_PME
|
||
|
CONFIG_SYS_DPAA_QBMAN
|
||
|
CONFIG_SYS_DPAA_RMAN
|
||
|
CONFIG_SYS_DP_DDR_BASE
|
||
|
CONFIG_SYS_DP_DDR_BASE_PHY
|
||
|
CONFIG_SYS_DRAMSZ
|
||
|
CONFIG_SYS_DRAMSZ1
|
||
|
CONFIG_SYS_DRAM_BASE
|
||
|
CONFIG_SYS_DRAM_SIZE
|
||
|
CONFIG_SYS_DRAM_TEST
|
||
|
CONFIG_SYS_DS1339_TCR_VAL
|
||
|
CONFIG_SYS_DS1388_TCR_VAL
|
||
|
CONFIG_SYS_DSPIC_TEST_ADDR
|
||
|
CONFIG_SYS_DSPIC_TEST_MASK
|
||
|
CONFIG_SYS_DSPI_CS0
|
||
|
CONFIG_SYS_DSPI_CS2
|
||
|
CONFIG_SYS_DSPI_CTAR0
|
||
|
CONFIG_SYS_DSPI_CTAR1
|
||
|
CONFIG_SYS_DSPI_CTAR2
|
||
|
CONFIG_SYS_DSPI_CTAR3
|
||
|
CONFIG_SYS_DSPI_CTAR4
|
||
|
CONFIG_SYS_DSPI_CTAR5
|
||
|
CONFIG_SYS_DSPI_CTAR6
|
||
|
CONFIG_SYS_DSPI_CTAR7
|
||
|
CONFIG_SYS_DTT_ADM1021
|
||
|
CONFIG_SYS_DTT_BUS_NUM
|
||
|
CONFIG_SYS_DTT_HYSTERESIS
|
||
|
CONFIG_SYS_DTT_LOW_TEMP
|
||
|
CONFIG_SYS_DTT_MAX_TEMP
|
||
|
CONFIG_SYS_DTT_MIN_TEMP
|
||
|
CONFIG_SYS_DUART_RST
|
||
|
CONFIG_SYS_DV_CLKMODE
|
||
|
CONFIG_SYS_DV_NOR_BOOT_CFG
|
||
|
CONFIG_SYS_EBC_CFG
|
||
|
CONFIG_SYS_EBC_PB0AP
|
||
|
CONFIG_SYS_EBC_PB0CR
|
||
|
CONFIG_SYS_EBC_PB1AP
|
||
|
CONFIG_SYS_EBC_PB1CR
|
||
|
CONFIG_SYS_EBC_PB2AP
|
||
|
CONFIG_SYS_EBC_PB2CR
|
||
|
CONFIG_SYS_EBC_PB3AP
|
||
|
CONFIG_SYS_EBC_PB3CR
|
||
|
CONFIG_SYS_EBC_PB4AP
|
||
|
CONFIG_SYS_EBC_PB4CR
|
||
|
CONFIG_SYS_EBC_PB5AP
|
||
|
CONFIG_SYS_EBC_PB5CR
|
||
|
CONFIG_SYS_EBC_PB6AP
|
||
|
CONFIG_SYS_EBC_PB6CR
|
||
|
CONFIG_SYS_EBC_PB7AP
|
||
|
CONFIG_SYS_EBC_PB7CR
|
||
|
CONFIG_SYS_EBI_CFGR_VAL
|
||
|
CONFIG_SYS_EBI_CSA_VAL
|
||
|
CONFIG_SYS_EEPROM_BASE
|
||
|
CONFIG_SYS_EEPROM_BUS_NUM
|
||
|
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS
|
||
|
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
|
||
|
CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
|
||
|
CONFIG_SYS_EEPROM_SIZE
|
||
|
CONFIG_SYS_EEPROM_WP
|
||
|
CONFIG_SYS_EEPROM_WREN
|
||
|
CONFIG_SYS_EHCI_USB1_ADDR
|
||
|
CONFIG_SYS_ELBC_BASE
|
||
|
CONFIG_SYS_ELBC_BASE_PHYS
|
||
|
CONFIG_SYS_ELO3_DMA3
|
||
|
CONFIG_SYS_ELPIDA_INIT_DEV_OP
|
||
|
CONFIG_SYS_ELPIDA_OCD_EXIT
|
||
|
CONFIG_SYS_ELPIDA_RES_DLL
|
||
|
CONFIG_SYS_EMAC_TI_CLKDIV
|
||
|
CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
|
||
|
CONFIG_SYS_ENABLE_PADS_ALL
|
||
|
CONFIG_SYS_ENET_BD_BASE
|
||
|
CONFIG_SYS_ENV_ADDR
|
||
|
CONFIG_SYS_ENV_OFFSET
|
||
|
CONFIG_SYS_ENV_SECT_SIZE
|
||
|
CONFIG_SYS_EPLD_BASE
|
||
|
CONFIG_SYS_ETHOC_BASE
|
||
|
CONFIG_SYS_ETHOC_BUFFER_ADDR
|
||
|
CONFIG_SYS_ETH_IOBASE
|
||
|
CONFIG_SYS_ETVPE_CLK
|
||
|
CONFIG_SYS_EXCEPTION_VECTORS_HIGH
|
||
|
CONFIG_SYS_EXTBDINFO
|
||
|
CONFIG_SYS_EXTRA_ENV_RELOC
|
||
|
CONFIG_SYS_EXT_SERIAL_CLOCK
|
||
|
CONFIG_SYS_FAST_CLK
|
||
|
CONFIG_SYS_FAULT_ECCONFIG_SYS_NO_FLASHHO_LINK_DOWN
|
||
|
CONFIG_SYS_FAULT_ECHO_LINK_DOWN
|
||
|
CONFIG_SYS_FAULT_MII_ADDR
|
||
|
CONFIG_SYS_FCC_PSMR
|
||
|
CONFIG_SYS_FCPU133MHZ
|
||
|
CONFIG_SYS_FCPU266MHZ
|
||
|
CONFIG_SYS_FCPU333MHZ
|
||
|
CONFIG_SYS_FDC_DRIVE_NUMBER
|
||
|
CONFIG_SYS_FDC_HW_INIT
|
||
|
CONFIG_SYS_FDT_ADDR
|
||
|
CONFIG_SYS_FDT_BASE
|
||
|
CONFIG_SYS_FDT_LOAD_ADDR
|
||
|
CONFIG_SYS_FDT_PAD
|
||
|
CONFIG_SYS_FDT_SIZE
|
||
|
CONFIG_SYS_FEC0_IOBASE
|
||
|
CONFIG_SYS_FEC0_MIIBASE
|
||
|
CONFIG_SYS_FEC0_PHYADDR
|
||
|
CONFIG_SYS_FEC0_PINMUX
|
||
|
CONFIG_SYS_FEC1_IOBASE
|
||
|
CONFIG_SYS_FEC1_MIIBASE
|
||
|
CONFIG_SYS_FEC1_PHYADDR
|
||
|
CONFIG_SYS_FEC1_PINMUX
|
||
|
CONFIG_SYS_FECI2C
|
||
|
CONFIG_SYS_FEC_BUF_USE_SRAM
|
||
|
CONFIG_SYS_FEC_FULL_MII
|
||
|
CONFIG_SYS_FEC_NO_SHARED_PHY
|
||
|
CONFIG_SYS_FIFO_BASE
|
||
|
CONFIG_SYS_FIXED_PHY_ADDR
|
||
|
CONFIG_SYS_FIXED_PHY_PORT
|
||
|
CONFIG_SYS_FIXED_PHY_PORTS
|
||
|
CONFIG_SYS_FLASH
|
||
|
CONFIG_SYS_FLASH0
|
||
|
CONFIG_SYS_FLASH0_BASE
|
||
|
CONFIG_SYS_FLASH1
|
||
|
CONFIG_SYS_FLASH1_BASE
|
||
|
CONFIG_SYS_FLASH1_BASE_PHYS
|
||
|
CONFIG_SYS_FLASH1_BASE_PHYS_EARLY
|
||
|
CONFIG_SYS_FLASH2_BASE
|
||
|
CONFIG_SYS_FLASHBOOT
|
||
|
CONFIG_SYS_FLASH_2ND_16BIT_DEV
|
||
|
CONFIG_SYS_FLASH_2ND_ADDR
|
||
|
CONFIG_SYS_FLASH_ADDR0
|
||
|
CONFIG_SYS_FLASH_ADDR1
|
||
|
CONFIG_SYS_FLASH_ADDR_BASE
|
||
|
CONFIG_SYS_FLASH_AMD_CHECK_DQ7
|
||
|
CONFIG_SYS_FLASH_AUTOPROTECT_LIST
|
||
|
CONFIG_SYS_FLASH_BANKS_LIST
|
||
|
CONFIG_SYS_FLASH_BANKS_SIZES
|
||
|
CONFIG_SYS_FLASH_BANK_SIZE
|
||
|
CONFIG_SYS_FLASH_BASE
|
||
|
CONFIG_SYS_FLASH_BASE0
|
||
|
CONFIG_SYS_FLASH_BASE1
|
||
|
CONFIG_SYS_FLASH_BASE2
|
||
|
CONFIG_SYS_FLASH_BASE_1
|
||
|
CONFIG_SYS_FLASH_BASE_2
|
||
|
CONFIG_SYS_FLASH_BASE_CS1
|
||
|
CONFIG_SYS_FLASH_BASE_PHYS
|
||
|
CONFIG_SYS_FLASH_BASE_PHYS_EARLY
|
||
|
CONFIG_SYS_FLASH_BASE_PHYS_H
|
||
|
CONFIG_SYS_FLASH_BASE_PHYS_L
|
||
|
CONFIG_SYS_FLASH_BASE_PHYS_LOW
|
||
|
CONFIG_SYS_FLASH_BR_PRELIM
|
||
|
CONFIG_SYS_FLASH_CFI
|
||
|
CONFIG_SYS_FLASH_CFI_AMD_RESET
|
||
|
CONFIG_SYS_FLASH_CFI_BROKEN_TABLE
|
||
|
CONFIG_SYS_FLASH_CFI_BYPASS_READ
|
||
|
CONFIG_SYS_FLASH_CFI_NONBLOCK
|
||
|
CONFIG_SYS_FLASH_CFI_WIDTH
|
||
|
CONFIG_SYS_FLASH_CHECKSUM
|
||
|
CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
|
||
|
CONFIG_SYS_FLASH_EMPTY_INFO
|
||
|
CONFIG_SYS_FLASH_ERASE_TOUT
|
||
|
CONFIG_SYS_FLASH_LEGACY_256Kx8
|
||
|
CONFIG_SYS_FLASH_LEGACY_512Kx16
|
||
|
CONFIG_SYS_FLASH_LEGACY_512Kx8
|
||
|
CONFIG_SYS_FLASH_LOCK_TOUT
|
||
|
CONFIG_SYS_FLASH_OR_PRELIM
|
||
|
CONFIG_SYS_FLASH_PARMSECT_SZ
|
||
|
CONFIG_SYS_FLASH_PROTECTION
|
||
|
CONFIG_SYS_FLASH_QUIET_TEST
|
||
|
CONFIG_SYS_FLASH_READ0
|
||
|
CONFIG_SYS_FLASH_READ1
|
||
|
CONFIG_SYS_FLASH_READ2
|
||
|
CONFIG_SYS_FLASH_SECT_SIZE
|
||
|
CONFIG_SYS_FLASH_SECT_SZ
|
||
|
CONFIG_SYS_FLASH_SIZE
|
||
|
CONFIG_SYS_FLASH_SIZE_1
|
||
|
CONFIG_SYS_FLASH_SIZE_2
|
||
|
CONFIG_SYS_FLASH_UNLOCK_TOUT
|
||
|
CONFIG_SYS_FLASH_USE_BUFFER_WRITE
|
||
|
CONFIG_SYS_FLASH_VERIFY_AFTER_WRITE
|
||
|
CONFIG_SYS_FLASH_WORD_SIZE
|
||
|
CONFIG_SYS_FLASH_WRITE_TOUT
|
||
|
CONFIG_SYS_FLYCNFG_VAL
|
||
|
CONFIG_SYS_FM1_10GEC1_PHY_ADDR
|
||
|
CONFIG_SYS_FM1_10GEC2_PHY_ADDR
|
||
|
CONFIG_SYS_FM1_CLK
|
||
|
CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR
|
||
|
CONFIG_SYS_FM1_DTSEC1_PHY_ADDR
|
||
|
CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR
|
||
|
CONFIG_SYS_FM1_DTSEC2_PHY_ADDR
|
||
|
CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR
|
||
|
CONFIG_SYS_FM1_DTSEC3_PHY_ADDR
|
||
|
CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR
|
||
|
CONFIG_SYS_FM1_DTSEC4_PHY_ADDR
|
||
|
CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR
|
||
|
CONFIG_SYS_FM1_DTSEC5_PHY_ADDR
|
||
|
CONFIG_SYS_FM1_DTSEC_MDIO_ADDR
|
||
|
CONFIG_SYS_FM1_ONBOARD_PHY1_ADDR
|
||
|
CONFIG_SYS_FM1_ONBOARD_PHY2_ADDR
|
||
|
CONFIG_SYS_FM1_QSGMII11_PHY_ADDR
|
||
|
CONFIG_SYS_FM1_QSGMII21_PHY_ADDR
|
||
|
CONFIG_SYS_FM1_TGEC_MDIO_ADDR
|
||
|
CONFIG_SYS_FM2_10GEC1_PHY_ADDR
|
||
|
CONFIG_SYS_FM2_CLK
|
||
|
CONFIG_SYS_FM2_DTSEC1_PHY_ADDR
|
||
|
CONFIG_SYS_FM2_DTSEC2_PHY_ADDR
|
||
|
CONFIG_SYS_FM2_DTSEC3_PHY_ADDR
|
||
|
CONFIG_SYS_FM2_DTSEC4_PHY_ADDR
|
||
|
CONFIG_SYS_FM2_DTSEC_MDIO_ADDR
|
||
|
CONFIG_SYS_FM2_TGEC_MDIO_ADDR
|
||
|
CONFIG_SYS_FMAN_FW_ADDR
|
||
|
CONFIG_SYS_FMAN_V3
|
||
|
CONFIG_SYS_FM_MURAM_SIZE
|
||
|
CONFIG_SYS_FORM_3U_CPCI
|
||
|
CONFIG_SYS_FORM_3U_VPX
|
||
|
CONFIG_SYS_FORM_6U_CPCI
|
||
|
CONFIG_SYS_FORM_6U_VPX
|
||
|
CONFIG_SYS_FORM_AMC
|
||
|
CONFIG_SYS_FORM_ATCA_AMC
|
||
|
CONFIG_SYS_FORM_ATCA_PMC
|
||
|
CONFIG_SYS_FORM_CUSTOM
|
||
|
CONFIG_SYS_FORM_PCI
|
||
|
CONFIG_SYS_FORM_PCI_EXPRESS
|
||
|
CONFIG_SYS_FORM_PMC
|
||
|
CONFIG_SYS_FORM_PMC_XMC
|
||
|
CONFIG_SYS_FORM_VME
|
||
|
CONFIG_SYS_FORM_XMC
|
||
|
CONFIG_SYS_FPGA0_BASE
|
||
|
CONFIG_SYS_FPGA0_SIZE
|
||
|
CONFIG_SYS_FPGA1_BASE
|
||
|
CONFIG_SYS_FPGA2_BASE
|
||
|
CONFIG_SYS_FPGA3_BASE
|
||
|
CONFIG_SYS_FPGAREG_DATE
|
||
|
CONFIG_SYS_FPGAREG_DIPSW
|
||
|
CONFIG_SYS_FPGAREG_FREQ
|
||
|
CONFIG_SYS_FPGAREG_RESET
|
||
|
CONFIG_SYS_FPGAREG_RESET_CODE
|
||
|
CONFIG_SYS_FPGA_AMASK
|
||
|
CONFIG_SYS_FPGA_BASE
|
||
|
CONFIG_SYS_FPGA_BASE0
|
||
|
CONFIG_SYS_FPGA_BASE1
|
||
|
CONFIG_SYS_FPGA_BASE_0
|
||
|
CONFIG_SYS_FPGA_BASE_1
|
||
|
CONFIG_SYS_FPGA_BASE_ADDR
|
||
|
CONFIG_SYS_FPGA_BASE_PHYS
|
||
|
CONFIG_SYS_FPGA_CHECK_BUSY
|
||
|
CONFIG_SYS_FPGA_CHECK_CTRLC
|
||
|
CONFIG_SYS_FPGA_CHECK_ERROR
|
||
|
CONFIG_SYS_FPGA_CHIPSIDE_LOOPBACK
|
||
|
CONFIG_SYS_FPGA_CLK
|
||
|
CONFIG_SYS_FPGA_COMMON
|
||
|
CONFIG_SYS_FPGA_COUNT
|
||
|
CONFIG_SYS_FPGA_CSOR
|
||
|
CONFIG_SYS_FPGA_CSPR
|
||
|
CONFIG_SYS_FPGA_CSPR_EXT
|
||
|
CONFIG_SYS_FPGA_CTRL
|
||
|
CONFIG_SYS_FPGA_CTRL_CF_RESET
|
||
|
CONFIG_SYS_FPGA_CTRL_PS2_RESET
|
||
|
CONFIG_SYS_FPGA_CTRL_WDI
|
||
|
CONFIG_SYS_FPGA_DATA
|
||
|
CONFIG_SYS_FPGA_DONE
|
||
|
CONFIG_SYS_FPGA_DPRAM_RST
|
||
|
CONFIG_SYS_FPGA_DPRAM_RW_TYPE
|
||
|
CONFIG_SYS_FPGA_DPRAM_R_INT_LINE
|
||
|
CONFIG_SYS_FPGA_DPRAM_W_INT_LINE
|
||
|
CONFIG_SYS_FPGA_FIFO_BASE
|
||
|
CONFIG_SYS_FPGA_FTIM0
|
||
|
CONFIG_SYS_FPGA_FTIM1
|
||
|
CONFIG_SYS_FPGA_FTIM2
|
||
|
CONFIG_SYS_FPGA_FTIM3
|
||
|
CONFIG_SYS_FPGA_INIT
|
||
|
CONFIG_SYS_FPGA_IS_PROTO
|
||
|
CONFIG_SYS_FPGA_LINESIDE_LOOPBACK
|
||
|
CONFIG_SYS_FPGA_MAGIC
|
||
|
CONFIG_SYS_FPGA_MAGIC_MASK
|
||
|
CONFIG_SYS_FPGA_MAX_SIZE
|
||
|
CONFIG_SYS_FPGA_MODE
|
||
|
CONFIG_SYS_FPGA_MODE_CF_RESET
|
||
|
CONFIG_SYS_FPGA_MODE_DUART_RESET
|
||
|
CONFIG_SYS_FPGA_MODE_ENABLE_OUTPUT
|
||
|
CONFIG_SYS_FPGA_MODE_TS_CLEAR
|
||
|
CONFIG_SYS_FPGA_MODE_TS_IRQ_CLEAR
|
||
|
CONFIG_SYS_FPGA_MODE_TS_IRQ_ENABLE
|
||
|
CONFIG_SYS_FPGA_NO_RFL_HI
|
||
|
CONFIG_SYS_FPGA_PHY0_INT
|
||
|
CONFIG_SYS_FPGA_PHY1_INT
|
||
|
CONFIG_SYS_FPGA_PRG
|
||
|
CONFIG_SYS_FPGA_PROG
|
||
|
CONFIG_SYS_FPGA_PROG_FEEDBACK
|
||
|
CONFIG_SYS_FPGA_PROG_TIME
|
||
|
CONFIG_SYS_FPGA_PTR
|
||
|
CONFIG_SYS_FPGA_REG_BASE
|
||
|
CONFIG_SYS_FPGA_REG_BASE_ADDR
|
||
|
CONFIG_SYS_FPGA_SIZE
|
||
|
CONFIG_SYS_FPGA_SLIC0_CS
|
||
|
CONFIG_SYS_FPGA_SLIC0_ENABLE
|
||
|
CONFIG_SYS_FPGA_SLIC0_INT
|
||
|
CONFIG_SYS_FPGA_SLIC0_R_DPRAM_INT
|
||
|
CONFIG_SYS_FPGA_SLIC0_W_DPRAM_INT
|
||
|
CONFIG_SYS_FPGA_SLIC1_CS
|
||
|
CONFIG_SYS_FPGA_SLIC1_ENABLE
|
||
|
CONFIG_SYS_FPGA_SLIC1_INT
|
||
|
CONFIG_SYS_FPGA_SLIC1_R_DPRAM_INT
|
||
|
CONFIG_SYS_FPGA_SLIC1_W_DPRAM_INT
|
||
|
CONFIG_SYS_FPGA_SPARTAN2
|
||
|
CONFIG_SYS_FPGA_STATUS
|
||
|
CONFIG_SYS_FPGA_STATUS_DIP0
|
||
|
CONFIG_SYS_FPGA_STATUS_DIP1
|
||
|
CONFIG_SYS_FPGA_STATUS_DIP2
|
||
|
CONFIG_SYS_FPGA_STATUS_FLASH
|
||
|
CONFIG_SYS_FPGA_STATUS_TS_IRQ
|
||
|
CONFIG_SYS_FPGA_TS
|
||
|
CONFIG_SYS_FPGA_TS_CAP0
|
||
|
CONFIG_SYS_FPGA_TS_CAP0_LOW
|
||
|
CONFIG_SYS_FPGA_TS_CAP1
|
||
|
CONFIG_SYS_FPGA_TS_CAP1_LOW
|
||
|
CONFIG_SYS_FPGA_TS_CAP2
|
||
|
CONFIG_SYS_FPGA_TS_CAP2_LOW
|
||
|
CONFIG_SYS_FPGA_TS_CAP3
|
||
|
CONFIG_SYS_FPGA_TS_CAP3_LOW
|
||
|
CONFIG_SYS_FPGA_TS_LOW
|
||
|
CONFIG_SYS_FPGA_UART0_FO
|
||
|
CONFIG_SYS_FPGA_UART1_FO
|
||
|
CONFIG_SYS_FPGA_USER_LED0
|
||
|
CONFIG_SYS_FPGA_USER_LED1
|
||
|
CONFIG_SYS_FPGA_VER_MASK
|
||
|
CONFIG_SYS_FPGA_WAIT
|
||
|
CONFIG_SYS_FPGA_WAIT_BUSY
|
||
|
CONFIG_SYS_FPGA_WAIT_CONFIG
|
||
|
CONFIG_SYS_FPGA_WAIT_INIT
|
||
|
CONFIG_SYS_FPGA_xxx
|
||
|
CONFIG_SYS_FSL_AIOP1_BASE
|
||
|
CONFIG_SYS_FSL_AIOP1_SIZE
|
||
|
CONFIG_SYS_FSL_B4860QDS_XFI_ERR
|
||
|
CONFIG_SYS_FSL_BMAN_ADDR
|
||
|
CONFIG_SYS_FSL_BMAN_OFFSET
|
||
|
CONFIG_SYS_FSL_BOOTROM_BASE
|
||
|
CONFIG_SYS_FSL_BOOTROM_SIZE
|
||
|
CONFIG_SYS_FSL_CCSR_BASE
|
||
|
CONFIG_SYS_FSL_CCSR_GUR_BE
|
||
|
CONFIG_SYS_FSL_CCSR_GUR_LE
|
||
|
CONFIG_SYS_FSL_CCSR_SCFG_BE
|
||
|
CONFIG_SYS_FSL_CCSR_SCFG_LE
|
||
|
CONFIG_SYS_FSL_CCSR_SIZE
|
||
|
CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR
|
||
|
CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR
|
||
|
CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR
|
||
|
CONFIG_SYS_FSL_CLK
|
||
|
CONFIG_SYS_FSL_CLK_ADDR
|
||
|
CONFIG_SYS_FSL_CLUSTER_1_L2
|
||
|
CONFIG_SYS_FSL_CLUSTER_1_L2_OFFSET
|
||
|
CONFIG_SYS_FSL_CLUSTER_CLOCKS
|
||
|
CONFIG_SYS_FSL_CORENET_CCM_ADDR
|
||
|
CONFIG_SYS_FSL_CORENET_CCM_OFFSET
|
||
|
CONFIG_SYS_FSL_CORENET_CLK_ADDR
|
||
|
CONFIG_SYS_FSL_CORENET_CLK_OFFSET
|
||
|
CONFIG_SYS_FSL_CORENET_PMAN
|
||
|
CONFIG_SYS_FSL_CORENET_PMAN1_OFFSET
|
||
|
CONFIG_SYS_FSL_CORENET_PMAN2_OFFSET
|
||
|
CONFIG_SYS_FSL_CORENET_PMAN3_OFFSET
|
||
|
CONFIG_SYS_FSL_CORENET_PME_ADDR
|
||
|
CONFIG_SYS_FSL_CORENET_PME_OFFSET
|
||
|
CONFIG_SYS_FSL_CORENET_RCPM_ADDR
|
||
|
CONFIG_SYS_FSL_CORENET_RCPM_OFFSET
|
||
|
CONFIG_SYS_FSL_CORENET_RMAN_ADDR
|
||
|
CONFIG_SYS_FSL_CORENET_RMAN_OFFSET
|
||
|
CONFIG_SYS_FSL_CORENET_SERDES2_ADDR
|
||
|
CONFIG_SYS_FSL_CORENET_SERDES2_OFFSET
|
||
|
CONFIG_SYS_FSL_CORENET_SERDES3_ADDR
|
||
|
CONFIG_SYS_FSL_CORENET_SERDES3_OFFSET
|
||
|
CONFIG_SYS_FSL_CORENET_SERDES4_ADDR
|
||
|
CONFIG_SYS_FSL_CORENET_SERDES4_OFFSET
|
||
|
CONFIG_SYS_FSL_CORENET_SERDES_ADDR
|
||
|
CONFIG_SYS_FSL_CORENET_SERDES_OFFSET
|
||
|
CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
|
||
|
CONFIG_SYS_FSL_CORES_PER_CLUSTER
|
||
|
CONFIG_SYS_FSL_CPC
|
||
|
CONFIG_SYS_FSL_CPC_ADDR
|
||
|
CONFIG_SYS_FSL_CPC_OFFSET
|
||
|
CONFIG_SYS_FSL_CSU_ADDR
|
||
|
CONFIG_SYS_FSL_DCFG_ADDR
|
||
|
CONFIG_SYS_FSL_DCSR_BASE
|
||
|
CONFIG_SYS_FSL_DCSR_DDR2_ADDR
|
||
|
CONFIG_SYS_FSL_DCSR_DDR3_ADDR
|
||
|
CONFIG_SYS_FSL_DCSR_DDR4_ADDR
|
||
|
CONFIG_SYS_FSL_DCSR_DDR_ADDR
|
||
|
CONFIG_SYS_FSL_DCSR_SIZE
|
||
|
CONFIG_SYS_FSL_DCU_BE
|
||
|
CONFIG_SYS_FSL_DCU_LE
|
||
|
CONFIG_SYS_FSL_DDR2_ADDR
|
||
|
CONFIG_SYS_FSL_DDR3L
|
||
|
CONFIG_SYS_FSL_DDR3_ADDR
|
||
|
CONFIG_SYS_FSL_DDR_ADDR
|
||
|
CONFIG_SYS_FSL_DDR_EMU
|
||
|
CONFIG_SYS_FSL_DDR_INTLV_256B
|
||
|
CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
|
||
|
CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
|
||
|
CONFIG_SYS_FSL_DRAM_BASE1
|
||
|
CONFIG_SYS_FSL_DRAM_BASE2
|
||
|
CONFIG_SYS_FSL_DRAM_BASE3
|
||
|
CONFIG_SYS_FSL_DRAM_SIZE1
|
||
|
CONFIG_SYS_FSL_DRAM_SIZE2
|
||
|
CONFIG_SYS_FSL_DRAM_SIZE3
|
||
|
CONFIG_SYS_FSL_DSPI_BE
|
||
|
CONFIG_SYS_FSL_DSP_CCSRBAR
|
||
|
CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
|
||
|
CONFIG_SYS_FSL_DSP_CCSRBAR_PHYS
|
||
|
CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR
|
||
|
CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET
|
||
|
CONFIG_SYS_FSL_DSP_DDR_ADDR
|
||
|
CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
|
||
|
CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
|
||
|
CONFIG_SYS_FSL_ERRATUM_A008751
|
||
|
CONFIG_SYS_FSL_ERRATUM_A_004934
|
||
|
CONFIG_SYS_FSL_ESDHC_ADDR
|
||
|
CONFIG_SYS_FSL_ESDHC_BE
|
||
|
CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
|
||
|
CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT
|
||
|
CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
|
||
|
CONFIG_SYS_FSL_ESDHC_LE
|
||
|
CONFIG_SYS_FSL_ESDHC_NUM
|
||
|
CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
|
||
|
CONFIG_SYS_FSL_ESDHC_USE_PIO
|
||
|
CONFIG_SYS_FSL_FM
|
||
|
CONFIG_SYS_FSL_FM1_ADDR
|
||
|
CONFIG_SYS_FSL_FM1_DTSEC1_ADDR
|
||
|
CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET
|
||
|
CONFIG_SYS_FSL_FM1_OFFSET
|
||
|
CONFIG_SYS_FSL_FM1_RX0_10G_OFFSET
|
||
|
CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET
|
||
|
CONFIG_SYS_FSL_FM1_RX1_10G_OFFSET
|
||
|
CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET
|
||
|
CONFIG_SYS_FSL_FM1_RX2_1G_OFFSET
|
||
|
CONFIG_SYS_FSL_FM1_RX3_1G_OFFSET
|
||
|
CONFIG_SYS_FSL_FM1_RX4_1G_OFFSET
|
||
|
CONFIG_SYS_FSL_FM1_RX5_1G_OFFSET
|
||
|
CONFIG_SYS_FSL_FM2_ADDR
|
||
|
CONFIG_SYS_FSL_FM2_OFFSET
|
||
|
CONFIG_SYS_FSL_FM2_RX0_10G_OFFSET
|
||
|
CONFIG_SYS_FSL_FM2_RX0_1G_OFFSET
|
||
|
CONFIG_SYS_FSL_FM2_RX1_10G_OFFSET
|
||
|
CONFIG_SYS_FSL_FM2_RX1_1G_OFFSET
|
||
|
CONFIG_SYS_FSL_FM2_RX2_1G_OFFSET
|
||
|
CONFIG_SYS_FSL_FM2_RX3_1G_OFFSET
|
||
|
CONFIG_SYS_FSL_FM2_RX4_1G_OFFSET
|
||
|
CONFIG_SYS_FSL_FM2_RX5_1G_OFFSET
|
||
|
CONFIG_SYS_FSL_FMAN_ADDR
|
||
|
CONFIG_SYS_FSL_GUTS_ADDR
|
||
|
CONFIG_SYS_FSL_I2C
|
||
|
CONFIG_SYS_FSL_I2C2_OFFSET
|
||
|
CONFIG_SYS_FSL_I2C2_SLAVE
|
||
|
CONFIG_SYS_FSL_I2C2_SPEED
|
||
|
CONFIG_SYS_FSL_I2C3_OFFSET
|
||
|
CONFIG_SYS_FSL_I2C3_SLAVE
|
||
|
CONFIG_SYS_FSL_I2C3_SPEED
|
||
|
CONFIG_SYS_FSL_I2C4_OFFSET
|
||
|
CONFIG_SYS_FSL_I2C4_SLAVE
|
||
|
CONFIG_SYS_FSL_I2C4_SPEED
|
||
|
CONFIG_SYS_FSL_I2C_OFFSET
|
||
|
CONFIG_SYS_FSL_I2C_SLAVE
|
||
|
CONFIG_SYS_FSL_I2C_SPEED
|
||
|
CONFIG_SYS_FSL_IFC_BASE
|
||
|
CONFIG_SYS_FSL_IFC_BASE1
|
||
|
CONFIG_SYS_FSL_IFC_BASE2
|
||
|
CONFIG_SYS_FSL_IFC_BE
|
||
|
CONFIG_SYS_FSL_IFC_LE
|
||
|
CONFIG_SYS_FSL_IFC_SIZE
|
||
|
CONFIG_SYS_FSL_IFC_SIZE1
|
||
|
CONFIG_SYS_FSL_IFC_SIZE1_1
|
||
|
CONFIG_SYS_FSL_IFC_SIZE2
|
||
|
CONFIG_SYS_FSL_ISBC_VER
|
||
|
CONFIG_SYS_FSL_JR0_ADDR
|
||
|
CONFIG_SYS_FSL_JR0_OFFSET
|
||
|
CONFIG_SYS_FSL_LS1_CLK_ADDR
|
||
|
CONFIG_SYS_FSL_LSCH3_SERDES_ADDR
|
||
|
CONFIG_SYS_FSL_MAX_NUM_OF_SEC
|
||
|
CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR
|
||
|
CONFIG_SYS_FSL_MC_BASE
|
||
|
CONFIG_SYS_FSL_MC_SIZE
|
||
|
CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
|
||
|
CONFIG_SYS_FSL_NI_BASE
|
||
|
CONFIG_SYS_FSL_NI_SIZE
|
||
|
CONFIG_SYS_FSL_NO_SERDES
|
||
|
CONFIG_SYS_FSL_NUM_CC_PLL
|
||
|
CONFIG_SYS_FSL_NUM_CC_PLLS
|
||
|
CONFIG_SYS_FSL_OCRAM_BASE
|
||
|
CONFIG_SYS_FSL_OCRAM_SIZE
|
||
|
CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
|
||
|
CONFIG_SYS_FSL_PAMU_OFFSET
|
||
|
CONFIG_SYS_FSL_PBL_PBI
|
||
|
CONFIG_SYS_FSL_PBL_RCW
|
||
|
CONFIG_SYS_FSL_PCIE_COMPAT
|
||
|
CONFIG_SYS_FSL_PCI_VER_3_X
|
||
|
CONFIG_SYS_FSL_PEBUF_BASE
|
||
|
CONFIG_SYS_FSL_PEBUF_SIZE
|
||
|
CONFIG_SYS_FSL_PEX_LUT_BE
|
||
|
CONFIG_SYS_FSL_PEX_LUT_LE
|
||
|
CONFIG_SYS_FSL_PMIC_I2C_ADDR
|
||
|
CONFIG_SYS_FSL_PMU_ADDR
|
||
|
CONFIG_SYS_FSL_PMU_CLTBENR
|
||
|
CONFIG_SYS_FSL_QBMAN_BASE
|
||
|
CONFIG_SYS_FSL_QBMAN_SIZE
|
||
|
CONFIG_SYS_FSL_QBMAN_SIZE_1
|
||
|
CONFIG_SYS_FSL_QMAN_ADDR
|
||
|
CONFIG_SYS_FSL_QMAN_OFFSET
|
||
|
CONFIG_SYS_FSL_QMAN_V3
|
||
|
CONFIG_SYS_FSL_QSPI_AHB
|
||
|
CONFIG_SYS_FSL_QSPI_BASE
|
||
|
CONFIG_SYS_FSL_QSPI_BASE1
|
||
|
CONFIG_SYS_FSL_QSPI_BASE2
|
||
|
CONFIG_SYS_FSL_QSPI_BE
|
||
|
CONFIG_SYS_FSL_QSPI_LE
|
||
|
CONFIG_SYS_FSL_QSPI_SIZE
|
||
|
CONFIG_SYS_FSL_QSPI_SIZE1
|
||
|
CONFIG_SYS_FSL_QSPI_SIZE2
|
||
|
CONFIG_SYS_FSL_RAID_ENGINE
|
||
|
CONFIG_SYS_FSL_RAID_ENGINE_ADDR
|
||
|
CONFIG_SYS_FSL_RAID_ENGINE_OFFSET
|
||
|
CONFIG_SYS_FSL_RCPM_ADDR
|
||
|
CONFIG_SYS_FSL_RMU
|
||
|
CONFIG_SYS_FSL_RST_ADDR
|
||
|
CONFIG_SYS_FSL_SCFG_ADDR
|
||
|
CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR
|
||
|
CONFIG_SYS_FSL_SCFG_IODSECR1_OFFSET
|
||
|
CONFIG_SYS_FSL_SCFG_OFFSET
|
||
|
CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET
|
||
|
CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR
|
||
|
CONFIG_SYS_FSL_SEC_ADDR
|
||
|
CONFIG_SYS_FSL_SEC_IDX_OFFSET
|
||
|
CONFIG_SYS_FSL_SEC_MON_BE
|
||
|
CONFIG_SYS_FSL_SEC_MON_LE
|
||
|
CONFIG_SYS_FSL_SEC_OFFSET
|
||
|
CONFIG_SYS_FSL_SERDES
|
||
|
CONFIG_SYS_FSL_SERDES_ADDR
|
||
|
CONFIG_SYS_FSL_SFP_BE
|
||
|
CONFIG_SYS_FSL_SFP_LE
|
||
|
CONFIG_SYS_FSL_SFP_VER_3_0
|
||
|
CONFIG_SYS_FSL_SFP_VER_3_2
|
||
|
CONFIG_SYS_FSL_SFP_VER_3_4
|
||
|
CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
|
||
|
CONFIG_SYS_FSL_SNVS_LE
|
||
|
CONFIG_SYS_FSL_SRDS_3
|
||
|
CONFIG_SYS_FSL_SRDS_4
|
||
|
CONFIG_SYS_FSL_SRDS_NUM_PLLS
|
||
|
CONFIG_SYS_FSL_SRIO_ADDR
|
||
|
CONFIG_SYS_FSL_SRIO_IB_WIN_NUM
|
||
|
CONFIG_SYS_FSL_SRIO_LIODN
|
||
|
CONFIG_SYS_FSL_SRIO_MAX_PORTS
|
||
|
CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM
|
||
|
CONFIG_SYS_FSL_SRIO_OB_WIN_NUM
|
||
|
CONFIG_SYS_FSL_SRIO_OFFSET
|
||
|
CONFIG_SYS_FSL_SRK_LE
|
||
|
CONFIG_SYS_FSL_TBCLK_DIV
|
||
|
CONFIG_SYS_FSL_TIMER_ADDR
|
||
|
CONFIG_SYS_FSL_USB1_ADDR
|
||
|
CONFIG_SYS_FSL_USB1_PHY_ENABLE
|
||
|
CONFIG_SYS_FSL_USB2_ADDR
|
||
|
CONFIG_SYS_FSL_USB2_PHY_ENABLE
|
||
|
CONFIG_SYS_FSL_USB_CTRL_PHY_EN
|
||
|
CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN
|
||
|
CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
|
||
|
CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE
|
||
|
CONFIG_SYS_FSL_USB_HS_DISCNCT_INC
|
||
|
CONFIG_SYS_FSL_USB_INTERNAL_SOC_CLK_EN
|
||
|
CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
|
||
|
CONFIG_SYS_FSL_USB_PLLPRG1_PHY_DIV
|
||
|
CONFIG_SYS_FSL_USB_PLLPRG2_FRAC_LPF_EN
|
||
|
CONFIG_SYS_FSL_USB_PLLPRG2_MFI
|
||
|
CONFIG_SYS_FSL_USB_PLLPRG2_MFI_INTERNAL_CLK
|
||
|
CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN
|
||
|
CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN
|
||
|
CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN
|
||
|
CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV
|
||
|
CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV_INTERNAL_CLK
|
||
|
CONFIG_SYS_FSL_USB_PWRFLT_CR_EN
|
||
|
CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL
|
||
|
CONFIG_SYS_FSL_USB_SQUELCH_PROG_MASK
|
||
|
CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_0
|
||
|
CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_3
|
||
|
CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0
|
||
|
CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3
|
||
|
CONFIG_SYS_FSL_USB_SYS_CLK_VALID
|
||
|
CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_EN
|
||
|
CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_MASK
|
||
|
CONFIG_SYS_FSL_USDHC_NUM
|
||
|
CONFIG_SYS_FSL_WDOG_BE
|
||
|
CONFIG_SYS_FSL_WRIOP1_ADDR
|
||
|
CONFIG_SYS_FSL_WRIOP1_BASE
|
||
|
CONFIG_SYS_FSL_WRIOP1_MDIO1
|
||
|
CONFIG_SYS_FSL_WRIOP1_MDIO2
|
||
|
CONFIG_SYS_FSL_WRIOP1_SIZE
|
||
|
CONFIG_SYS_FSL_XHCI_USB1_ADDR
|
||
|
CONFIG_SYS_FSL_XHCI_USB2_ADDR
|
||
|
CONFIG_SYS_FSL_XHCI_USB3_ADDR
|
||
|
CONFIG_SYS_FSMC_BASE
|
||
|
CONFIG_SYS_FSMC_NAND_16BIT
|
||
|
CONFIG_SYS_FSMC_NAND_8BIT
|
||
|
CONFIG_SYS_FSMC_NAND_SP
|
||
|
CONFIG_SYS_FTAHBC020S_SLAVE_BSR_6
|
||
|
CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE
|
||
|
CONFIG_SYS_FTPMU010_PDLLCR0_HCLKOUTDIS
|
||
|
CONFIG_SYS_FTPMU010_SDRAMHTC
|
||
|
CONFIG_SYS_FTSDMC021_BANK0_BASE
|
||
|
CONFIG_SYS_FTSDMC021_BANK0_BSR
|
||
|
CONFIG_SYS_FTSDMC021_BANK1_BASE
|
||
|
CONFIG_SYS_FTSDMC021_BANK1_BSR
|
||
|
CONFIG_SYS_FTSDMC021_CR1
|
||
|
CONFIG_SYS_FTSDMC021_CR2
|
||
|
CONFIG_SYS_FTSDMC021_TP1
|
||
|
CONFIG_SYS_FTSDMC021_TP2
|
||
|
CONFIG_SYS_FTSMC020_CONFIGS
|
||
|
CONFIG_SYS_FULL_VA
|
||
|
CONFIG_SYS_GAFR0_L_VAL
|
||
|
CONFIG_SYS_GAFR0_U_VAL
|
||
|
CONFIG_SYS_GAFR1_L_VAL
|
||
|
CONFIG_SYS_GAFR1_U_VAL
|
||
|
CONFIG_SYS_GAFR2_L_VAL
|
||
|
CONFIG_SYS_GAFR2_U_VAL
|
||
|
CONFIG_SYS_GAFR3_L_VAL
|
||
|
CONFIG_SYS_GAFR3_U_VAL
|
||
|
CONFIG_SYS_GBIT_MII1_BUSNAME
|
||
|
CONFIG_SYS_GBIT_MII_BUSNAME
|
||
|
CONFIG_SYS_GBL_DATA_ADDR
|
||
|
CONFIG_SYS_GBL_DATA_OFFSET
|
||
|
CONFIG_SYS_GBL_DATA_SIZE
|
||
|
CONFIG_SYS_GENERIC_BOARD
|
||
|
CONFIG_SYS_GENERIC_GLOBAL_DATA
|
||
|
CONFIG_SYS_GIC400_ADDR
|
||
|
CONFIG_SYS_GLOBAL_SDRAM_LIMIT
|
||
|
CONFIG_SYS_GP1DIR
|
||
|
CONFIG_SYS_GP1ODR
|
||
|
CONFIG_SYS_GP2DIR
|
||
|
CONFIG_SYS_GP2ODR
|
||
|
CONFIG_SYS_GPCR0_VAL
|
||
|
CONFIG_SYS_GPCR1_VAL
|
||
|
CONFIG_SYS_GPCR2_VAL
|
||
|
CONFIG_SYS_GPCR3_VAL
|
||
|
CONFIG_SYS_GPDR0_VAL
|
||
|
CONFIG_SYS_GPDR1_VAL
|
||
|
CONFIG_SYS_GPDR2_VAL
|
||
|
CONFIG_SYS_GPDR3_VAL
|
||
|
CONFIG_SYS_GPIO0_ISR1H
|
||
|
CONFIG_SYS_GPIO0_ISR1L
|
||
|
CONFIG_SYS_GPIO0_ISR2H
|
||
|
CONFIG_SYS_GPIO0_ISR2L
|
||
|
CONFIG_SYS_GPIO0_ODR
|
||
|
CONFIG_SYS_GPIO0_OR
|
||
|
CONFIG_SYS_GPIO0_OSRH
|
||
|
CONFIG_SYS_GPIO0_OSRL
|
||
|
CONFIG_SYS_GPIO0_TCR
|
||
|
CONFIG_SYS_GPIO0_TSRH
|
||
|
CONFIG_SYS_GPIO0_TSRL
|
||
|
CONFIG_SYS_GPIO1_DAT
|
||
|
CONFIG_SYS_GPIO1_DIR
|
||
|
CONFIG_SYS_GPIO1_EN
|
||
|
CONFIG_SYS_GPIO1_FUNC
|
||
|
CONFIG_SYS_GPIO1_ISR1H
|
||
|
CONFIG_SYS_GPIO1_ISR1L
|
||
|
CONFIG_SYS_GPIO1_LED
|
||
|
CONFIG_SYS_GPIO1_OSRH
|
||
|
CONFIG_SYS_GPIO1_OSRL
|
||
|
CONFIG_SYS_GPIO1_OUT
|
||
|
CONFIG_SYS_GPIO1_PRELIM
|
||
|
CONFIG_SYS_GPIO1_TCR
|
||
|
CONFIG_SYS_GPIO1_TSRH
|
||
|
CONFIG_SYS_GPIO1_TSRL
|
||
|
CONFIG_SYS_GPIO2_DAT
|
||
|
CONFIG_SYS_GPIO2_DIR
|
||
|
CONFIG_SYS_GPIO2_PRELIM
|
||
|
CONFIG_SYS_GPIO_0_ADDR
|
||
|
CONFIG_SYS_GPIO_BASE
|
||
|
CONFIG_SYS_GPIO_BOARD_RESET
|
||
|
CONFIG_SYS_GPIO_CAN_ENABLE
|
||
|
CONFIG_SYS_GPIO_CRAM_ADV
|
||
|
CONFIG_SYS_GPIO_CRAM_CLK
|
||
|
CONFIG_SYS_GPIO_CRAM_CRE
|
||
|
CONFIG_SYS_GPIO_CRAM_WAIT
|
||
|
CONFIG_SYS_GPIO_DATADIR
|
||
|
CONFIG_SYS_GPIO_DATAVALUE
|
||
|
CONFIG_SYS_GPIO_DSPIC_READY
|
||
|
CONFIG_SYS_GPIO_EEPROM_EXT_WP
|
||
|
CONFIG_SYS_GPIO_EEPROM_INT_WP
|
||
|
CONFIG_SYS_GPIO_EEPROM_WP
|
||
|
CONFIG_SYS_GPIO_EN
|
||
|
CONFIG_SYS_GPIO_ENABLE
|
||
|
CONFIG_SYS_GPIO_EREADY
|
||
|
CONFIG_SYS_GPIO_FLASH_WP
|
||
|
CONFIG_SYS_GPIO_FUNC
|
||
|
CONFIG_SYS_GPIO_HIGHSIDE
|
||
|
CONFIG_SYS_GPIO_HWREV_MASK
|
||
|
CONFIG_SYS_GPIO_HWREV_SHIFT
|
||
|
CONFIG_SYS_GPIO_I2C_SCL
|
||
|
CONFIG_SYS_GPIO_I2C_SDA
|
||
|
CONFIG_SYS_GPIO_LEDA_N
|
||
|
CONFIG_SYS_GPIO_LEDB_N
|
||
|
CONFIG_SYS_GPIO_LEDRUN_N
|
||
|
CONFIG_SYS_GPIO_LIME_RST
|
||
|
CONFIG_SYS_GPIO_LIME_S
|
||
|
CONFIG_SYS_GPIO_LSB_ENABLE
|
||
|
CONFIG_SYS_GPIO_M66EN
|
||
|
CONFIG_SYS_GPIO_MONARCH_N
|
||
|
CONFIG_SYS_GPIO_ODR
|
||
|
CONFIG_SYS_GPIO_OPENDRAIN
|
||
|
CONFIG_SYS_GPIO_OR
|
||
|
CONFIG_SYS_GPIO_OUT
|
||
|
CONFIG_SYS_GPIO_PCIE_CLKREQ
|
||
|
CONFIG_SYS_GPIO_PCIE_PRESENT0
|
||
|
CONFIG_SYS_GPIO_PCIE_PRESENT1
|
||
|
CONFIG_SYS_GPIO_PCIE_PRESENT2
|
||
|
CONFIG_SYS_GPIO_PCIE_RST
|
||
|
CONFIG_SYS_GPIO_PCIE_WAKE
|
||
|
CONFIG_SYS_GPIO_PERM_VOLT_FEED
|
||
|
CONFIG_SYS_GPIO_PHY0_RST
|
||
|
CONFIG_SYS_GPIO_PHY1_RST
|
||
|
CONFIG_SYS_GPIO_PHY_RST
|
||
|
CONFIG_SYS_GPIO_RS232_FORCEOFF
|
||
|
CONFIG_SYS_GPIO_SELFRST_N
|
||
|
CONFIG_SYS_GPIO_STARTUP_FINISHED
|
||
|
CONFIG_SYS_GPIO_STARTUP_FINISHED_N
|
||
|
CONFIG_SYS_GPIO_SYSMON_STATUS
|
||
|
CONFIG_SYS_GPIO_TCR
|
||
|
CONFIG_SYS_GPIO_WATCHDOG
|
||
|
CONFIG_SYS_GPIO_WIDTH
|
||
|
CONFIG_SYS_GPR1
|
||
|
CONFIG_SYS_GPSR0_VAL
|
||
|
CONFIG_SYS_GPSR1_VAL
|
||
|
CONFIG_SYS_GPSR2_VAL
|
||
|
CONFIG_SYS_GPSR3_VAL
|
||
|
CONFIG_SYS_GPS_PORT_CONFIG
|
||
|
CONFIG_SYS_GPS_PORT_CONFIG_1
|
||
|
CONFIG_SYS_GPS_PORT_CONFIG_2
|
||
|
CONFIG_SYS_GRLIB_APBUART_INDEX
|
||
|
CONFIG_SYS_GRLIB_ESA_MCTRL1
|
||
|
CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1
|
||
|
CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2
|
||
|
CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3
|
||
|
CONFIG_SYS_GRLIB_ESA_MCTRL2
|
||
|
CONFIG_SYS_GRLIB_ESA_MCTRL2_CFG1
|
||
|
CONFIG_SYS_GRLIB_ESA_MCTRL2_CFG2
|
||
|
CONFIG_SYS_GRLIB_ESA_MCTRL2_CFG3
|
||
|
CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
|
||
|
CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1_CFG1
|
||
|
CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1_CFG3
|
||
|
CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1_CFG4
|
||
|
CONFIG_SYS_GRLIB_GAISLER_DDR2SPA2
|
||
|
CONFIG_SYS_GRLIB_GAISLER_DDR2SPA2_CFG1
|
||
|
CONFIG_SYS_GRLIB_GAISLER_DDR2SPA2_CFG3
|
||
|
CONFIG_SYS_GRLIB_GAISLER_DDR2SPA2_CFG4
|
||
|
CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
|
||
|
CONFIG_SYS_GRLIB_GAISLER_DDRSPA1_CTRL
|
||
|
CONFIG_SYS_GRLIB_GAISLER_DDRSPA2
|
||
|
CONFIG_SYS_GRLIB_GAISLER_DDRSPA2_CTRL
|
||
|
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
|
||
|
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1
|
||
|
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2
|
||
|
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3
|
||
|
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL2
|
||
|
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL2_CFG1
|
||
|
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL2_CFG2
|
||
|
CONFIG_SYS_GRLIB_GAISLER_FTMCTRL2_CFG3
|
||
|
CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
|
||
|
CONFIG_SYS_GRLIB_GAISLER_SDCTRL1_CTRL
|
||
|
CONFIG_SYS_GRLIB_GAISLER_SDCTRL2
|
||
|
CONFIG_SYS_GRLIB_GAISLER_SDCTRL2_CTRL
|
||
|
CONFIG_SYS_GRLIB_GPTIMER_INDEX
|
||
|
CONFIG_SYS_GRLIB_GRETH_INDEX
|
||
|
CONFIG_SYS_GRLIB_GRETH_PHYADDR
|
||
|
CONFIG_SYS_GRLIB_GRUSB_INDEX
|
||
|
CONFIG_SYS_GRLIB_MEMCFG1
|
||
|
CONFIG_SYS_GRLIB_MEMCFG2
|
||
|
CONFIG_SYS_GRLIB_MEMCFG3
|
||
|
CONFIG_SYS_GRLIB_SDRAM
|
||
|
CONFIG_SYS_GRLIB_SINGLE_BUS
|
||
|
CONFIG_SYS_HALT_BEFOR_RAM_JUMP
|
||
|
CONFIG_SYS_HAS_NO_CACHE
|
||
|
CONFIG_SYS_HELP_CMD_WIDTH
|
||
|
CONFIG_SYS_HID0_FINAL
|
||
|
CONFIG_SYS_HID0_INIT
|
||
|
CONFIG_SYS_HID2
|
||
|
CONFIG_SYS_HIGH
|
||
|
CONFIG_SYS_HMI_BASE
|
||
|
CONFIG_SYS_HOSTNAME
|
||
|
CONFIG_SYS_HRCW_HIGH
|
||
|
CONFIG_SYS_HRCW_HIGH_BASE
|
||
|
CONFIG_SYS_HRCW_LOW
|
||
|
CONFIG_SYS_HRCW_MASTER
|
||
|
CONFIG_SYS_HRCW_SLAVE1
|
||
|
CONFIG_SYS_HRCW_SLAVE2
|
||
|
CONFIG_SYS_HRCW_SLAVE3
|
||
|
CONFIG_SYS_HRCW_SLAVE4
|
||
|
CONFIG_SYS_HRCW_SLAVE5
|
||
|
CONFIG_SYS_HRCW_SLAVE6
|
||
|
CONFIG_SYS_HRCW_SLAVE7
|
||
|
CONFIG_SYS_HSDRAMC
|
||
|
CONFIG_SYS_HWINFO_MAGIC
|
||
|
CONFIG_SYS_HWINFO_OFFSET
|
||
|
CONFIG_SYS_HWINFO_SIZE
|
||
|
CONFIG_SYS_HZ_CLOCK
|
||
|
CONFIG_SYS_I2C
|
||
|
CONFIG_SYS_I2C2_FSL_OFFSET
|
||
|
CONFIG_SYS_I2C2_OFFSET
|
||
|
CONFIG_SYS_I2C2_PINMUX_CLR
|
||
|
CONFIG_SYS_I2C2_PINMUX_REG
|
||
|
CONFIG_SYS_I2C2_PINMUX_SET
|
||
|
CONFIG_SYS_I2C_0
|
||
|
CONFIG_SYS_I2C_2
|
||
|
CONFIG_SYS_I2C_5
|
||
|
CONFIG_SYS_I2C_8574A_ADDR1
|
||
|
CONFIG_SYS_I2C_8574A_ADDR2
|
||
|
CONFIG_SYS_I2C_8574_ADDR1
|
||
|
CONFIG_SYS_I2C_8574_ADDR2
|
||
|
CONFIG_SYS_I2C_ADI
|
||
|
CONFIG_SYS_I2C_BASE
|
||
|
CONFIG_SYS_I2C_BASE0
|
||
|
CONFIG_SYS_I2C_BASE1
|
||
|
CONFIG_SYS_I2C_BASE2
|
||
|
CONFIG_SYS_I2C_BASE3
|
||
|
CONFIG_SYS_I2C_BASE4
|
||
|
CONFIG_SYS_I2C_BASE5
|
||
|
CONFIG_SYS_I2C_BOARD_LATE_INIT
|
||
|
CONFIG_SYS_I2C_BOOT_EEPROM_ADDR
|
||
|
CONFIG_SYS_I2C_BUSES
|
||
|
CONFIG_SYS_I2C_BUS_MAX
|
||
|
CONFIG_SYS_I2C_CLK_OFFSET
|
||
|
CONFIG_SYS_I2C_DAVINCI
|
||
|
CONFIG_SYS_I2C_DIRECT_BUS
|
||
|
CONFIG_SYS_I2C_DPMEM_OFFSET
|
||
|
CONFIG_SYS_I2C_DS1621_ADDR
|
||
|
CONFIG_SYS_I2C_DS4510_ADDR
|
||
|
CONFIG_SYS_I2C_DSPIC_2_ADDR
|
||
|
CONFIG_SYS_I2C_DSPIC_ADDR
|
||
|
CONFIG_SYS_I2C_DSPIC_IO_ADDR
|
||
|
CONFIG_SYS_I2C_DSPIC_KEYB_ADDR
|
||
|
CONFIG_SYS_I2C_DTT_ADDR
|
||
|
CONFIG_SYS_I2C_DVI_ADDR
|
||
|
CONFIG_SYS_I2C_DVI_BUS_NUM
|
||
|
CONFIG_SYS_I2C_EARLY_INIT
|
||
|
CONFIG_SYS_I2C_EEPROM
|
||
|
CONFIG_SYS_I2C_EEPROM_ADDR
|
||
|
CONFIG_SYS_I2C_EEPROM_ADDR_LEN
|
||
|
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
|
||
|
CONFIG_SYS_I2C_EEPROM_BUS
|
||
|
CONFIG_SYS_I2C_EEPROM_BUS_NUM
|
||
|
CONFIG_SYS_I2C_EEPROM_CCID
|
||
|
CONFIG_SYS_I2C_EEPROM_CPU_ADDR
|
||
|
CONFIG_SYS_I2C_EEPROM_MAC_OFFSET
|
||
|
CONFIG_SYS_I2C_EEPROM_MB_ADDR
|
||
|
CONFIG_SYS_I2C_EEPROM_NXID
|
||
|
CONFIG_SYS_I2C_EEPROM_NXID_MAC
|
||
|
CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS
|
||
|
CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_DELAY_MS
|
||
|
CONFIG_SYS_I2C_EXPANDER_ADDR
|
||
|
CONFIG_SYS_I2C_FACT_ADDR
|
||
|
CONFIG_SYS_I2C_FPGA_ADDR
|
||
|
CONFIG_SYS_I2C_FRAM
|
||
|
CONFIG_SYS_I2C_G762_ADDR
|
||
|
CONFIG_SYS_I2C_GENERIC_MAC
|
||
|
CONFIG_SYS_I2C_HWMON_ADDR
|
||
|
CONFIG_SYS_I2C_IDT6V49205B
|
||
|
CONFIG_SYS_I2C_IFDR_DIV
|
||
|
CONFIG_SYS_I2C_IHS
|
||
|
CONFIG_SYS_I2C_IHS_CH0
|
||
|
CONFIG_SYS_I2C_IHS_CH0_1
|
||
|
CONFIG_SYS_I2C_IHS_CH1
|
||
|
CONFIG_SYS_I2C_IHS_CH1_1
|
||
|
CONFIG_SYS_I2C_IHS_CH2
|
||
|
CONFIG_SYS_I2C_IHS_CH2_1
|
||
|
CONFIG_SYS_I2C_IHS_CH3
|
||
|
CONFIG_SYS_I2C_IHS_CH3_1
|
||
|
CONFIG_SYS_I2C_IHS_DUAL
|
||
|
CONFIG_SYS_I2C_IHS_SLAVE_0
|
||
|
CONFIG_SYS_I2C_IHS_SLAVE_0_1
|
||
|
CONFIG_SYS_I2C_IHS_SLAVE_1
|
||
|
CONFIG_SYS_I2C_IHS_SLAVE_1_1
|
||
|
CONFIG_SYS_I2C_IHS_SLAVE_2
|
||
|
CONFIG_SYS_I2C_IHS_SLAVE_2_1
|
||
|
CONFIG_SYS_I2C_IHS_SLAVE_3
|
||
|
CONFIG_SYS_I2C_IHS_SLAVE_3_1
|
||
|
CONFIG_SYS_I2C_IHS_SPEED_0
|
||
|
CONFIG_SYS_I2C_IHS_SPEED_0_1
|
||
|
CONFIG_SYS_I2C_IHS_SPEED_1
|
||
|
CONFIG_SYS_I2C_IHS_SPEED_1_1
|
||
|
CONFIG_SYS_I2C_IHS_SPEED_2
|
||
|
CONFIG_SYS_I2C_IHS_SPEED_2_1
|
||
|
CONFIG_SYS_I2C_IHS_SPEED_3
|
||
|
CONFIG_SYS_I2C_IHS_SPEED_3_1
|
||
|
CONFIG_SYS_I2C_INIT_BOARD
|
||
|
CONFIG_SYS_I2C_IO
|
||
|
CONFIG_SYS_I2C_KEYBD_ADDR
|
||
|
CONFIG_SYS_I2C_KONA
|
||
|
CONFIG_SYS_I2C_LDI_ADDR
|
||
|
CONFIG_SYS_I2C_LM75_ADDR
|
||
|
CONFIG_SYS_I2C_LM90_ADDR
|
||
|
CONFIG_SYS_I2C_LPC32XX
|
||
|
CONFIG_SYS_I2C_LPC32XX_SLAVE
|
||
|
CONFIG_SYS_I2C_LPC32XX_SPEED
|
||
|
CONFIG_SYS_I2C_MAC1_BUS
|
||
|
CONFIG_SYS_I2C_MAC1_CHIP_ADDR
|
||
|
CONFIG_SYS_I2C_MAC1_DATA_ADDR
|
||
|
CONFIG_SYS_I2C_MAC2_BUS
|
||
|
CONFIG_SYS_I2C_MAC2_CHIP_ADDR
|
||
|
CONFIG_SYS_I2C_MAC2_DATA_ADDR
|
||
|
CONFIG_SYS_I2C_MAC_OFFSET
|
||
|
CONFIG_SYS_I2C_MAX1237_ADDR
|
||
|
CONFIG_SYS_I2C_MAX_HOPS
|
||
|
CONFIG_SYS_I2C_MODULE
|
||
|
CONFIG_SYS_I2C_MXC_I2C1
|
||
|
CONFIG_SYS_I2C_MXC_I2C2
|
||
|
CONFIG_SYS_I2C_MXC_I2C3
|
||
|
CONFIG_SYS_I2C_MXC_I2C4
|
||
|
CONFIG_SYS_I2C_MXS
|
||
|
CONFIG_SYS_I2C_NCT72_ADDR
|
||
|
CONFIG_SYS_I2C_NOPROBES
|
||
|
CONFIG_SYS_I2C_OFFSET
|
||
|
CONFIG_SYS_I2C_OMAP24XX
|
||
|
CONFIG_SYS_I2C_OMAP34XX
|
||
|
CONFIG_SYS_I2C_PCA953X_ADDR
|
||
|
CONFIG_SYS_I2C_PCA953X_ADDR0
|
||
|
CONFIG_SYS_I2C_PCA953X_ADDR1
|
||
|
CONFIG_SYS_I2C_PCA953X_ADDR2
|
||
|
CONFIG_SYS_I2C_PCA953X_ADDR3
|
||
|
CONFIG_SYS_I2C_PCA953X_WIDTH
|
||
|
CONFIG_SYS_I2C_PCA9553_ADDR
|
||
|
CONFIG_SYS_I2C_PCA9555_ADDR
|
||
|
CONFIG_SYS_I2C_PCA9557_ADDR
|
||
|
CONFIG_SYS_I2C_PCF8574A_ADDR
|
||
|
CONFIG_SYS_I2C_PEX8518_ADDR
|
||
|
CONFIG_SYS_I2C_PINMUX_CLR
|
||
|
CONFIG_SYS_I2C_PINMUX_REG
|
||
|
CONFIG_SYS_I2C_PINMUX_SET
|
||
|
CONFIG_SYS_I2C_POWERIC_ADDR
|
||
|
CONFIG_SYS_I2C_PPC4XX
|
||
|
CONFIG_SYS_I2C_PPC4XX_CH0
|
||
|
CONFIG_SYS_I2C_PPC4XX_CH1
|
||
|
CONFIG_SYS_I2C_PPC4XX_SLAVE_0
|
||
|
CONFIG_SYS_I2C_PPC4XX_SLAVE_1
|
||
|
CONFIG_SYS_I2C_PPC4XX_SPEED_0
|
||
|
CONFIG_SYS_I2C_PPC4XX_SPEED_1
|
||
|
CONFIG_SYS_I2C_PXA
|
||
|
CONFIG_SYS_I2C_QIXIS_ADDR
|
||
|
CONFIG_SYS_I2C_RCAR
|
||
|
CONFIG_SYS_I2C_RTC_ADDR
|
||
|
CONFIG_SYS_I2C_S3C24X0
|
||
|
CONFIG_SYS_I2C_S3C24X0_SLAVE
|
||
|
CONFIG_SYS_I2C_S3C24X0_SPEED
|
||
|
CONFIG_SYS_I2C_SH
|
||
|
CONFIG_SYS_I2C_SH_BASE0
|
||
|
CONFIG_SYS_I2C_SH_BASE1
|
||
|
CONFIG_SYS_I2C_SH_BASE2
|
||
|
CONFIG_SYS_I2C_SH_BASE3
|
||
|
CONFIG_SYS_I2C_SH_BASE4
|
||
|
CONFIG_SYS_I2C_SH_NUM_CONTROLLERS
|
||
|
CONFIG_SYS_I2C_SH_SPEED0
|
||
|
CONFIG_SYS_I2C_SH_SPEED1
|
||
|
CONFIG_SYS_I2C_SH_SPEED2
|
||
|
CONFIG_SYS_I2C_SH_SPEED3
|
||
|
CONFIG_SYS_I2C_SH_SPEED4
|
||
|
CONFIG_SYS_I2C_SLAVE
|
||
|
CONFIG_SYS_I2C_SLAVE1
|
||
|
CONFIG_SYS_I2C_SLAVE2
|
||
|
CONFIG_SYS_I2C_SLAVE3
|
||
|
CONFIG_SYS_I2C_SOFT
|
||
|
CONFIG_SYS_I2C_SOFT_SLAVE
|
||
|
CONFIG_SYS_I2C_SOFT_SLAVE_10
|
||
|
CONFIG_SYS_I2C_SOFT_SLAVE_11
|
||
|
CONFIG_SYS_I2C_SOFT_SLAVE_12
|
||
|
CONFIG_SYS_I2C_SOFT_SLAVE_2
|
||
|
CONFIG_SYS_I2C_SOFT_SLAVE_3
|
||
|
CONFIG_SYS_I2C_SOFT_SLAVE_4
|
||
|
CONFIG_SYS_I2C_SOFT_SLAVE_5
|
||
|
CONFIG_SYS_I2C_SOFT_SLAVE_6
|
||
|
CONFIG_SYS_I2C_SOFT_SLAVE_7
|
||
|
CONFIG_SYS_I2C_SOFT_SLAVE_8
|
||
|
CONFIG_SYS_I2C_SOFT_SLAVE_9
|
||
|
CONFIG_SYS_I2C_SOFT_SPEED
|
||
|
CONFIG_SYS_I2C_SOFT_SPEED_10
|
||
|
CONFIG_SYS_I2C_SOFT_SPEED_11
|
||
|
CONFIG_SYS_I2C_SOFT_SPEED_12
|
||
|
CONFIG_SYS_I2C_SOFT_SPEED_2
|
||
|
CONFIG_SYS_I2C_SOFT_SPEED_3
|
||
|
CONFIG_SYS_I2C_SOFT_SPEED_4
|
||
|
CONFIG_SYS_I2C_SOFT_SPEED_5
|
||
|
CONFIG_SYS_I2C_SOFT_SPEED_6
|
||
|
CONFIG_SYS_I2C_SOFT_SPEED_7
|
||
|
CONFIG_SYS_I2C_SOFT_SPEED_8
|
||
|
CONFIG_SYS_I2C_SOFT_SPEED_9
|
||
|
CONFIG_SYS_I2C_SPEED
|
||
|
CONFIG_SYS_I2C_SPEED1
|
||
|
CONFIG_SYS_I2C_SPEED2
|
||
|
CONFIG_SYS_I2C_SPEED3
|
||
|
CONFIG_SYS_I2C_TCA642X_ADDR
|
||
|
CONFIG_SYS_I2C_TCA642X_BUS_NUM
|
||
|
CONFIG_SYS_I2C_TEGRA
|
||
|
CONFIG_SYS_I2C_UCODE_PATCH
|
||
|
CONFIG_SYS_I2C_W83782G_ADDR
|
||
|
CONFIG_SYS_I2C_ZYNQ
|
||
|
CONFIG_SYS_I2C_ZYNQ_SLAVE
|
||
|
CONFIG_SYS_I2C_ZYNQ_SPEED
|
||
|
CONFIG_SYS_I2ODMA_BASE
|
||
|
CONFIG_SYS_I2ODMA_PHYS_ADDR
|
||
|
CONFIG_SYS_I2c_INIT_MPC5XXX
|
||
|
CONFIG_SYS_IBAT
|
||
|
CONFIG_SYS_IBAT0L
|
||
|
CONFIG_SYS_IBAT0U
|
||
|
CONFIG_SYS_IBAT1L
|
||
|
CONFIG_SYS_IBAT1U
|
||
|
CONFIG_SYS_IBAT2L
|
||
|
CONFIG_SYS_IBAT2U
|
||
|
CONFIG_SYS_IBAT3L
|
||
|
CONFIG_SYS_IBAT3U
|
||
|
CONFIG_SYS_IBAT4L
|
||
|
CONFIG_SYS_IBAT4U
|
||
|
CONFIG_SYS_IBAT5L
|
||
|
CONFIG_SYS_IBAT5U
|
||
|
CONFIG_SYS_IBAT6L
|
||
|
CONFIG_SYS_IBAT6L_EARLY
|
||
|
CONFIG_SYS_IBAT6U
|
||
|
CONFIG_SYS_IBAT6U_EARLY
|
||
|
CONFIG_SYS_IBAT7L
|
||
|
CONFIG_SYS_IBAT7U
|
||
|
CONFIG_SYS_ICACHE_INV
|
||
|
CONFIG_SYS_ICACHE_LINESZ
|
||
|
CONFIG_SYS_ICACHE_SACR_VALUE
|
||
|
CONFIG_SYS_ICS8N3QV01_I2C
|
||
|
CONFIG_SYS_ICTRL
|
||
|
CONFIG_SYS_IDE_MAXBUS
|
||
|
CONFIG_SYS_IDE_MAXDEVICE
|
||
|
CONFIG_SYS_ID_EEPROM
|
||
|
CONFIG_SYS_IFC_ADDR
|
||
|
CONFIG_SYS_IFC_CCR
|
||
|
CONFIG_SYS_IMMR
|
||
|
CONFIG_SYS_INIT_DBCR
|
||
|
CONFIG_SYS_INIT_DCACHE_CS
|
||
|
CONFIG_SYS_INIT_DCACHE_PBxAR
|
||
|
CONFIG_SYS_INIT_DCACHE_PBxCR
|
||
|
CONFIG_SYS_INIT_EXTRA_SIZE
|
||
|
CONFIG_SYS_INIT_L2CSR0
|
||
|
CONFIG_SYS_INIT_L2_ADDR
|
||
|
CONFIG_SYS_INIT_L2_ADDR_PHYS
|
||
|
CONFIG_SYS_INIT_L2_END
|
||
|
CONFIG_SYS_INIT_L3_ADDR
|
||
|
CONFIG_SYS_INIT_L3_ADDR_PHYS
|
||
|
CONFIG_SYS_INIT_L3_END
|
||
|
CONFIG_SYS_INIT_L3_VADDR
|
||
|
CONFIG_SYS_INIT_RAM1_ADDR
|
||
|
CONFIG_SYS_INIT_RAM1_CTRL
|
||
|
CONFIG_SYS_INIT_RAM1_END
|
||
|
CONFIG_SYS_INIT_RAM_ADDR
|
||
|
CONFIG_SYS_INIT_RAM_ADDR_PHYS
|
||
|
CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH
|
||
|
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW
|
||
|
CONFIG_SYS_INIT_RAM_CTRL
|
||
|
CONFIG_SYS_INIT_RAM_DCACHE
|
||
|
CONFIG_SYS_INIT_RAM_LOCK
|
||
|
CONFIG_SYS_INIT_RAM_PATTERN
|
||
|
CONFIG_SYS_INIT_RAM_SIZE
|
||
|
CONFIG_SYS_INIT_SP_ADDR
|
||
|
CONFIG_SYS_INIT_SP_OFFSET
|
||
|
CONFIG_SYS_INPUT_CLKSRC
|
||
|
CONFIG_SYS_INTA_FAKE
|
||
|
CONFIG_SYS_INTEL_BOOT
|
||
|
CONFIG_SYS_INTERLAKEN
|
||
|
CONFIG_SYS_INTRAM_BASE
|
||
|
CONFIG_SYS_INTRAM_SIZE
|
||
|
CONFIG_SYS_INTR_BASE
|
||
|
CONFIG_SYS_INTSRAM
|
||
|
CONFIG_SYS_INTSRAMSZ
|
||
|
CONFIG_SYS_INT_FLASH_BASE
|
||
|
CONFIG_SYS_INT_FLASH_ENABLE
|
||
|
CONFIG_SYS_IOCTRL_MUX_DDR
|
||
|
CONFIG_SYS_IO_BASE
|
||
|
CONFIG_SYS_IPBCLK_EQUALS_XLBCLK
|
||
|
CONFIG_SYS_IPBSPEED_133
|
||
|
CONFIG_SYS_IR_REG_BASE_ADDR
|
||
|
CONFIG_SYS_ISA_BASE
|
||
|
CONFIG_SYS_ISA_IO
|
||
|
CONFIG_SYS_ISA_IO_BASE_ADDRESS
|
||
|
CONFIG_SYS_ISA_IO_OFFSET
|
||
|
CONFIG_SYS_ISA_IO_STRIDE
|
||
|
CONFIG_SYS_ISA_MEM
|
||
|
CONFIG_SYS_ISB
|
||
|
CONFIG_SYS_ISRAM_BASE
|
||
|
CONFIG_SYS_IVM_EEPROM_ADR
|
||
|
CONFIG_SYS_IVM_EEPROM_MAX_LEN
|
||
|
CONFIG_SYS_IVM_EEPROM_PAGE_LEN
|
||
|
CONFIG_SYS_JFFS2_FIRST_BANK
|
||
|
CONFIG_SYS_JFFS2_FIRST_SECTOR
|
||
|
CONFIG_SYS_JFFS2_MEM_NAND
|
||
|
CONFIG_SYS_JFFS2_NUM_BANKS
|
||
|
CONFIG_SYS_JFFS2_SORT_FRAGMENTS
|
||
|
CONFIG_SYS_KBYTES_SDRAM
|
||
|
CONFIG_SYS_KEY_REG_BASE_ADDR
|
||
|
CONFIG_SYS_KMBEC_FPGA_BASE
|
||
|
CONFIG_SYS_KMBEC_FPGA_SIZE
|
||
|
CONFIG_SYS_KWD_CONFIG
|
||
|
CONFIG_SYS_KW_SPI_MPP
|
||
|
CONFIG_SYS_L2
|
||
|
CONFIG_SYS_L2_PL310
|
||
|
CONFIG_SYS_L2_SIZE
|
||
|
CONFIG_SYS_L3_SIZE
|
||
|
CONFIG_SYS_LARGE_FLASH
|
||
|
CONFIG_SYS_LATCH0_BOOT
|
||
|
CONFIG_SYS_LATCH0_RESET
|
||
|
CONFIG_SYS_LATCH1_BOOT
|
||
|
CONFIG_SYS_LATCH1_RESET
|
||
|
CONFIG_SYS_LATCH_ADDR
|
||
|
CONFIG_SYS_LATCH_BASE
|
||
|
CONFIG_SYS_LBAPP1_BASE
|
||
|
CONFIG_SYS_LBAPP1_BASE_PHYS
|
||
|
CONFIG_SYS_LBAPP1_BR_PRELIM
|
||
|
CONFIG_SYS_LBAPP1_OR_PRELIM
|
||
|
CONFIG_SYS_LBAPP2_BASE
|
||
|
CONFIG_SYS_LBAPP2_BASE_PHYS
|
||
|
CONFIG_SYS_LBAPP2_BR_PRELIM
|
||
|
CONFIG_SYS_LBAPP2_OR_PRELIM
|
||
|
CONFIG_SYS_LBC0_BASE
|
||
|
CONFIG_SYS_LBC0_BASE_PHYS
|
||
|
CONFIG_SYS_LBC1_BASE
|
||
|
CONFIG_SYS_LBC1_BASE_PHYS
|
||
|
CONFIG_SYS_LBCR_ADDR
|
||
|
CONFIG_SYS_LBC_ADDR
|
||
|
CONFIG_SYS_LBC_BASE
|
||
|
CONFIG_SYS_LBC_BASE_PHYS_LOW
|
||
|
CONFIG_SYS_LBC_CACHE_BASE
|
||
|
CONFIG_SYS_LBC_FLASH_BASE
|
||
|
CONFIG_SYS_LBC_LBCR
|
||
|
CONFIG_SYS_LBC_LCRR
|
||
|
CONFIG_SYS_LBC_LSDMR_1
|
||
|
CONFIG_SYS_LBC_LSDMR_2
|
||
|
CONFIG_SYS_LBC_LSDMR_3
|
||
|
CONFIG_SYS_LBC_LSDMR_4
|
||
|
CONFIG_SYS_LBC_LSDMR_5
|
||
|
CONFIG_SYS_LBC_LSDMR_ARFRSH
|
||
|
CONFIG_SYS_LBC_LSDMR_COMMON
|
||
|
CONFIG_SYS_LBC_LSDMR_MRW
|
||
|
CONFIG_SYS_LBC_LSDMR_PCHALL
|
||
|
CONFIG_SYS_LBC_LSDMR_RFEN
|
||
|
CONFIG_SYS_LBC_LSRT
|
||
|
CONFIG_SYS_LBC_MRTPR
|
||
|
CONFIG_SYS_LBC_NONCACHE_BASE
|
||
|
CONFIG_SYS_LBC_SDRAM_BASE
|
||
|
CONFIG_SYS_LBC_SDRAM_BASE_PHYS
|
||
|
CONFIG_SYS_LBC_SDRAM_SIZE
|
||
|
CONFIG_SYS_LBLAWAR0_PRELIM
|
||
|
CONFIG_SYS_LBLAWAR1_PRELIM
|
||
|
CONFIG_SYS_LBLAWAR2_PRELIM
|
||
|
CONFIG_SYS_LBLAWAR3_PRELIM
|
||
|
CONFIG_SYS_LBLAWAR4_PRELIM
|
||
|
CONFIG_SYS_LBLAWAR5_PRELIM
|
||
|
CONFIG_SYS_LBLAWAR6_PRELIM
|
||
|
CONFIG_SYS_LBLAWAR7_PRELIM
|
||
|
CONFIG_SYS_LBLAWBAR0_PRELIM
|
||
|
CONFIG_SYS_LBLAWBAR1_PRELIM
|
||
|
CONFIG_SYS_LBLAWBAR2_PRELIM
|
||
|
CONFIG_SYS_LBLAWBAR3_PRELIM
|
||
|
CONFIG_SYS_LBLAWBAR4_PRELIM
|
||
|
CONFIG_SYS_LBLAWBAR5_PRELIM
|
||
|
CONFIG_SYS_LBLAWBAR6_PRELIM
|
||
|
CONFIG_SYS_LBLAWBAR7_PRELIM
|
||
|
CONFIG_SYS_LB_SDRAM
|
||
|
CONFIG_SYS_LCD0_RST
|
||
|
CONFIG_SYS_LCD1_RST
|
||
|
CONFIG_SYS_LCD_BASE
|
||
|
CONFIG_SYS_LCD_ENDIAN
|
||
|
CONFIG_SYS_LCRR_CLKDIV
|
||
|
CONFIG_SYS_LCRR_DBYP
|
||
|
CONFIG_SYS_LCRR_EADC
|
||
|
CONFIG_SYS_LDB_CLOCK
|
||
|
CONFIG_SYS_LDSCRIPT
|
||
|
CONFIG_SYS_LED_ADDR
|
||
|
CONFIG_SYS_LED_BASE
|
||
|
CONFIG_SYS_LED_DISP_BASE
|
||
|
CONFIG_SYS_LIME_BASE
|
||
|
CONFIG_SYS_LIME_BASE_0
|
||
|
CONFIG_SYS_LIME_BASE_1
|
||
|
CONFIG_SYS_LIME_BASE_2
|
||
|
CONFIG_SYS_LIME_BASE_3
|
||
|
CONFIG_SYS_LIME_CLOCK_100MHZ
|
||
|
CONFIG_SYS_LIME_CLOCK_133MHZ
|
||
|
CONFIG_SYS_LIME_MMR
|
||
|
CONFIG_SYS_LIME_SDRAM_CLOCK
|
||
|
CONFIG_SYS_LIME_SIZE
|
||
|
CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE
|
||
|
CONFIG_SYS_LOADS_BAUD_CHANGE
|
||
|
CONFIG_SYS_LOAD_ADDR
|
||
|
CONFIG_SYS_LOAD_ADDR2
|
||
|
CONFIG_SYS_LOCAL_CONF_REGS
|
||
|
CONFIG_SYS_LONGHELP
|
||
|
CONFIG_SYS_LOW
|
||
|
CONFIG_SYS_LOWBOOT
|
||
|
CONFIG_SYS_LOWBOOT16
|
||
|
CONFIG_SYS_LOWBOOT32
|
||
|
CONFIG_SYS_LOWMEM_BASE
|
||
|
CONFIG_SYS_LOW_RES_TIMER
|
||
|
CONFIG_SYS_LPAE_SDRAM_BASE
|
||
|
CONFIG_SYS_LPC32XX_UART
|
||
|
CONFIG_SYS_LS1_DDR_BLOCK1_SIZE
|
||
|
CONFIG_SYS_LS2_DDR_BLOCK1_SIZE
|
||
|
CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH
|
||
|
CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS
|
||
|
CONFIG_SYS_LS_MC_DPC_ADDR
|
||
|
CONFIG_SYS_LS_MC_DPC_IN_DDR
|
||
|
CONFIG_SYS_LS_MC_DPC_IN_NOR
|
||
|
CONFIG_SYS_LS_MC_DPC_MAX_LENGTH
|
||
|
CONFIG_SYS_LS_MC_DPL_ADDR
|
||
|
CONFIG_SYS_LS_MC_DPL_IN_DDR
|
||
|
CONFIG_SYS_LS_MC_DPL_IN_NOR
|
||
|
CONFIG_SYS_LS_MC_DPL_MAX_LENGTH
|
||
|
CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
|
||
|
CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE
|
||
|
CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
|
||
|
CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
|
||
|
CONFIG_SYS_LS_MC_FW_IN_DDR
|
||
|
CONFIG_SYS_LS_PPA_FW_ADDR
|
||
|
CONFIG_SYS_LS_PPA_FW_IN_XIP
|
||
|
CONFIG_SYS_LS_PPA_FW_IN_xxx
|
||
|
CONFIG_SYS_M41T11_BASE_YEAR
|
||
|
CONFIG_SYS_M41T11_EXT_CENTURY_DATA
|
||
|
CONFIG_SYS_MACB0_BASE
|
||
|
CONFIG_SYS_MACB1_BASE
|
||
|
CONFIG_SYS_MACB2_BASE
|
||
|
CONFIG_SYS_MACB3_BASE
|
||
|
CONFIG_SYS_MAIN_PWR_ON
|
||
|
CONFIG_SYS_MALLOC_BASE
|
||
|
CONFIG_SYS_MALLOC_CLEAR_ON_INIT
|
||
|
CONFIG_SYS_MALLOC_END
|
||
|
CONFIG_SYS_MALLOC_LEN
|
||
|
CONFIG_SYS_MALLOC_SIMPLE
|
||
|
CONFIG_SYS_MAMR
|
||
|
CONFIG_SYS_MAMR_10COL
|
||
|
CONFIG_SYS_MAMR_8COL
|
||
|
CONFIG_SYS_MAMR_9COL
|
||
|
CONFIG_SYS_MAMR_PTA
|
||
|
CONFIG_SYS_MAPLE
|
||
|
CONFIG_SYS_MAPLE_MEM_PHYS
|
||
|
CONFIG_SYS_MAPPED_RAM_BASE
|
||
|
CONFIG_SYS_MARUBUN_IO
|
||
|
CONFIG_SYS_MARUBUN_MRSHPC
|
||
|
CONFIG_SYS_MARUBUN_MW1
|
||
|
CONFIG_SYS_MARUBUN_MW2
|
||
|
CONFIG_SYS_MASK
|
||
|
CONFIG_SYS_MASTER_CLOCK
|
||
|
CONFIG_SYS_MATRIX_EBI0CSA_VAL
|
||
|
CONFIG_SYS_MATRIX_EBICSA_VAL
|
||
|
CONFIG_SYS_MATRIX_MCFG_REMAP
|
||
|
CONFIG_SYS_MAXARGS
|
||
|
CONFIG_SYS_MAXIDLE
|
||
|
CONFIG_SYS_MAX_DATAFLASH_BANKS
|
||
|
CONFIG_SYS_MAX_DDR_BAT_SIZE
|
||
|
CONFIG_SYS_MAX_DOC_DEVICE
|
||
|
CONFIG_SYS_MAX_FLASH_BANKS
|
||
|
CONFIG_SYS_MAX_FLASH_BANKS_DETECT
|
||
|
CONFIG_SYS_MAX_FLASH_SECT
|
||
|
CONFIG_SYS_MAX_I2C_BUS
|
||
|
CONFIG_SYS_MAX_MTD_BANKS
|
||
|
CONFIG_SYS_MAX_NAND_CHIPS
|
||
|
CONFIG_SYS_MAX_NAND_DEVICE
|
||
|
CONFIG_SYS_MAX_PCI_EPS
|
||
|
CONFIG_SYS_MAX_RAM_SIZE
|
||
|
CONFIG_SYS_MB862xx_CCF
|
||
|
CONFIG_SYS_MB862xx_MMR
|
||
|
CONFIG_SYS_MBAR
|
||
|
CONFIG_SYS_MBAR2
|
||
|
CONFIG_SYS_MBYTES_RAM
|
||
|
CONFIG_SYS_MBYTES_SDRAM
|
||
|
CONFIG_SYS_MCATT0_VAL
|
||
|
CONFIG_SYS_MCATT1_VAL
|
||
|
CONFIG_SYS_MCFRRTC_BASE
|
||
|
CONFIG_SYS_MCFRTC_BASE
|
||
|
CONFIG_SYS_MCF_SYNCR
|
||
|
CONFIG_SYS_MCIO0_VAL
|
||
|
CONFIG_SYS_MCIO1_VAL
|
||
|
CONFIG_SYS_MCKR
|
||
|
CONFIG_SYS_MCKR1_VAL
|
||
|
CONFIG_SYS_MCKR2_VAL
|
||
|
CONFIG_SYS_MCKR_CSS
|
||
|
CONFIG_SYS_MCKR_VAL
|
||
|
CONFIG_SYS_MCLINK_MAX
|
||
|
CONFIG_SYS_MCMEM0_VAL
|
||
|
CONFIG_SYS_MCMEM1_VAL
|
||
|
CONFIG_SYS_MC_RSV_MEM_ALIGN
|
||
|
CONFIG_SYS_MDC1_PIN
|
||
|
CONFIG_SYS_MDCNFG_VAL
|
||
|
CONFIG_SYS_MDC_PIN
|
||
|
CONFIG_SYS_MDDRCGRP_HIPRIO_CFG
|
||
|
CONFIG_SYS_MDDRCGRP_LUT0_AL
|
||
|
CONFIG_SYS_MDDRCGRP_LUT0_AU
|
||
|
CONFIG_SYS_MDDRCGRP_LUT0_ML
|
||
|
CONFIG_SYS_MDDRCGRP_LUT0_MU
|
||
|
CONFIG_SYS_MDDRCGRP_LUT1_AL
|
||
|
CONFIG_SYS_MDDRCGRP_LUT1_AU
|
||
|
CONFIG_SYS_MDDRCGRP_LUT1_ML
|
||
|
CONFIG_SYS_MDDRCGRP_LUT1_MU
|
||
|
CONFIG_SYS_MDDRCGRP_LUT2_AL
|
||
|
CONFIG_SYS_MDDRCGRP_LUT2_AU
|
||
|
CONFIG_SYS_MDDRCGRP_LUT2_ML
|
||
|
CONFIG_SYS_MDDRCGRP_LUT2_MU
|
||
|
CONFIG_SYS_MDDRCGRP_LUT3_AL
|
||
|
CONFIG_SYS_MDDRCGRP_LUT3_AU
|
||
|
CONFIG_SYS_MDDRCGRP_LUT3_ML
|
||
|
CONFIG_SYS_MDDRCGRP_LUT3_MU
|
||
|
CONFIG_SYS_MDDRCGRP_LUT4_AL
|
||
|
CONFIG_SYS_MDDRCGRP_LUT4_AU
|
||
|
CONFIG_SYS_MDDRCGRP_LUT4_ML
|
||
|
CONFIG_SYS_MDDRCGRP_LUT4_MU
|
||
|
CONFIG_SYS_MDDRCGRP_PM_CFG1
|
||
|
CONFIG_SYS_MDDRCGRP_PM_CFG2
|
||
|
CONFIG_SYS_MDDRC_SYS_CFG
|
||
|
CONFIG_SYS_MDDRC_SYS_CFG_ALT1
|
||
|
CONFIG_SYS_MDDRC_SYS_CFG_ELPIDA
|
||
|
CONFIG_SYS_MDDRC_SYS_CFG_EN
|
||
|
CONFIG_SYS_MDDRC_TIME_CFG0
|
||
|
CONFIG_SYS_MDDRC_TIME_CFG0_ALT1
|
||
|
CONFIG_SYS_MDDRC_TIME_CFG1
|
||
|
CONFIG_SYS_MDDRC_TIME_CFG1_ALT1
|
||
|
CONFIG_SYS_MDDRC_TIME_CFG1_ELPIDA
|
||
|
CONFIG_SYS_MDDRC_TIME_CFG2
|
||
|
CONFIG_SYS_MDDRC_TIME_CFG2_ALT1
|
||
|
CONFIG_SYS_MDDRC_TIME_CFG2_ELPIDA
|
||
|
CONFIG_SYS_MDIO1_OFFSET
|
||
|
CONFIG_SYS_MDIO1_PIN
|
||
|
CONFIG_SYS_MDIO_BASE_ADDR
|
||
|
CONFIG_SYS_MDIO_PIN
|
||
|
CONFIG_SYS_MDMRS_VAL
|
||
|
CONFIG_SYS_MDREFR_VAL
|
||
|
CONFIG_SYS_MEASURE_CPUCLK
|
||
|
CONFIG_SYS_MECR_VAL
|
||
|
CONFIG_SYS_MEMAC_LITTLE_ENDIAN
|
||
|
CONFIG_SYS_MEMORY_BASE
|
||
|
CONFIG_SYS_MEMORY_SIZE
|
||
|
CONFIG_SYS_MEMORY_TOP
|
||
|
CONFIG_SYS_MEMTEST_END
|
||
|
CONFIG_SYS_MEMTEST_SCRATCH
|
||
|
CONFIG_SYS_MEMTEST_START
|
||
|
CONFIG_SYS_MEM_MAP
|
||
|
CONFIG_SYS_MEM_RESERVE_SECURE
|
||
|
CONFIG_SYS_MEM_SIZE
|
||
|
CONFIG_SYS_MEM_TOP_HIDE
|
||
|
CONFIG_SYS_MFD
|
||
|
CONFIG_SYS_MHZ
|
||
|
CONFIG_SYS_MICRON_BMODE
|
||
|
CONFIG_SYS_MICRON_BMODE_PARAM
|
||
|
CONFIG_SYS_MICRON_BMODE_RSTDLL
|
||
|
CONFIG_SYS_MICRON_EMODE
|
||
|
CONFIG_SYS_MICRON_EMODE2
|
||
|
CONFIG_SYS_MICRON_EMODE3
|
||
|
CONFIG_SYS_MICRON_EMODE_PARAM
|
||
|
CONFIG_SYS_MICRON_EMR
|
||
|
CONFIG_SYS_MICRON_EMR2
|
||
|
CONFIG_SYS_MICRON_EMR3
|
||
|
CONFIG_SYS_MICRON_EMR_OCD
|
||
|
CONFIG_SYS_MICRON_INIT_DEV_OP
|
||
|
CONFIG_SYS_MII_MODE
|
||
|
CONFIG_SYS_MIPS_CACHE_MODE
|
||
|
CONFIG_SYS_MIPS_TIMER_FREQ
|
||
|
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
|
||
|
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR
|
||
|
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
|
||
|
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
|
||
|
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
|
||
|
CONFIG_SYS_MMC_BASE
|
||
|
CONFIG_SYS_MMC_CD_PIN
|
||
|
CONFIG_SYS_MMC_CLK_OD
|
||
|
CONFIG_SYS_MMC_ENV_DEV
|
||
|
CONFIG_SYS_MMC_ENV_PART
|
||
|
CONFIG_SYS_MMC_IMG_LOAD_PART
|
||
|
CONFIG_SYS_MMC_MAX_BLK_COUNT
|
||
|
CONFIG_SYS_MMC_MAX_DEVICE
|
||
|
CONFIG_SYS_MMC_U_BOOT_DST
|
||
|
CONFIG_SYS_MMC_U_BOOT_OFFS
|
||
|
CONFIG_SYS_MMC_U_BOOT_SIZE
|
||
|
CONFIG_SYS_MMC_U_BOOT_START
|
||
|
CONFIG_SYS_MM_TOP_HIDE
|
||
|
CONFIG_SYS_MONITOR_
|
||
|
CONFIG_SYS_MONITOR_BASE
|
||
|
CONFIG_SYS_MONITOR_BASE_EARLY
|
||
|
CONFIG_SYS_MONITOR_LEN
|
||
|
CONFIG_SYS_MONITOR_SEC
|
||
|
CONFIG_SYS_MOR_VAL
|
||
|
CONFIG_SYS_MPC512X_CLKIN
|
||
|
CONFIG_SYS_MPC512x_USB1_ADDR
|
||
|
CONFIG_SYS_MPC512x_USB1_OFFSET
|
||
|
CONFIG_SYS_MPC5XXX_CLKIN
|
||
|
CONFIG_SYS_MPC83xx_DMA_ADDR
|
||
|
CONFIG_SYS_MPC83xx_DMA_OFFSET
|
||
|
CONFIG_SYS_MPC83xx_ESDHC_ADDR
|
||
|
CONFIG_SYS_MPC83xx_ESDHC_OFFSET
|
||
|
CONFIG_SYS_MPC83xx_USB1_ADDR
|
||
|
CONFIG_SYS_MPC83xx_USB1_OFFSET
|
||
|
CONFIG_SYS_MPC83xx_USB2_ADDR
|
||
|
CONFIG_SYS_MPC83xx_USB2_OFFSET
|
||
|
CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||
|
CONFIG_SYS_MPC85xx_CPM_ADDR
|
||
|
CONFIG_SYS_MPC85xx_CPM_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_DMA
|
||
|
CONFIG_SYS_MPC85xx_DMA1_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_DMA2_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_DMA3_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_DMA_ADDR
|
||
|
CONFIG_SYS_MPC85xx_DMA_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_ECM_ADDR
|
||
|
CONFIG_SYS_MPC85xx_ECM_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_ESDHC_ADDR
|
||
|
CONFIG_SYS_MPC85xx_ESDHC_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_ESPI_ADDR
|
||
|
CONFIG_SYS_MPC85xx_ESPI_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_GPIO3_ADDR
|
||
|
CONFIG_SYS_MPC85xx_GPIO_ADDR
|
||
|
CONFIG_SYS_MPC85xx_GPIO_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_GUTS_ADDR
|
||
|
CONFIG_SYS_MPC85xx_GUTS_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_IFC_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_L2_ADDR
|
||
|
CONFIG_SYS_MPC85xx_L2_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_LBC_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_PCI1_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_PCI2_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_PCIE
|
||
|
CONFIG_SYS_MPC85xx_PCIE1_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_PCIE2_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_PCIE3_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_PCIE4_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_PCIX2_ADDR
|
||
|
CONFIG_SYS_MPC85xx_PCIX2_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_PCIX_ADDR
|
||
|
CONFIG_SYS_MPC85xx_PCIX_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_PIC_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_QE_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_SATA
|
||
|
CONFIG_SYS_MPC85xx_SATA1_ADDR
|
||
|
CONFIG_SYS_MPC85xx_SATA1_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_SATA2_ADDR
|
||
|
CONFIG_SYS_MPC85xx_SATA2_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_SCFG
|
||
|
CONFIG_SYS_MPC85xx_SCFG_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_SERDES1_ADDR
|
||
|
CONFIG_SYS_MPC85xx_SERDES1_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_SERDES2_ADDR
|
||
|
CONFIG_SYS_MPC85xx_SERDES2_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_TDM_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_USB
|
||
|
CONFIG_SYS_MPC85xx_USB1_ADDR
|
||
|
CONFIG_SYS_MPC85xx_USB1_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_USB1_PHY_ADDR
|
||
|
CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_USB2_ADDR
|
||
|
CONFIG_SYS_MPC85xx_USB2_OFFSET
|
||
|
CONFIG_SYS_MPC85xx_USB2_PHY_ADDR
|
||
|
CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET
|
||
|
CONFIG_SYS_MPC86xx_DMA_ADDR
|
||
|
CONFIG_SYS_MPC86xx_DMA_OFFSET
|
||
|
CONFIG_SYS_MPC86xx_PCI1_OFFSET
|
||
|
CONFIG_SYS_MPC86xx_PCI2_OFFSET
|
||
|
CONFIG_SYS_MPC86xx_PCIE1_OFFSET
|
||
|
CONFIG_SYS_MPC86xx_PCIE2_OFFSET
|
||
|
CONFIG_SYS_MPC86xx_PIC_OFFSET
|
||
|
CONFIG_SYS_MPC8xxx_DDR2_OFFSET
|
||
|
CONFIG_SYS_MPC8xxx_DDR3_OFFSET
|
||
|
CONFIG_SYS_MPC8xxx_DDR_OFFSET
|
||
|
CONFIG_SYS_MPC8xxx_GUTS_ADDR
|
||
|
CONFIG_SYS_MPC8xxx_PIC_ADDR
|
||
|
CONFIG_SYS_MPC92469AC
|
||
|
CONFIG_SYS_MPEG_BASE
|
||
|
CONFIG_SYS_MPEG_SIZE
|
||
|
CONFIG_SYS_MPTPR
|
||
|
CONFIG_SYS_MPTPR_1BK_2K
|
||
|
CONFIG_SYS_MPTPR_1BK_4K
|
||
|
CONFIG_SYS_MPTPR_1BK_8K
|
||
|
CONFIG_SYS_MPTPR_2BK_2K
|
||
|
CONFIG_SYS_MPTPR_2BK_4K
|
||
|
CONFIG_SYS_MPTPR_2BK_8K
|
||
|
CONFIG_SYS_MPUCLK
|
||
|
CONFIG_SYS_MRAM_BASE
|
||
|
CONFIG_SYS_MRAM_SIZE
|
||
|
CONFIG_SYS_MRS_OFFS
|
||
|
CONFIG_SYS_MSC0_VAL
|
||
|
CONFIG_SYS_MSC1_VAL
|
||
|
CONFIG_SYS_MSC2_VAL
|
||
|
CONFIG_SYS_MTDPARTS_RUNTIME
|
||
|
CONFIG_SYS_MVFS
|
||
|
CONFIG_SYS_MX5_CLK32
|
||
|
CONFIG_SYS_MX5_HCLK
|
||
|
CONFIG_SYS_MX6_CLK32
|
||
|
CONFIG_SYS_MX6_HCLK
|
||
|
CONFIG_SYS_MX7_CLK32
|
||
|
CONFIG_SYS_MX7_HCLK
|
||
|
CONFIG_SYS_MXC_I2C1_SLAVE
|
||
|
CONFIG_SYS_MXC_I2C1_SPEED
|
||
|
CONFIG_SYS_MXC_I2C2_SLAVE
|
||
|
CONFIG_SYS_MXC_I2C2_SPEED
|
||
|
CONFIG_SYS_MXC_I2C3_SLAVE
|
||
|
CONFIG_SYS_MXC_I2C3_SPEED
|
||
|
CONFIG_SYS_MXC_I2C4_SLAVE
|
||
|
CONFIG_SYS_MXC_I2C4_SPEED
|
||
|
CONFIG_SYS_MXS_VDD5V_ONLY
|
||
|
CONFIG_SYS_NAND2_ADDR
|
||
|
CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
|
||
|
CONFIG_SYS_NAND_4_ADDR_CYCLE
|
||
|
CONFIG_SYS_NAND_5_ADDR_CYCLE
|
||
|
CONFIG_SYS_NAND_ACTL_ALE
|
||
|
CONFIG_SYS_NAND_ACTL_CLE
|
||
|
CONFIG_SYS_NAND_ACTL_DELAY
|
||
|
CONFIG_SYS_NAND_ACTL_NCE
|
||
|
CONFIG_SYS_NAND_ADDR
|
||
|
CONFIG_SYS_NAND_ALE
|
||
|
CONFIG_SYS_NAND_AMASK
|
||
|
CONFIG_SYS_NAND_BAD_BLOCK_POS
|
||
|
CONFIG_SYS_NAND_BASE
|
||
|
CONFIG_SYS_NAND_BASE2
|
||
|
CONFIG_SYS_NAND_BASE_LIST
|
||
|
CONFIG_SYS_NAND_BASE_PHYS
|
||
|
CONFIG_SYS_NAND_BCR
|
||
|
CONFIG_SYS_NAND_BLOCK_SIZE
|
||
|
CONFIG_SYS_NAND_BOOT
|
||
|
CONFIG_SYS_NAND_BR_PRELIM
|
||
|
CONFIG_SYS_NAND_BUSWIDTH_16
|
||
|
CONFIG_SYS_NAND_CE
|
||
|
CONFIG_SYS_NAND_CLE
|
||
|
CONFIG_SYS_NAND_CS
|
||
|
CONFIG_SYS_NAND_CSOR
|
||
|
CONFIG_SYS_NAND_CSPR
|
||
|
CONFIG_SYS_NAND_CSPR_EXT
|
||
|
CONFIG_SYS_NAND_DATA_BASE
|
||
|
CONFIG_SYS_NAND_DBW_16
|
||
|
CONFIG_SYS_NAND_DBW_8
|
||
|
CONFIG_SYS_NAND_DDR_LAW
|
||
|
CONFIG_SYS_NAND_ECCBYTES
|
||
|
CONFIG_SYS_NAND_ECCPOS
|
||
|
CONFIG_SYS_NAND_ECCSIZE
|
||
|
CONFIG_SYS_NAND_ECCSTEPS
|
||
|
CONFIG_SYS_NAND_ECCTOTAL
|
||
|
CONFIG_SYS_NAND_ECC_BASE
|
||
|
CONFIG_SYS_NAND_ENABLE_PIN
|
||
|
CONFIG_SYS_NAND_ENABLE_PIN_SPL
|
||
|
CONFIG_SYS_NAND_FTIM0
|
||
|
CONFIG_SYS_NAND_FTIM1
|
||
|
CONFIG_SYS_NAND_FTIM2
|
||
|
CONFIG_SYS_NAND_FTIM3
|
||
|
CONFIG_SYS_NAND_HW_ECC
|
||
|
CONFIG_SYS_NAND_HW_ECC_OOBFIRST
|
||
|
CONFIG_SYS_NAND_LARGEPAGE
|
||
|
CONFIG_SYS_NAND_LBLAWAR_PRELIM
|
||
|
CONFIG_SYS_NAND_LBLAWBAR_PRELIM
|
||
|
CONFIG_SYS_NAND_MASK_ALE
|
||
|
CONFIG_SYS_NAND_MASK_CLE
|
||
|
CONFIG_SYS_NAND_MAX_CHIPS
|
||
|
CONFIG_SYS_NAND_MAX_ECCPOS
|
||
|
CONFIG_SYS_NAND_MAX_OOBFREE
|
||
|
CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES
|
||
|
CONFIG_SYS_NAND_NO_SUBPAGE
|
||
|
CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
|
||
|
CONFIG_SYS_NAND_ONFI_DETECTION
|
||
|
CONFIG_SYS_NAND_OOBSIZE
|
||
|
CONFIG_SYS_NAND_OR_PRELIM
|
||
|
CONFIG_SYS_NAND_PAGE_2K
|
||
|
CONFIG_SYS_NAND_PAGE_4K
|
||
|
CONFIG_SYS_NAND_PAGE_COUNT
|
||
|
CONFIG_SYS_NAND_PAGE_SIZE
|
||
|
CONFIG_SYS_NAND_QUIET
|
||
|
CONFIG_SYS_NAND_RDY
|
||
|
CONFIG_SYS_NAND_READY_PIN
|
||
|
CONFIG_SYS_NAND_REGS_BASE
|
||
|
CONFIG_SYS_NAND_SELECT_DEVICE
|
||
|
CONFIG_SYS_NAND_SIZE
|
||
|
CONFIG_SYS_NAND_SKIP_BAD_DOT_I
|
||
|
CONFIG_SYS_NAND_SPL_KERNEL_OFFS
|
||
|
CONFIG_SYS_NAND_SPL_SIZE
|
||
|
CONFIG_SYS_NAND_USE_FLASH_BBT
|
||
|
CONFIG_SYS_NAND_U_BOOT_DST
|
||
|
CONFIG_SYS_NAND_U_BOOT_RELOC
|
||
|
CONFIG_SYS_NAND_U_BOOT_RELOC_SP
|
||
|
CONFIG_SYS_NAND_U_BOOT_SIZE
|
||
|
CONFIG_SYS_NAND_U_BOOT_START
|
||
|
CONFIG_SYS_NAND_WINDOW_SIZE
|
||
|
CONFIG_SYS_NDFC_EBC0_CFG
|
||
|
CONFIG_SYS_NETA_INTERFACE_TYPE
|
||
|
CONFIG_SYS_NONCACHED_MEMORY
|
||
|
CONFIG_SYS_NOR0_CSPR
|
||
|
CONFIG_SYS_NOR0_CSPR_EARLY
|
||
|
CONFIG_SYS_NOR0_CSPR_EXT
|
||
|
CONFIG_SYS_NOR1SZ
|
||
|
CONFIG_SYS_NOR1_CSPR
|
||
|
CONFIG_SYS_NOR1_CSPR_EARLY
|
||
|
CONFIG_SYS_NOR1_CSPR_EXT
|
||
|
CONFIG_SYS_NOR_AMASK
|
||
|
CONFIG_SYS_NOR_AMASK_EARLY
|
||
|
CONFIG_SYS_NOR_BR_PRELIM
|
||
|
CONFIG_SYS_NOR_CS
|
||
|
CONFIG_SYS_NOR_CSOR
|
||
|
CONFIG_SYS_NOR_CSPR
|
||
|
CONFIG_SYS_NOR_CSPR_EXT
|
||
|
CONFIG_SYS_NOR_FTIM0
|
||
|
CONFIG_SYS_NOR_FTIM1
|
||
|
CONFIG_SYS_NOR_FTIM2
|
||
|
CONFIG_SYS_NOR_FTIM3
|
||
|
CONFIG_SYS_NOR_OR_PRELIM
|
||
|
CONFIG_SYS_NO_DCACHE
|
||
|
CONFIG_SYS_NR_PIOS
|
||
|
CONFIG_SYS_NR_VM_REGIONS
|
||
|
CONFIG_SYS_NS16550_CLK
|
||
|
CONFIG_SYS_NS16550_CLK_DIV
|
||
|
CONFIG_SYS_NS16550_COM1
|
||
|
CONFIG_SYS_NS16550_COM2
|
||
|
CONFIG_SYS_NS16550_COM3
|
||
|
CONFIG_SYS_NS16550_COM4
|
||
|
CONFIG_SYS_NS16550_COM5
|
||
|
CONFIG_SYS_NS16550_COM6
|
||
|
CONFIG_SYS_NS16550_IER
|
||
|
CONFIG_SYS_NS16550_MEM32
|
||
|
CONFIG_SYS_NS16550_PORT_MAPPED
|
||
|
CONFIG_SYS_NS16550_REG_SIZE
|
||
|
CONFIG_SYS_NS16550_SERIAL
|
||
|
CONFIG_SYS_NS87308_CS0_BASE
|
||
|
CONFIG_SYS_NS87308_CS0_CONF
|
||
|
CONFIG_SYS_NS87308_CS1_BASE
|
||
|
CONFIG_SYS_NS87308_CS1_CONF
|
||
|
CONFIG_SYS_NS87308_CS2_BASE
|
||
|
CONFIG_SYS_NS87308_CS2_CONF
|
||
|
CONFIG_SYS_NS87308_FDC
|
||
|
CONFIG_SYS_NS87308_FDC_BASE
|
||
|
CONFIG_SYS_NS87308_GPIO
|
||
|
CONFIG_SYS_NS87308_GPIO_BASE
|
||
|
CONFIG_SYS_NS87308_KBC1
|
||
|
CONFIG_SYS_NS87308_KBC1_BASE
|
||
|
CONFIG_SYS_NS87308_KBC2
|
||
|
CONFIG_SYS_NS87308_LPT_BASE
|
||
|
CONFIG_SYS_NS87308_MOUSE
|
||
|
CONFIG_SYS_NS87308_PARP
|
||
|
CONFIG_SYS_NS87308_PMC1
|
||
|
CONFIG_SYS_NS87308_PMC2
|
||
|
CONFIG_SYS_NS87308_PMC3
|
||
|
CONFIG_SYS_NS87308_POWRMAN
|
||
|
CONFIG_SYS_NS87308_PS2MOD
|
||
|
CONFIG_SYS_NS87308_PWMAN_BASE
|
||
|
CONFIG_SYS_NS87308_RARP
|
||
|
CONFIG_SYS_NS87308_RTC_APC
|
||
|
CONFIG_SYS_NS87308_RTC_BASE
|
||
|
CONFIG_SYS_NS87308_UART1
|
||
|
CONFIG_SYS_NS87308_UART1_BASE
|
||
|
CONFIG_SYS_NS87308_UART2
|
||
|
CONFIG_SYS_NS87308_UART2_BASE
|
||
|
CONFIG_SYS_NUM_ADDR_MAP
|
||
|
CONFIG_SYS_NUM_CPC
|
||
|
CONFIG_SYS_NUM_FM1_10GEC
|
||
|
CONFIG_SYS_NUM_FM1_DTSEC
|
||
|
CONFIG_SYS_NUM_FM2_10GEC
|
||
|
CONFIG_SYS_NUM_FM2_DTSEC
|
||
|
CONFIG_SYS_NUM_FMAN
|
||
|
CONFIG_SYS_NUM_I2C_BUSES
|
||
|
CONFIG_SYS_NUM_IRQS
|
||
|
CONFIG_SYS_NVRAM_ACCESS_ROUTINE
|
||
|
CONFIG_SYS_NVRAM_BASE
|
||
|
CONFIG_SYS_NVRAM_BASE_ADDR
|
||
|
CONFIG_SYS_NVRAM_SIZE
|
||
|
CONFIG_SYS_OBIR
|
||
|
CONFIG_SYS_OCM_BASE
|
||
|
CONFIG_SYS_OCM_DATA_ADDR
|
||
|
CONFIG_SYS_OCM_DATA_SIZE
|
||
|
CONFIG_SYS_OCM_SIZE
|
||
|
CONFIG_SYS_OCM_STATUS_ADDR
|
||
|
CONFIG_SYS_OCM_STATUS_FAIL
|
||
|
CONFIG_SYS_OCM_STATUS_MASK
|
||
|
CONFIG_SYS_OCM_STATUS_OK
|
||
|
CONFIG_SYS_OHCI_BE_CONTROLLER
|
||
|
CONFIG_SYS_OHCI_SWAP_REG_ACCESS
|
||
|
CONFIG_SYS_OHCI_USE_NPS
|
||
|
CONFIG_SYS_OMAP24_I2C_SLAVE
|
||
|
CONFIG_SYS_OMAP24_I2C_SLAVE1
|
||
|
CONFIG_SYS_OMAP24_I2C_SLAVE2
|
||
|
CONFIG_SYS_OMAP24_I2C_SLAVE3
|
||
|
CONFIG_SYS_OMAP24_I2C_SLAVE4
|
||
|
CONFIG_SYS_OMAP24_I2C_SPEED
|
||
|
CONFIG_SYS_OMAP24_I2C_SPEED1
|
||
|
CONFIG_SYS_OMAP24_I2C_SPEED2
|
||
|
CONFIG_SYS_OMAP24_I2C_SPEED3
|
||
|
CONFIG_SYS_OMAP24_I2C_SPEED4
|
||
|
CONFIG_SYS_OMAP24_I2C_SPEED_PSOC
|
||
|
CONFIG_SYS_OMAP_ABE_SYSCK
|
||
|
CONFIG_SYS_ONENAND_BASE
|
||
|
CONFIG_SYS_ONENAND_BLOCK_SIZE
|
||
|
CONFIG_SYS_ONENAND_PAGE_SIZE
|
||
|
CONFIG_SYS_OPENRISC_TMR_HZ
|
||
|
CONFIG_SYS_OPER_FLASH
|
||
|
CONFIG_SYS_OR0_64M
|
||
|
CONFIG_SYS_OR0_8M
|
||
|
CONFIG_SYS_OR0_PRELIM
|
||
|
CONFIG_SYS_OR0_REMAP
|
||
|
CONFIG_SYS_OR1
|
||
|
CONFIG_SYS_OR10_PRELIM
|
||
|
CONFIG_SYS_OR11_PRELIM
|
||
|
CONFIG_SYS_OR1_PRELIM
|
||
|
CONFIG_SYS_OR1_REMAP
|
||
|
CONFIG_SYS_OR2_PRELIM
|
||
|
CONFIG_SYS_OR3_CAN
|
||
|
CONFIG_SYS_OR3_PRELIM
|
||
|
CONFIG_SYS_OR4_PRELIM
|
||
|
CONFIG_SYS_OR5_ISP1362
|
||
|
CONFIG_SYS_OR5_PRELIM
|
||
|
CONFIG_SYS_OR5_REMAP
|
||
|
CONFIG_SYS_OR6_64M
|
||
|
CONFIG_SYS_OR6_8M
|
||
|
CONFIG_SYS_OR6_PRELIM
|
||
|
CONFIG_SYS_OR7_PRELIM
|
||
|
CONFIG_SYS_OR8_PRELIM
|
||
|
CONFIG_SYS_OR9_PRELIM
|
||
|
CONFIG_SYS_OR_TIMING_FLASH
|
||
|
CONFIG_SYS_OR_TIMING_FLASH_AT_50MHZ
|
||
|
CONFIG_SYS_OR_TIMING_MRAM
|
||
|
CONFIG_SYS_OR_TIMING_SDRAM
|
||
|
CONFIG_SYS_OSC0_HZ
|
||
|
CONFIG_SYS_OSC1_HZ
|
||
|
CONFIG_SYS_OSCIN_FREQ
|
||
|
CONFIG_SYS_OSC_CLK
|
||
|
CONFIG_SYS_OSD_DH
|
||
|
CONFIG_SYS_OSD_SCREENS
|
||
|
CONFIG_SYS_OSPR_OFFSET
|
||
|
CONFIG_SYS_PACNT
|
||
|
CONFIG_SYS_PADAT
|
||
|
CONFIG_SYS_PADDR
|
||
|
CONFIG_SYS_PAGE_SIZE
|
||
|
CONFIG_SYS_PAMU_ADDR
|
||
|
CONFIG_SYS_PASPAR
|
||
|
CONFIG_SYS_PAXE_BASE
|
||
|
CONFIG_SYS_PAXE_SIZE
|
||
|
CONFIG_SYS_PBCNT
|
||
|
CONFIG_SYS_PBDAT
|
||
|
CONFIG_SYS_PBDDR
|
||
|
CONFIG_SYS_PBI_FLASH_BASE
|
||
|
CONFIG_SYS_PBI_FLASH_WINDOW
|
||
|
CONFIG_SYS_PBSIZE
|
||
|
CONFIG_SYS_PB_LED
|
||
|
CONFIG_SYS_PCA953X_BRD_CFG0
|
||
|
CONFIG_SYS_PCA953X_BRD_CFG1
|
||
|
CONFIG_SYS_PCA953X_BRD_CFG2
|
||
|
CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS
|
||
|
CONFIG_SYS_PCA953X_C0_SER0_EN
|
||
|
CONFIG_SYS_PCA953X_C0_SER0_MODE
|
||
|
CONFIG_SYS_PCA953X_C0_SER1_EN
|
||
|
CONFIG_SYS_PCA953X_C0_SER1_MODE
|
||
|
CONFIG_SYS_PCA953X_C0_VCORE_VID2
|
||
|
CONFIG_SYS_PCA953X_C0_VCORE_VID3
|
||
|
CONFIG_SYS_PCA953X_EREADY
|
||
|
CONFIG_SYS_PCA953X_FLASH_PASS_CS
|
||
|
CONFIG_SYS_PCA953X_GPIO_VPX0
|
||
|
CONFIG_SYS_PCA953X_GPIO_VPX1
|
||
|
CONFIG_SYS_PCA953X_GPIO_VPX2
|
||
|
CONFIG_SYS_PCA953X_GPIO_VPX3
|
||
|
CONFIG_SYS_PCA953X_MC_GPIO0
|
||
|
CONFIG_SYS_PCA953X_MC_GPIO1
|
||
|
CONFIG_SYS_PCA953X_MC_GPIO2
|
||
|
CONFIG_SYS_PCA953X_MC_GPIO3
|
||
|
CONFIG_SYS_PCA953X_MC_GPIO4
|
||
|
CONFIG_SYS_PCA953X_MC_GPIO5
|
||
|
CONFIG_SYS_PCA953X_MC_GPIO6
|
||
|
CONFIG_SYS_PCA953X_MC_GPIO7
|
||
|
CONFIG_SYS_PCA953X_MONARCH
|
||
|
CONFIG_SYS_PCA953X_NVM_WP
|
||
|
CONFIG_SYS_PCA953X_P0_GA0
|
||
|
CONFIG_SYS_PCA953X_P0_GA1
|
||
|
CONFIG_SYS_PCA953X_P0_GA2
|
||
|
CONFIG_SYS_PCA953X_P0_GA3
|
||
|
CONFIG_SYS_PCA953X_P0_GA4
|
||
|
CONFIG_SYS_PCA953X_P0_GAP
|
||
|
CONFIG_SYS_PCA953X_P14_IO0
|
||
|
CONFIG_SYS_PCA953X_P14_IO1
|
||
|
CONFIG_SYS_PCA953X_P14_IO2
|
||
|
CONFIG_SYS_PCA953X_P14_IO3
|
||
|
CONFIG_SYS_PCA953X_P14_IO4
|
||
|
CONFIG_SYS_PCA953X_P14_IO5
|
||
|
CONFIG_SYS_PCA953X_P14_IO6
|
||
|
CONFIG_SYS_PCA953X_P14_IO7
|
||
|
CONFIG_SYS_PCA953X_P1_SYSEN
|
||
|
CONFIG_SYS_PCA953X_PLUG_GPIO0
|
||
|
CONFIG_SYS_PCA953X_PMC0_EREADY
|
||
|
CONFIG_SYS_PCA953X_PMC0_MONARCH
|
||
|
CONFIG_SYS_PCA953X_PMC_EREADY
|
||
|
CONFIG_SYS_PCA953X_PMC_MONARCH
|
||
|
CONFIG_SYS_PCA953X_PMC_PRESENT
|
||
|
CONFIG_SYS_PCA953X_VPX_FRU_WRCTL
|
||
|
CONFIG_SYS_PCA953X_VPX_GPIO0
|
||
|
CONFIG_SYS_PCA953X_VPX_GPIO1
|
||
|
CONFIG_SYS_PCA953X_VPX_GPIO2
|
||
|
CONFIG_SYS_PCA953X_VPX_GPIO3
|
||
|
CONFIG_SYS_PCA953X_XMC0_BIST
|
||
|
CONFIG_SYS_PCA953X_XMC0_MVMR0
|
||
|
CONFIG_SYS_PCA953X_XMC0_ROOT0
|
||
|
CONFIG_SYS_PCA953X_XMC0_WAKE
|
||
|
CONFIG_SYS_PCA953X_XMC_BIST
|
||
|
CONFIG_SYS_PCA953X_XMC_GA0
|
||
|
CONFIG_SYS_PCA953X_XMC_GA1
|
||
|
CONFIG_SYS_PCA953X_XMC_GA2
|
||
|
CONFIG_SYS_PCA953X_XMC_PRESENT
|
||
|
CONFIG_SYS_PCA953X_XMC_ROOT0
|
||
|
CONFIG_SYS_PCA953X_XMC_WAKE
|
||
|
CONFIG_SYS_PCCNT
|
||
|
CONFIG_SYS_PCDAT
|
||
|
CONFIG_SYS_PCDDR
|
||
|
CONFIG_SYS_PCI
|
||
|
CONFIG_SYS_PCI0_IO_SPACE
|
||
|
CONFIG_SYS_PCI1_ADDR
|
||
|
CONFIG_SYS_PCI1_IO_BASE
|
||
|
CONFIG_SYS_PCI1_IO_BUS
|
||
|
CONFIG_SYS_PCI1_IO_PHYS
|
||
|
CONFIG_SYS_PCI1_IO_SIZE
|
||
|
CONFIG_SYS_PCI1_IO_VIRT
|
||
|
CONFIG_SYS_PCI1_MEM_BASE
|
||
|
CONFIG_SYS_PCI1_MEM_BUS
|
||
|
CONFIG_SYS_PCI1_MEM_PHYS
|
||
|
CONFIG_SYS_PCI1_MEM_SIZE
|
||
|
CONFIG_SYS_PCI1_MEM_VIRT
|
||
|
CONFIG_SYS_PCI1_MMIO_BASE
|
||
|
CONFIG_SYS_PCI1_MMIO_PHYS
|
||
|
CONFIG_SYS_PCI1_MMIO_SIZE
|
||
|
CONFIG_SYS_PCI2_ADDR
|
||
|
CONFIG_SYS_PCI2_IO_BASE
|
||
|
CONFIG_SYS_PCI2_IO_BUS
|
||
|
CONFIG_SYS_PCI2_IO_PHYS
|
||
|
CONFIG_SYS_PCI2_IO_SIZE
|
||
|
CONFIG_SYS_PCI2_IO_VIRT
|
||
|
CONFIG_SYS_PCI2_MEM_BASE
|
||
|
CONFIG_SYS_PCI2_MEM_BUS
|
||
|
CONFIG_SYS_PCI2_MEM_PHYS
|
||
|
CONFIG_SYS_PCI2_MEM_SIZE
|
||
|
CONFIG_SYS_PCI2_MEM_VIRT
|
||
|
CONFIG_SYS_PCI2_MMIO_BASE
|
||
|
CONFIG_SYS_PCI2_MMIO_PHYS
|
||
|
CONFIG_SYS_PCI2_MMIO_SIZE
|
||
|
CONFIG_SYS_PCI64_MEMORY_BUS
|
||
|
CONFIG_SYS_PCI9054_IOBASE
|
||
|
CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
|
||
|
CONFIG_SYS_PCIE
|
||
|
CONFIG_SYS_PCIE0_CFGBASE
|
||
|
CONFIG_SYS_PCIE0_CFGMASK
|
||
|
CONFIG_SYS_PCIE0_MEMBASE
|
||
|
CONFIG_SYS_PCIE0_REGBASE
|
||
|
CONFIG_SYS_PCIE0_UTLBASE
|
||
|
CONFIG_SYS_PCIE0_XCFGBASE
|
||
|
CONFIG_SYS_PCIE1_ADDR
|
||
|
CONFIG_SYS_PCIE1_BASE
|
||
|
CONFIG_SYS_PCIE1_CFGBASE
|
||
|
CONFIG_SYS_PCIE1_CFGMASK
|
||
|
CONFIG_SYS_PCIE1_CFG_BASE
|
||
|
CONFIG_SYS_PCIE1_CFG_SIZE
|
||
|
CONFIG_SYS_PCIE1_IO_BASE
|
||
|
CONFIG_SYS_PCIE1_IO_BUS
|
||
|
CONFIG_SYS_PCIE1_IO_PHYS
|
||
|
CONFIG_SYS_PCIE1_IO_PHYS_LOW
|
||
|
CONFIG_SYS_PCIE1_IO_SIZE
|
||
|
CONFIG_SYS_PCIE1_IO_VIRT
|
||
|
CONFIG_SYS_PCIE1_MEMBASE
|
||
|
CONFIG_SYS_PCIE1_MEM_BASE
|
||
|
CONFIG_SYS_PCIE1_MEM_BUS
|
||
|
CONFIG_SYS_PCIE1_MEM_PHYS
|
||
|
CONFIG_SYS_PCIE1_MEM_PHYS_HIGH
|
||
|
CONFIG_SYS_PCIE1_MEM_PHYS_LOW
|
||
|
CONFIG_SYS_PCIE1_MEM_SIZE
|
||
|
CONFIG_SYS_PCIE1_MEM_VIRT
|
||
|
CONFIG_SYS_PCIE1_NAME
|
||
|
CONFIG_SYS_PCIE1_PHYS_ADDR
|
||
|
CONFIG_SYS_PCIE1_PHYS_BASE
|
||
|
CONFIG_SYS_PCIE1_PHYS_SIZE
|
||
|
CONFIG_SYS_PCIE1_REGBASE
|
||
|
CONFIG_SYS_PCIE1_UTLBASE
|
||
|
CONFIG_SYS_PCIE1_VIRT_ADDR
|
||
|
CONFIG_SYS_PCIE1_XCFGBASE
|
||
|
CONFIG_SYS_PCIE2_ADDR
|
||
|
CONFIG_SYS_PCIE2_BASE
|
||
|
CONFIG_SYS_PCIE2_CFGBASE
|
||
|
CONFIG_SYS_PCIE2_CFG_BASE
|
||
|
CONFIG_SYS_PCIE2_CFG_SIZE
|
||
|
CONFIG_SYS_PCIE2_IO_BASE
|
||
|
CONFIG_SYS_PCIE2_IO_BUS
|
||
|
CONFIG_SYS_PCIE2_IO_PHYS
|
||
|
CONFIG_SYS_PCIE2_IO_PHYS_LOW
|
||
|
CONFIG_SYS_PCIE2_IO_SIZE
|
||
|
CONFIG_SYS_PCIE2_IO_VIRT
|
||
|
CONFIG_SYS_PCIE2_MEM_BASE
|
||
|
CONFIG_SYS_PCIE2_MEM_BUS
|
||
|
CONFIG_SYS_PCIE2_MEM_PHYS
|
||
|
CONFIG_SYS_PCIE2_MEM_PHYS_HIGH
|
||
|
CONFIG_SYS_PCIE2_MEM_PHYS_LOW
|
||
|
CONFIG_SYS_PCIE2_MEM_SIZE
|
||
|
CONFIG_SYS_PCIE2_MEM_VIRT
|
||
|
CONFIG_SYS_PCIE2_NAME
|
||
|
CONFIG_SYS_PCIE2_PHYS_ADDR
|
||
|
CONFIG_SYS_PCIE2_PHYS_BASE
|
||
|
CONFIG_SYS_PCIE2_PHYS_SIZE
|
||
|
CONFIG_SYS_PCIE2_REGBASE
|
||
|
CONFIG_SYS_PCIE2_VIRT_ADDR
|
||
|
CONFIG_SYS_PCIE2_XCFGBASE
|
||
|
CONFIG_SYS_PCIE3_ADDR
|
||
|
CONFIG_SYS_PCIE3_IO_BUS
|
||
|
CONFIG_SYS_PCIE3_IO_PHYS
|
||
|
CONFIG_SYS_PCIE3_IO_SIZE
|
||
|
CONFIG_SYS_PCIE3_IO_VIRT
|
||
|
CONFIG_SYS_PCIE3_MEM_BUS
|
||
|
CONFIG_SYS_PCIE3_MEM_BUS2
|
||
|
CONFIG_SYS_PCIE3_MEM_PHYS
|
||
|
CONFIG_SYS_PCIE3_MEM_PHYS2
|
||
|
CONFIG_SYS_PCIE3_MEM_SIZE
|
||
|
CONFIG_SYS_PCIE3_MEM_SIZE2
|
||
|
CONFIG_SYS_PCIE3_MEM_VIRT
|
||
|
CONFIG_SYS_PCIE3_MEM_VIRT2
|
||
|
CONFIG_SYS_PCIE3_NAME
|
||
|
CONFIG_SYS_PCIE3_PHYS_ADDR
|
||
|
CONFIG_SYS_PCIE3_PHYS_SIZE
|
||
|
CONFIG_SYS_PCIE4_ADDR
|
||
|
CONFIG_SYS_PCIE4_IO_BUS
|
||
|
CONFIG_SYS_PCIE4_IO_PHYS
|
||
|
CONFIG_SYS_PCIE4_IO_SIZE
|
||
|
CONFIG_SYS_PCIE4_IO_VIRT
|
||
|
CONFIG_SYS_PCIE4_MEM_BUS
|
||
|
CONFIG_SYS_PCIE4_MEM_PHYS
|
||
|
CONFIG_SYS_PCIE4_MEM_SIZE
|
||
|
CONFIG_SYS_PCIE4_MEM_VIRT
|
||
|
CONFIG_SYS_PCIE4_NAME
|
||
|
CONFIG_SYS_PCIE4_PHYS_ADDR
|
||
|
CONFIG_SYS_PCIE4_PHYS_SIZE
|
||
|
CONFIG_SYS_PCIE_ADDR_HIGH
|
||
|
CONFIG_SYS_PCIE_BASE
|
||
|
CONFIG_SYS_PCIE_CFG0_PHYS_OFF
|
||
|
CONFIG_SYS_PCIE_CFG0_SIZE
|
||
|
CONFIG_SYS_PCIE_CFG1_PHYS_OFF
|
||
|
CONFIG_SYS_PCIE_CFG1_SIZE
|
||
|
CONFIG_SYS_PCIE_INBOUND_BASE
|
||
|
CONFIG_SYS_PCIE_IO_BUS
|
||
|
CONFIG_SYS_PCIE_IO_PHYS_OFF
|
||
|
CONFIG_SYS_PCIE_IO_SIZE
|
||
|
CONFIG_SYS_PCIE_MEMBASE
|
||
|
CONFIG_SYS_PCIE_MEMSIZE
|
||
|
CONFIG_SYS_PCIE_MEM_BUS
|
||
|
CONFIG_SYS_PCIE_MEM_PHYS_OFF
|
||
|
CONFIG_SYS_PCIE_MEM_SIZE
|
||
|
CONFIG_SYS_PCIE_MMAP_SIZE
|
||
|
CONFIG_SYS_PCIE_NR_PORTS
|
||
|
CONFIG_SYS_PCIE_PHYS
|
||
|
CONFIG_SYS_PCIE_VIRT
|
||
|
CONFIG_SYS_PCIMSK0_MASK
|
||
|
CONFIG_SYS_PCIMSK1_MASK
|
||
|
CONFIG_SYS_PCISPEED_66
|
||
|
CONFIG_SYS_PCI_64BIT
|
||
|
CONFIG_SYS_PCI_BAR0
|
||
|
CONFIG_SYS_PCI_BAR1
|
||
|
CONFIG_SYS_PCI_BAR2
|
||
|
CONFIG_SYS_PCI_BAR3
|
||
|
CONFIG_SYS_PCI_BAR4
|
||
|
CONFIG_SYS_PCI_BAR5
|
||
|
CONFIG_SYS_PCI_BASE
|
||
|
CONFIG_SYS_PCI_BOARD_FIXUP_IRQ
|
||
|
CONFIG_SYS_PCI_CACHE_LINE_SIZE
|
||
|
CONFIG_SYS_PCI_CFG_BASE
|
||
|
CONFIG_SYS_PCI_CFG_BUS
|
||
|
CONFIG_SYS_PCI_CFG_PHYS
|
||
|
CONFIG_SYS_PCI_CFG_SIZE
|
||
|
CONFIG_SYS_PCI_CLASSCODE
|
||
|
CONFIG_SYS_PCI_CLASSCODE_MONARCH
|
||
|
CONFIG_SYS_PCI_CLASSCODE_NONMONARCH
|
||
|
CONFIG_SYS_PCI_CON_DEVICE
|
||
|
CONFIG_SYS_PCI_EP_MEMORY_BASE
|
||
|
CONFIG_SYS_PCI_FORCE_PCI_CONV
|
||
|
CONFIG_SYS_PCI_IO_BASE
|
||
|
CONFIG_SYS_PCI_IO_BUS
|
||
|
CONFIG_SYS_PCI_IO_PHYS
|
||
|
CONFIG_SYS_PCI_IO_SIZE
|
||
|
CONFIG_SYS_PCI_MAP_END
|
||
|
CONFIG_SYS_PCI_MAP_START
|
||
|
CONFIG_SYS_PCI_MASTER_INIT
|
||
|
CONFIG_SYS_PCI_MEMBASE
|
||
|
CONFIG_SYS_PCI_MEMBASE1
|
||
|
CONFIG_SYS_PCI_MEMBASE2
|
||
|
CONFIG_SYS_PCI_MEMBASE3
|
||
|
CONFIG_SYS_PCI_MEMORY_BUS
|
||
|
CONFIG_SYS_PCI_MEMORY_PHYS
|
||
|
CONFIG_SYS_PCI_MEMORY_SIZE
|
||
|
CONFIG_SYS_PCI_MEMSIZE
|
||
|
CONFIG_SYS_PCI_MEM_BASE
|
||
|
CONFIG_SYS_PCI_MEM_BUS
|
||
|
CONFIG_SYS_PCI_MEM_PHYS
|
||
|
CONFIG_SYS_PCI_MEM_SIZE
|
||
|
CONFIG_SYS_PCI_MMIO_BASE
|
||
|
CONFIG_SYS_PCI_MMIO_PHYS
|
||
|
CONFIG_SYS_PCI_MMIO_SIZE
|
||
|
CONFIG_SYS_PCI_MSTR0_LOCAL
|
||
|
CONFIG_SYS_PCI_MSTR1_LOCAL
|
||
|
CONFIG_SYS_PCI_MSTR_IO_BUS
|
||
|
CONFIG_SYS_PCI_MSTR_IO_LOCAL
|
||
|
CONFIG_SYS_PCI_MSTR_IO_SIZE
|
||
|
CONFIG_SYS_PCI_MSTR_MEMIO_BUS
|
||
|
CONFIG_SYS_PCI_MSTR_MEMIO_LOCAL
|
||
|
CONFIG_SYS_PCI_MSTR_MEMIO_SIZE
|
||
|
CONFIG_SYS_PCI_MSTR_MEM_BUS
|
||
|
CONFIG_SYS_PCI_MSTR_MEM_LOCAL
|
||
|
CONFIG_SYS_PCI_MSTR_MEM_SIZE
|
||
|
CONFIG_SYS_PCI_NR_INBOUND_WIN
|
||
|
CONFIG_SYS_PCI_PHYS
|
||
|
CONFIG_SYS_PCI_PTM1LA
|
||
|
CONFIG_SYS_PCI_PTM1MS
|
||
|
CONFIG_SYS_PCI_PTM1PCI
|
||
|
CONFIG_SYS_PCI_PTM2LA
|
||
|
CONFIG_SYS_PCI_PTM2MS
|
||
|
CONFIG_SYS_PCI_PTM2PCI
|
||
|
CONFIG_SYS_PCI_SLV_MEM_BUS
|
||
|
CONFIG_SYS_PCI_SLV_MEM_LOCAL
|
||
|
CONFIG_SYS_PCI_SLV_MEM_SIZE
|
||
|
CONFIG_SYS_PCI_SUBSYS_DEVICEID
|
||
|
CONFIG_SYS_PCI_SUBSYS_DEVICEID2
|
||
|
CONFIG_SYS_PCI_SUBSYS_ID
|
||
|
CONFIG_SYS_PCI_SUBSYS_ID_MONARCH
|
||
|
CONFIG_SYS_PCI_SUBSYS_ID_NONMONARCH
|
||
|
CONFIG_SYS_PCI_SUBSYS_VENDORID
|
||
|
CONFIG_SYS_PCI_SYS_MEM_BUS
|
||
|
CONFIG_SYS_PCI_SYS_MEM_PHYS
|
||
|
CONFIG_SYS_PCI_SYS_MEM_SIZE
|
||
|
CONFIG_SYS_PCI_TARGBASE
|
||
|
CONFIG_SYS_PCI_TARGET_INIT
|
||
|
CONFIG_SYS_PCI_TBATR0
|
||
|
CONFIG_SYS_PCI_TBATR1
|
||
|
CONFIG_SYS_PCI_TBATR2
|
||
|
CONFIG_SYS_PCI_TBATR3
|
||
|
CONFIG_SYS_PCI_TBATR4
|
||
|
CONFIG_SYS_PCI_TBATR5
|
||
|
CONFIG_SYS_PCI_VIRT
|
||
|
CONFIG_SYS_PCMCIA_ATTRB_ADDR
|
||
|
CONFIG_SYS_PCMCIA_ATTRB_SIZE
|
||
|
CONFIG_SYS_PCMCIA_ATTR_BASE
|
||
|
CONFIG_SYS_PCMCIA_CIS_WIN
|
||
|
CONFIG_SYS_PCMCIA_CIS_WIN_SIZE
|
||
|
CONFIG_SYS_PCMCIA_DMA_ADDR
|
||
|
CONFIG_SYS_PCMCIA_DMA_SIZE
|
||
|
CONFIG_SYS_PCMCIA_IO_ADDR
|
||
|
CONFIG_SYS_PCMCIA_IO_BASE
|
||
|
CONFIG_SYS_PCMCIA_IO_SIZE
|
||
|
CONFIG_SYS_PCMCIA_IO_WIN
|
||
|
CONFIG_SYS_PCMCIA_IO_WIN_SIZE
|
||
|
CONFIG_SYS_PCMCIA_MEM_ADDR
|
||
|
CONFIG_SYS_PCMCIA_MEM_SIZE
|
||
|
CONFIG_SYS_PCMCIA_PBR0
|
||
|
CONFIG_SYS_PCMCIA_PBR1
|
||
|
CONFIG_SYS_PCMCIA_PBR2
|
||
|
CONFIG_SYS_PCMCIA_PBR3
|
||
|
CONFIG_SYS_PCMCIA_PBR4
|
||
|
CONFIG_SYS_PCMCIA_PBR5
|
||
|
CONFIG_SYS_PCMCIA_PBR6
|
||
|
CONFIG_SYS_PCMCIA_PBR7
|
||
|
CONFIG_SYS_PCMCIA_POR0
|
||
|
CONFIG_SYS_PCMCIA_POR1
|
||
|
CONFIG_SYS_PCMCIA_POR2
|
||
|
CONFIG_SYS_PCMCIA_POR3
|
||
|
CONFIG_SYS_PCMCIA_POR4
|
||
|
CONFIG_SYS_PCMCIA_POR5
|
||
|
CONFIG_SYS_PCMCIA_POR6
|
||
|
CONFIG_SYS_PCMCIA_POR7
|
||
|
CONFIG_SYS_PCMCIA_TIMING
|
||
|
CONFIG_SYS_PDCNT
|
||
|
CONFIG_SYS_PDM360NG_COPROC_BAUDRATE
|
||
|
CONFIG_SYS_PDM360NG_COPROC_READ_DELAY
|
||
|
CONFIG_SYS_PEHLPAR
|
||
|
CONFIG_SYS_PEPAR
|
||
|
CONFIG_SYS_PERIPHERAL_BASE
|
||
|
CONFIG_SYS_PFC0
|
||
|
CONFIG_SYS_PFPAR
|
||
|
CONFIG_SYS_PHYS_ADDR_HIGH
|
||
|
CONFIG_SYS_PHY_UBOOT_BASE
|
||
|
CONFIG_SYS_PIB_BASE
|
||
|
CONFIG_SYS_PIB_WINDOW_SIZE
|
||
|
CONFIG_SYS_PICMR0_MASK_ATTRIB
|
||
|
CONFIG_SYS_PIOC_ASR_VAL
|
||
|
CONFIG_SYS_PIOC_BSR_VAL
|
||
|
CONFIG_SYS_PIOC_PDR_VAL
|
||
|
CONFIG_SYS_PIOC_PDR_VAL1
|
||
|
CONFIG_SYS_PIOC_PPUDR_VAL
|
||
|
CONFIG_SYS_PIOD_PDR_VAL1
|
||
|
CONFIG_SYS_PIOD_PPUDR_VAL
|
||
|
CONFIG_SYS_PIO_MODE
|
||
|
CONFIG_SYS_PISCR
|
||
|
CONFIG_SYS_PIT_BASE
|
||
|
CONFIG_SYS_PIT_PRESCALE
|
||
|
CONFIG_SYS_PIXIS_VBOOT_ENABLE
|
||
|
CONFIG_SYS_PIXIS_VBOOT_MASK
|
||
|
CONFIG_SYS_PIXIS_VCFGEN0_ENABLE
|
||
|
CONFIG_SYS_PJPAR
|
||
|
CONFIG_SYS_PL310_BASE
|
||
|
CONFIG_SYS_PLATFORM_SRAM_BASE
|
||
|
CONFIG_SYS_PLATFORM_SRAM_BASE_PHYS
|
||
|
CONFIG_SYS_PLATFORM_SRAM_SIZE
|
||
|
CONFIG_SYS_PLL0_DIV
|
||
|
CONFIG_SYS_PLL0_MUL
|
||
|
CONFIG_SYS_PLL0_OPT
|
||
|
CONFIG_SYS_PLL0_SUPPRESS_CYCLES
|
||
|
CONFIG_SYS_PLLAR_VAL
|
||
|
CONFIG_SYS_PLLBR_VAL
|
||
|
CONFIG_SYS_PLLCR
|
||
|
CONFIG_SYS_PLL_BYPASS
|
||
|
CONFIG_SYS_PLL_FDR
|
||
|
CONFIG_SYS_PLL_ODR
|
||
|
CONFIG_SYS_PLL_RECONFIG
|
||
|
CONFIG_SYS_PLL_SETTLING_TIME
|
||
|
CONFIG_SYS_PLPRCR
|
||
|
CONFIG_SYS_PLUG_BASE
|
||
|
CONFIG_SYS_PMAN
|
||
|
CONFIG_SYS_PMC_BASE
|
||
|
CONFIG_SYS_PMC_BASE_PHYS
|
||
|
CONFIG_SYS_PME_CLK
|
||
|
CONFIG_SYS_POCMR0_MASK_ATTRIB
|
||
|
CONFIG_SYS_POCMR1_MASK_ATTRIB
|
||
|
CONFIG_SYS_POCMR2_MASK_ATTRIB
|
||
|
CONFIG_SYS_PORTTC
|
||
|
CONFIG_SYS_POST_BSPEC1
|
||
|
CONFIG_SYS_POST_BSPEC2
|
||
|
CONFIG_SYS_POST_BSPEC3
|
||
|
CONFIG_SYS_POST_BSPEC4
|
||
|
CONFIG_SYS_POST_BSPEC5
|
||
|
CONFIG_SYS_POST_CACHE
|
||
|
CONFIG_SYS_POST_CACHE_ADDR
|
||
|
CONFIG_SYS_POST_CODEC
|
||
|
CONFIG_SYS_POST_COPROC
|
||
|
CONFIG_SYS_POST_CPU
|
||
|
CONFIG_SYS_POST_DSP
|
||
|
CONFIG_SYS_POST_ECC
|
||
|
CONFIG_SYS_POST_ETHER
|
||
|
CONFIG_SYS_POST_ETHER_EXT_LOOPBACK
|
||
|
CONFIG_SYS_POST_ETH_LOOPS
|
||
|
CONFIG_SYS_POST_FLASH
|
||
|
CONFIG_SYS_POST_FLASH_END
|
||
|
CONFIG_SYS_POST_FLASH_NUM
|
||
|
CONFIG_SYS_POST_FLASH_START
|
||
|
CONFIG_SYS_POST_FPU
|
||
|
CONFIG_SYS_POST_FPU_ON
|
||
|
CONFIG_SYS_POST_HOTKEYS_GPIO
|
||
|
CONFIG_SYS_POST_I2C
|
||
|
CONFIG_SYS_POST_I2C_ADDRS
|
||
|
CONFIG_SYS_POST_I2C_IGNORES
|
||
|
CONFIG_SYS_POST_MEMORY
|
||
|
CONFIG_SYS_POST_MEMORY_ON
|
||
|
CONFIG_SYS_POST_MEM_REGIONS
|
||
|
CONFIG_SYS_POST_OCM
|
||
|
CONFIG_SYS_POST_PREREL
|
||
|
CONFIG_SYS_POST_RTC
|
||
|
CONFIG_SYS_POST_SPI
|
||
|
CONFIG_SYS_POST_SPR
|
||
|
CONFIG_SYS_POST_SYSMON
|
||
|
CONFIG_SYS_POST_UART
|
||
|
CONFIG_SYS_POST_UART_TABLE
|
||
|
CONFIG_SYS_POST_USB
|
||
|
CONFIG_SYS_POST_WATCHDOG
|
||
|
CONFIG_SYS_POST_WORD_ADDR
|
||
|
CONFIG_SYS_POWER_MANAGER
|
||
|
CONFIG_SYS_PPC4XX_USB_ADDR
|
||
|
CONFIG_SYS_PPC_DDR_WIMGE
|
||
|
CONFIG_SYS_PQSPAR
|
||
|
CONFIG_SYS_PRELIM_OR_AM
|
||
|
CONFIG_SYS_PROMPT_HUSH_PS2
|
||
|
CONFIG_SYS_PROM_OFFSET
|
||
|
CONFIG_SYS_PROM_SIZE
|
||
|
CONFIG_SYS_PSC1
|
||
|
CONFIG_SYS_PSC3
|
||
|
CONFIG_SYS_PSC4
|
||
|
CONFIG_SYS_PSC6
|
||
|
CONFIG_SYS_PSDMR
|
||
|
CONFIG_SYS_PSDPAR
|
||
|
CONFIG_SYS_PSRT
|
||
|
CONFIG_SYS_PSSR_VAL
|
||
|
CONFIG_SYS_PTA_PER_CLK
|
||
|
CONFIG_SYS_PTCPAR
|
||
|
CONFIG_SYS_PTDPAR
|
||
|
CONFIG_SYS_PTL2_BITS
|
||
|
CONFIG_SYS_PTV
|
||
|
CONFIG_SYS_PUAPAR
|
||
|
CONFIG_SYS_QE_FMAN_FW_IN_MMC
|
||
|
CONFIG_SYS_QE_FMAN_FW_IN_NAND
|
||
|
CONFIG_SYS_QE_FMAN_FW_IN_NOR
|
||
|
CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
|
||
|
CONFIG_SYS_QE_FMAN_FW_LENGTH
|
||
|
CONFIG_SYS_QE_FW_ADDR
|
||
|
CONFIG_SYS_QE_FW_IN_SPIFLASH
|
||
|
CONFIG_SYS_QMAN_CENA_BASE
|
||
|
CONFIG_SYS_QMAN_CENA_SIZE
|
||
|
CONFIG_SYS_QMAN_CINH_BASE
|
||
|
CONFIG_SYS_QMAN_CINH_SIZE
|
||
|
CONFIG_SYS_QMAN_MEM_BASE
|
||
|
CONFIG_SYS_QMAN_MEM_PHYS
|
||
|
CONFIG_SYS_QMAN_MEM_SIZE
|
||
|
CONFIG_SYS_QMAN_NUM_PORTALS
|
||
|
CONFIG_SYS_QMAN_SP_CENA_SIZE
|
||
|
CONFIG_SYS_QMAN_SP_CINH_SIZE
|
||
|
CONFIG_SYS_QMAN_SWP_ISDR_REG
|
||
|
CONFIG_SYS_QRIO_BASE
|
||
|
CONFIG_SYS_QRIO_BASE_PHYS
|
||
|
CONFIG_SYS_QRIO_BR_PRELIM
|
||
|
CONFIG_SYS_QRIO_OR_PRELIM
|
||
|
CONFIG_SYS_R7780MP_OLD_FLASH
|
||
|
CONFIG_SYS_RAMBOOT
|
||
|
CONFIG_SYS_RAM_BASE
|
||
|
CONFIG_SYS_RAM_CS
|
||
|
CONFIG_SYS_RAM_END
|
||
|
CONFIG_SYS_RAM_FREQ_DIV
|
||
|
CONFIG_SYS_RAM_SIZE
|
||
|
CONFIG_SYS_RCAR_I2C0_BASE
|
||
|
CONFIG_SYS_RCAR_I2C0_SPEED
|
||
|
CONFIG_SYS_RCAR_I2C1_BASE
|
||
|
CONFIG_SYS_RCAR_I2C1_SPEED
|
||
|
CONFIG_SYS_RCAR_I2C2_BASE
|
||
|
CONFIG_SYS_RCAR_I2C2_SPEED
|
||
|
CONFIG_SYS_RCAR_I2C3_BASE
|
||
|
CONFIG_SYS_RCAR_I2C3_SPEED
|
||
|
CONFIG_SYS_RCCR
|
||
|
CONFIG_SYS_RCWH_PCIHOST
|
||
|
CONFIG_SYS_READ_SPD
|
||
|
CONFIG_SYS_REDUNDAND_ENVIRONMENT
|
||
|
CONFIG_SYS_RELOC_MONITOR_BASE
|
||
|
CONFIG_SYS_RELOC_MONITOR_MAX_END
|
||
|
CONFIG_SYS_REMAP_OR_AM
|
||
|
CONFIG_SYS_RESET_ADDR
|
||
|
CONFIG_SYS_RESET_ADDRESS
|
||
|
CONFIG_SYS_RESET_BASE
|
||
|
CONFIG_SYS_RESET_SCTRL
|
||
|
CONFIG_SYS_RFD
|
||
|
CONFIG_SYS_RGMII1_PHY_ADDR
|
||
|
CONFIG_SYS_RGMII2_PHY_ADDR
|
||
|
CONFIG_SYS_RIO_MEM_BASE
|
||
|
CONFIG_SYS_RIO_MEM_BUS
|
||
|
CONFIG_SYS_RIO_MEM_PHYS
|
||
|
CONFIG_SYS_RIO_MEM_SIZE
|
||
|
CONFIG_SYS_RIO_MEM_VIRT
|
||
|
CONFIG_SYS_RMDS
|
||
|
CONFIG_SYS_RMR
|
||
|
CONFIG_SYS_ROM_BASE
|
||
|
CONFIG_SYS_ROOTPATH
|
||
|
CONFIG_SYS_RSTC_RMR_VAL
|
||
|
CONFIG_SYS_RTCSC
|
||
|
CONFIG_SYS_RTC_BUS_NUM
|
||
|
CONFIG_SYS_RTC_CNT
|
||
|
CONFIG_SYS_RTC_DS1337
|
||
|
CONFIG_SYS_RTC_DS1337_NOOSC
|
||
|
CONFIG_SYS_RTC_DS1388
|
||
|
CONFIG_SYS_RTC_OSCILLATOR
|
||
|
CONFIG_SYS_RTC_PL031_BASE
|
||
|
CONFIG_SYS_RTC_REG_BASE_ADDR
|
||
|
CONFIG_SYS_RTC_SETUP
|
||
|
CONFIG_SYS_RV3029_TCR
|
||
|
CONFIG_SYS_RX_ETH_BUFFER
|
||
|
CONFIG_SYS_SATA
|
||
|
CONFIG_SYS_SATA1
|
||
|
CONFIG_SYS_SATA1_FLAGS
|
||
|
CONFIG_SYS_SATA1_OFFSET
|
||
|
CONFIG_SYS_SATA2
|
||
|
CONFIG_SYS_SATA2_FLAGS
|
||
|
CONFIG_SYS_SATA2_OFFSET
|
||
|
CONFIG_SYS_SATA_ENV_DEV
|
||
|
CONFIG_SYS_SATA_FAT_BOOT_PARTITION
|
||
|
CONFIG_SYS_SATA_MAX_DEVICE
|
||
|
CONFIG_SYS_SBFHDR_DATA_OFFSET
|
||
|
CONFIG_SYS_SBFHDR_SIZE
|
||
|
CONFIG_SYS_SCCR
|
||
|
CONFIG_SYS_SCCR_ENCCM
|
||
|
CONFIG_SYS_SCCR_PCICM
|
||
|
CONFIG_SYS_SCCR_PCIEXP1CM
|
||
|
CONFIG_SYS_SCCR_PCIEXP2CM
|
||
|
CONFIG_SYS_SCCR_SATACM
|
||
|
CONFIG_SYS_SCCR_TSEC1CM
|
||
|
CONFIG_SYS_SCCR_TSEC1ON
|
||
|
CONFIG_SYS_SCCR_TSEC2CM
|
||
|
CONFIG_SYS_SCCR_TSEC2ON
|
||
|
CONFIG_SYS_SCCR_TSECCM
|
||
|
CONFIG_SYS_SCCR_USBDRCM
|
||
|
CONFIG_SYS_SCCR_USBMPHCM
|
||
|
CONFIG_SYS_SCC_TOUT_LOOP
|
||
|
CONFIG_SYS_SCR
|
||
|
CONFIG_SYS_SCRATCH_VA
|
||
|
CONFIG_SYS_SCSI_MAXDEVICE
|
||
|
CONFIG_SYS_SCSI_MAX_DEVICE
|
||
|
CONFIG_SYS_SCSI_MAX_LUN
|
||
|
CONFIG_SYS_SCSI_MAX_SCSI_ID
|
||
|
CONFIG_SYS_SCSI_SPIN_UP_TIME
|
||
|
CONFIG_SYS_SCSI_SYM53C8XX_CCF
|
||
|
CONFIG_SYS_SDHC_CLK
|
||
|
CONFIG_SYS_SDHC_CLK_2_PLL
|
||
|
CONFIG_SYS_SDIO0
|
||
|
CONFIG_SYS_SDIO0_MAX_CLK
|
||
|
CONFIG_SYS_SDIO1
|
||
|
CONFIG_SYS_SDIO1_MAX_CLK
|
||
|
CONFIG_SYS_SDIO2
|
||
|
CONFIG_SYS_SDIO2_MAX_CLK
|
||
|
CONFIG_SYS_SDIO3
|
||
|
CONFIG_SYS_SDIO3_MAX_CLK
|
||
|
CONFIG_SYS_SDIO_BASE0
|
||
|
CONFIG_SYS_SDIO_BASE1
|
||
|
CONFIG_SYS_SDIO_BASE2
|
||
|
CONFIG_SYS_SDIO_BASE3
|
||
|
CONFIG_SYS_SDMR
|
||
|
CONFIG_SYS_SDRAM
|
||
|
CONFIG_SYS_SDRAM0_CFG0
|
||
|
CONFIG_SYS_SDRAM0_CLKTR
|
||
|
CONFIG_SYS_SDRAM0_CODT
|
||
|
CONFIG_SYS_SDRAM0_DLCR
|
||
|
CONFIG_SYS_SDRAM0_INITPLR0
|
||
|
CONFIG_SYS_SDRAM0_INITPLR1
|
||
|
CONFIG_SYS_SDRAM0_INITPLR10
|
||
|
CONFIG_SYS_SDRAM0_INITPLR11
|
||
|
CONFIG_SYS_SDRAM0_INITPLR12
|
||
|
CONFIG_SYS_SDRAM0_INITPLR13
|
||
|
CONFIG_SYS_SDRAM0_INITPLR14
|
||
|
CONFIG_SYS_SDRAM0_INITPLR15
|
||
|
CONFIG_SYS_SDRAM0_INITPLR2
|
||
|
CONFIG_SYS_SDRAM0_INITPLR3
|
||
|
CONFIG_SYS_SDRAM0_INITPLR4
|
||
|
CONFIG_SYS_SDRAM0_INITPLR5
|
||
|
CONFIG_SYS_SDRAM0_INITPLR6
|
||
|
CONFIG_SYS_SDRAM0_INITPLR7
|
||
|
CONFIG_SYS_SDRAM0_INITPLR8
|
||
|
CONFIG_SYS_SDRAM0_INITPLR9
|
||
|
CONFIG_SYS_SDRAM0_MB0CF
|
||
|
CONFIG_SYS_SDRAM0_MB0CF_BASE
|
||
|
CONFIG_SYS_SDRAM0_MB1CF
|
||
|
CONFIG_SYS_SDRAM0_MB1CF_BASE
|
||
|
CONFIG_SYS_SDRAM0_MB2CF
|
||
|
CONFIG_SYS_SDRAM0_MB3CF
|
||
|
CONFIG_SYS_SDRAM0_MCOPT1
|
||
|
CONFIG_SYS_SDRAM0_MCOPT2
|
||
|
CONFIG_SYS_SDRAM0_MEMODE
|
||
|
CONFIG_SYS_SDRAM0_MMODE
|
||
|
CONFIG_SYS_SDRAM0_MODT0
|
||
|
CONFIG_SYS_SDRAM0_MODT1
|
||
|
CONFIG_SYS_SDRAM0_MODT2
|
||
|
CONFIG_SYS_SDRAM0_MODT3
|
||
|
CONFIG_SYS_SDRAM0_RDCC
|
||
|
CONFIG_SYS_SDRAM0_RFDC
|
||
|
CONFIG_SYS_SDRAM0_RQDC
|
||
|
CONFIG_SYS_SDRAM0_RTR
|
||
|
CONFIG_SYS_SDRAM0_SDTR1
|
||
|
CONFIG_SYS_SDRAM0_SDTR2
|
||
|
CONFIG_SYS_SDRAM0_SDTR3
|
||
|
CONFIG_SYS_SDRAM0_TR0
|
||
|
CONFIG_SYS_SDRAM0_WDDCTR
|
||
|
CONFIG_SYS_SDRAM0_WRDTR
|
||
|
CONFIG_SYS_SDRAM1
|
||
|
CONFIG_SYS_SDRAM_BANKS
|
||
|
CONFIG_SYS_SDRAM_BASE
|
||
|
CONFIG_SYS_SDRAM_BASE0
|
||
|
CONFIG_SYS_SDRAM_BASE1
|
||
|
CONFIG_SYS_SDRAM_BASE1xx
|
||
|
CONFIG_SYS_SDRAM_BASE2
|
||
|
CONFIG_SYS_SDRAM_CASL
|
||
|
CONFIG_SYS_SDRAM_CFG
|
||
|
CONFIG_SYS_SDRAM_CFG1
|
||
|
CONFIG_SYS_SDRAM_CFG2
|
||
|
CONFIG_SYS_SDRAM_CL
|
||
|
CONFIG_SYS_SDRAM_CONF1HB
|
||
|
CONFIG_SYS_SDRAM_CONF1LL
|
||
|
CONFIG_SYS_SDRAM_CONFPATHB
|
||
|
CONFIG_SYS_SDRAM_CS1
|
||
|
CONFIG_SYS_SDRAM_CTP
|
||
|
CONFIG_SYS_SDRAM_CTRL
|
||
|
CONFIG_SYS_SDRAM_DRVSTRENGTH
|
||
|
CONFIG_SYS_SDRAM_DRV_STRENGTH
|
||
|
CONFIG_SYS_SDRAM_EMOD
|
||
|
CONFIG_SYS_SDRAM_END
|
||
|
CONFIG_SYS_SDRAM_LDF
|
||
|
CONFIG_SYS_SDRAM_LIST
|
||
|
CONFIG_SYS_SDRAM_LOWER
|
||
|
CONFIG_SYS_SDRAM_MODE
|
||
|
CONFIG_SYS_SDRAM_PLBADDUHB
|
||
|
CONFIG_SYS_SDRAM_PLBADDULL
|
||
|
CONFIG_SYS_SDRAM_PTA
|
||
|
CONFIG_SYS_SDRAM_R0BAS
|
||
|
CONFIG_SYS_SDRAM_R1BAS
|
||
|
CONFIG_SYS_SDRAM_R2BAS
|
||
|
CONFIG_SYS_SDRAM_R3BAS
|
||
|
CONFIG_SYS_SDRAM_RCD
|
||
|
CONFIG_SYS_SDRAM_RFTA
|
||
|
CONFIG_SYS_SDRAM_SIZE
|
||
|
CONFIG_SYS_SDRAM_SIZE0
|
||
|
CONFIG_SYS_SDRAM_SIZE1
|
||
|
CONFIG_SYS_SDRAM_SIZE_LAW
|
||
|
CONFIG_SYS_SDRAM_SIZE_MB
|
||
|
CONFIG_SYS_SDRAM_TABLE
|
||
|
CONFIG_SYS_SDRAM_UPPER
|
||
|
CONFIG_SYS_SDRAM_VAL
|
||
|
CONFIG_SYS_SDRAM_VAL1
|
||
|
CONFIG_SYS_SDRAM_VAL10
|
||
|
CONFIG_SYS_SDRAM_VAL11
|
||
|
CONFIG_SYS_SDRAM_VAL12
|
||
|
CONFIG_SYS_SDRAM_VAL2
|
||
|
CONFIG_SYS_SDRAM_VAL3
|
||
|
CONFIG_SYS_SDRAM_VAL4
|
||
|
CONFIG_SYS_SDRAM_VAL5
|
||
|
CONFIG_SYS_SDRAM_VAL6
|
||
|
CONFIG_SYS_SDRAM_VAL7
|
||
|
CONFIG_SYS_SDRAM_VAL8
|
||
|
CONFIG_SYS_SDRAM_VAL9
|
||
|
CONFIG_SYS_SDRAM_tRC
|
||
|
CONFIG_SYS_SDRAM_tRCD
|
||
|
CONFIG_SYS_SDRAM_tRFC
|
||
|
CONFIG_SYS_SDRAM_tRP
|
||
|
CONFIG_SYS_SDRC_CR_VAL
|
||
|
CONFIG_SYS_SDRC_MDR_VAL
|
||
|
CONFIG_SYS_SDRC_MR_VAL
|
||
|
CONFIG_SYS_SDRC_MR_VAL1
|
||
|
CONFIG_SYS_SDRC_MR_VAL2
|
||
|
CONFIG_SYS_SDRC_MR_VAL3
|
||
|
CONFIG_SYS_SDRC_MR_VAL4
|
||
|
CONFIG_SYS_SDRC_MR_VAL5
|
||
|
CONFIG_SYS_SDRC_TR_VAL
|
||
|
CONFIG_SYS_SDRC_TR_VAL1
|
||
|
CONFIG_SYS_SDRC_TR_VAL2
|
||
|
CONFIG_SYS_SDSR
|
||
|
CONFIG_SYS_SD_VOLTAGE
|
||
|
CONFIG_SYS_SEC_MON_ADDR
|
||
|
CONFIG_SYS_SEC_MON_OFFSET
|
||
|
CONFIG_SYS_SELF_RST
|
||
|
CONFIG_SYS_SERIAL0
|
||
|
CONFIG_SYS_SERIAL1
|
||
|
CONFIG_SYS_SERIAL2
|
||
|
CONFIG_SYS_SERIAL3
|
||
|
CONFIG_SYS_SERIAL4
|
||
|
CONFIG_SYS_SERIAL5
|
||
|
CONFIG_SYS_SERIAL_BOOT
|
||
|
CONFIG_SYS_SFP_ADDR
|
||
|
CONFIG_SYS_SFP_OFFSET
|
||
|
CONFIG_SYS_SGMII1_PHY_ADDR
|
||
|
CONFIG_SYS_SGMII2_PHY_ADDR
|
||
|
CONFIG_SYS_SGMII3_PHY_ADDR
|
||
|
CONFIG_SYS_SGMII_LINERATE_MHZ
|
||
|
CONFIG_SYS_SGMII_RATESCALE
|
||
|
CONFIG_SYS_SGMII_REFCLK_MHZ
|
||
|
CONFIG_SYS_SH_SDHI0_BASE
|
||
|
CONFIG_SYS_SH_SDHI1_BASE
|
||
|
CONFIG_SYS_SH_SDHI2_BASE
|
||
|
CONFIG_SYS_SH_SDHI3_BASE
|
||
|
CONFIG_SYS_SH_SDHI_NR_CHANNEL
|
||
|
CONFIG_SYS_SICRH
|
||
|
CONFIG_SYS_SICRL
|
||
|
CONFIG_SYS_SIL1178_I2C
|
||
|
CONFIG_SYS_SIMULATE_SPD_EEPROM
|
||
|
CONFIG_SYS_SIUMCR
|
||
|
CONFIG_SYS_SIUMCR_HIGH
|
||
|
CONFIG_SYS_SIUMCR_LOW
|
||
|
CONFIG_SYS_SJA1000_BASE
|
||
|
CONFIG_SYS_SMALL_FLASH
|
||
|
CONFIG_SYS_SMC0_CYCLE0_VAL
|
||
|
CONFIG_SYS_SMC0_MODE0_VAL
|
||
|
CONFIG_SYS_SMC0_PULSE0_VAL
|
||
|
CONFIG_SYS_SMC0_SETUP0_VAL
|
||
|
CONFIG_SYS_SMC_CSR0_VAL
|
||
|
CONFIG_SYS_SMC_DPMEM_OFFSET
|
||
|
CONFIG_SYS_SMC_RXBUFLEN
|
||
|
CONFIG_SYS_SMC_UCODE_PATCH
|
||
|
CONFIG_SYS_SMI_BASE
|
||
|
CONFIG_SYS_SPANSION_BASE
|
||
|
CONFIG_SYS_SPANSION_BOOT
|
||
|
CONFIG_SYS_SPC1920_PLD_BASE
|
||
|
CONFIG_SYS_SPC1920_SMC1_CLK4
|
||
|
CONFIG_SYS_SPCR_OPT
|
||
|
CONFIG_SYS_SPCR_TSEC1EP
|
||
|
CONFIG_SYS_SPCR_TSEC2EP
|
||
|
CONFIG_SYS_SPCR_TSECEP
|
||
|
CONFIG_SYS_SPD_BUS_NUM
|
||
|
CONFIG_SYS_SPD_MAX_DIMMS
|
||
|
CONFIG_SYS_SPI0
|
||
|
CONFIG_SYS_SPI0_NUM_CS
|
||
|
CONFIG_SYS_SPI1
|
||
|
CONFIG_SYS_SPI1_BASE
|
||
|
CONFIG_SYS_SPI1_NUM_CS
|
||
|
CONFIG_SYS_SPI2
|
||
|
CONFIG_SYS_SPI2_BASE
|
||
|
CONFIG_SYS_SPI2_NUM_CS
|
||
|
CONFIG_SYS_SPI_ARGS_OFFS
|
||
|
CONFIG_SYS_SPI_ARGS_SIZE
|
||
|
CONFIG_SYS_SPI_BASE
|
||
|
CONFIG_SYS_SPI_CLK
|
||
|
CONFIG_SYS_SPI_CS_ACT
|
||
|
CONFIG_SYS_SPI_CS_BASE
|
||
|
CONFIG_SYS_SPI_CS_USED
|
||
|
CONFIG_SYS_SPI_DPMEM_OFFSET
|
||
|
CONFIG_SYS_SPI_FLASH_U_BOOT_DST
|
||
|
CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS
|
||
|
CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE
|
||
|
CONFIG_SYS_SPI_FLASH_U_BOOT_START
|
||
|
CONFIG_SYS_SPI_INIT_OFFSET
|
||
|
CONFIG_SYS_SPI_KERNEL_OFFS
|
||
|
CONFIG_SYS_SPI_MXC_WAIT
|
||
|
CONFIG_SYS_SPI_RTC_DEVID
|
||
|
CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
|
||
|
CONFIG_SYS_SPI_UCODE_PATCH
|
||
|
CONFIG_SYS_SPI_U_BOOT_OFFS
|
||
|
CONFIG_SYS_SPI_U_BOOT_SIZE
|
||
|
CONFIG_SYS_SPI_WRITE_TOUT
|
||
|
CONFIG_SYS_SPL_ARGS_ADDR
|
||
|
CONFIG_SYS_SPL_LEN
|
||
|
CONFIG_SYS_SPL_MALLOC_SIZE
|
||
|
CONFIG_SYS_SPL_MALLOC_START
|
||
|
CONFIG_SYS_SPL_MAX_LEN
|
||
|
CONFIG_SYS_SPR
|
||
|
CONFIG_SYS_SRAM_BASE
|
||
|
CONFIG_SYS_SRAM_END
|
||
|
CONFIG_SYS_SRAM_SIZE
|
||
|
CONFIG_SYS_SRAM_START
|
||
|
CONFIG_SYS_SRGPL0_CFG_BAR
|
||
|
CONFIG_SYS_SRGPL0_MNT_BAR
|
||
|
CONFIG_SYS_SRGPL0_MSG_BAR
|
||
|
CONFIG_SYS_SRGPL0_REG_BAR
|
||
|
CONFIG_SYS_SRIO
|
||
|
CONFIG_SYS_SRIO1_MEM_BASE
|
||
|
CONFIG_SYS_SRIO1_MEM_BUS
|
||
|
CONFIG_SYS_SRIO1_MEM_PHYS
|
||
|
CONFIG_SYS_SRIO1_MEM_PHYS_HIGH
|
||
|
CONFIG_SYS_SRIO1_MEM_PHYS_LOW
|
||
|
CONFIG_SYS_SRIO1_MEM_SIZE
|
||
|
CONFIG_SYS_SRIO1_MEM_VIRT
|
||
|
CONFIG_SYS_SRIO2_MEM_PHYS
|
||
|
CONFIG_SYS_SRIO2_MEM_SIZE
|
||
|
CONFIG_SYS_SRIO2_MEM_VIRT
|
||
|
CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR
|
||
|
CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS
|
||
|
CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR
|
||
|
CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS
|
||
|
CONFIG_SYS_SSD_BASE
|
||
|
CONFIG_SYS_SSD_BASE_PHYS
|
||
|
CONFIG_SYS_SST_SECT
|
||
|
CONFIG_SYS_SST_SECTSZ
|
||
|
CONFIG_SYS_STACKSIZE
|
||
|
CONFIG_SYS_STACK_LENGTH
|
||
|
CONFIG_SYS_STACK_SIZE
|
||
|
CONFIG_SYS_STATUS_C
|
||
|
CONFIG_SYS_STATUS_OK
|
||
|
CONFIG_SYS_STMICRO_BOOT
|
||
|
CONFIG_SYS_SUPPORT_64BIT_DATA
|
||
|
CONFIG_SYS_SXCNFG_VAL
|
||
|
CONFIG_SYS_SYPCR
|
||
|
CONFIG_SYS_SYSTEMACE_BASE
|
||
|
CONFIG_SYS_SYSTEMACE_WIDTH
|
||
|
CONFIG_SYS_TBIPA_VALUE
|
||
|
CONFIG_SYS_TBSCR
|
||
|
CONFIG_SYS_TCLK
|
||
|
CONFIG_SYS_TEMP_STACK_OCM
|
||
|
CONFIG_SYS_TEXT_ADDR
|
||
|
CONFIG_SYS_TEXT_BASE_NOR
|
||
|
CONFIG_SYS_TEXT_BASE_SPL
|
||
|
CONFIG_SYS_TFP410_ADDR
|
||
|
CONFIG_SYS_TFP410_BUS
|
||
|
CONFIG_SYS_THUMB_BUILD
|
||
|
CONFIG_SYS_TIMERBASE
|
||
|
CONFIG_SYS_TIMER_BASE
|
||
|
CONFIG_SYS_TIMER_COUNTER
|
||
|
CONFIG_SYS_TIMER_COUNTS_DOWN
|
||
|
CONFIG_SYS_TIMER_PRESCALER
|
||
|
CONFIG_SYS_TIMER_RATE
|
||
|
CONFIG_SYS_TLB_FOR_BOOT_FLASH
|
||
|
CONFIG_SYS_TMCNTSC
|
||
|
CONFIG_SYS_TMPVIRT
|
||
|
CONFIG_SYS_TMRINTR_MASK
|
||
|
CONFIG_SYS_TMRINTR_NO
|
||
|
CONFIG_SYS_TMRINTR_PEND
|
||
|
CONFIG_SYS_TMRINTR_PRI
|
||
|
CONFIG_SYS_TMRPND_REG
|
||
|
CONFIG_SYS_TMR_BASE
|
||
|
CONFIG_SYS_TMU_CLK_DIV
|
||
|
CONFIG_SYS_TSEC1
|
||
|
CONFIG_SYS_TSEC1_OFFSET
|
||
|
CONFIG_SYS_TSEC2
|
||
|
CONFIG_SYS_TSEC2_OFFSET
|
||
|
CONFIG_SYS_TSEC3_OFFSET
|
||
|
CONFIG_SYS_TX_ETH_BUFFER
|
||
|
CONFIG_SYS_UART1_ALT1_GPIO
|
||
|
CONFIG_SYS_UART1_PRI_GPIO
|
||
|
CONFIG_SYS_UART2_ALT1_GPIO
|
||
|
CONFIG_SYS_UART2_ALT3_GPIO
|
||
|
CONFIG_SYS_UART2_PRI_GPIO
|
||
|
CONFIG_SYS_UART_BASE
|
||
|
CONFIG_SYS_UART_BAUD
|
||
|
CONFIG_SYS_UART_FREQ
|
||
|
CONFIG_SYS_UART_PORT
|
||
|
CONFIG_SYS_UBOOT_BASE
|
||
|
CONFIG_SYS_UBOOT_END
|
||
|
CONFIG_SYS_UBOOT_START
|
||
|
CONFIG_SYS_UCC_RGMII_MODE
|
||
|
CONFIG_SYS_UCC_RMII_MODE
|
||
|
CONFIG_SYS_UDELAY_BASE
|
||
|
CONFIG_SYS_UEC
|
||
|
CONFIG_SYS_UEC1_ETH_TYPE
|
||
|
CONFIG_SYS_UEC1_INTERFACE_SPEED
|
||
|
CONFIG_SYS_UEC1_INTERFACE_TYPE
|
||
|
CONFIG_SYS_UEC1_PHY_ADDR
|
||
|
CONFIG_SYS_UEC1_RX_CLK
|
||
|
CONFIG_SYS_UEC1_TX_CLK
|
||
|
CONFIG_SYS_UEC1_UCC_NUM
|
||
|
CONFIG_SYS_UEC2_ETH_TYPE
|
||
|
CONFIG_SYS_UEC2_INTERFACE_SPEED
|
||
|
CONFIG_SYS_UEC2_INTERFACE_TYPE
|
||
|
CONFIG_SYS_UEC2_PHY_ADDR
|
||
|
CONFIG_SYS_UEC2_RX_CLK
|
||
|
CONFIG_SYS_UEC2_TX_CLK
|
||
|
CONFIG_SYS_UEC2_UCC_NUM
|
||
|
CONFIG_SYS_UEC3_ETH_TYPE
|
||
|
CONFIG_SYS_UEC3_INTERFACE_SPEED
|
||
|
CONFIG_SYS_UEC3_INTERFACE_TYPE
|
||
|
CONFIG_SYS_UEC3_PHY_ADDR
|
||
|
CONFIG_SYS_UEC3_RX_CLK
|
||
|
CONFIG_SYS_UEC3_TX_CLK
|
||
|
CONFIG_SYS_UEC3_UCC_NUM
|
||
|
CONFIG_SYS_UEC4_ETH_TYPE
|
||
|
CONFIG_SYS_UEC4_INTERFACE_SPEED
|
||
|
CONFIG_SYS_UEC4_INTERFACE_TYPE
|
||
|
CONFIG_SYS_UEC4_PHY_ADDR
|
||
|
CONFIG_SYS_UEC4_RX_CLK
|
||
|
CONFIG_SYS_UEC4_TX_CLK
|
||
|
CONFIG_SYS_UEC4_UCC_NUM
|
||
|
CONFIG_SYS_UEC5_ETH_TYPE
|
||
|
CONFIG_SYS_UEC5_INTERFACE_SPEED
|
||
|
CONFIG_SYS_UEC5_INTERFACE_TYPE
|
||
|
CONFIG_SYS_UEC5_PHY_ADDR
|
||
|
CONFIG_SYS_UEC5_RX_CLK
|
||
|
CONFIG_SYS_UEC5_TX_CLK
|
||
|
CONFIG_SYS_UEC5_UCC_NUM
|
||
|
CONFIG_SYS_UEC6_ETH_TYPE
|
||
|
CONFIG_SYS_UEC6_INTERFACE_SPEED
|
||
|
CONFIG_SYS_UEC6_INTERFACE_TYPE
|
||
|
CONFIG_SYS_UEC6_PHY_ADDR
|
||
|
CONFIG_SYS_UEC6_RX_CLK
|
||
|
CONFIG_SYS_UEC6_TX_CLK
|
||
|
CONFIG_SYS_UEC6_UCC_NUM
|
||
|
CONFIG_SYS_UEC8_ETH_TYPE
|
||
|
CONFIG_SYS_UEC8_INTERFACE_SPEED
|
||
|
CONFIG_SYS_UEC8_INTERFACE_TYPE
|
||
|
CONFIG_SYS_UEC8_PHY_ADDR
|
||
|
CONFIG_SYS_UEC8_RX_CLK
|
||
|
CONFIG_SYS_UEC8_TX_CLK
|
||
|
CONFIG_SYS_UEC8_UCC_NUM
|
||
|
CONFIG_SYS_UECx_PHY_ADDR
|
||
|
CONFIG_SYS_UHC0_EHCI_BASE
|
||
|
CONFIG_SYS_UHC1_EHCI_BASE
|
||
|
CONFIG_SYS_ULB_CLK
|
||
|
CONFIG_SYS_UMCR
|
||
|
CONFIG_SYS_UNIFY_CACHE
|
||
|
CONFIG_SYS_UNSPEC_PHYID
|
||
|
CONFIG_SYS_UNSPEC_STRID
|
||
|
CONFIG_SYS_UPDATE_FLASH_SIZE
|
||
|
CONFIG_SYS_USB2D0_BASE
|
||
|
CONFIG_SYS_USBCTRL
|
||
|
CONFIG_SYS_USBD_BASE
|
||
|
CONFIG_SYS_USB_BRGCLK
|
||
|
CONFIG_SYS_USB_DEVICE
|
||
|
CONFIG_SYS_USB_EHCI_CPU_INIT
|
||
|
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
|
||
|
CONFIG_SYS_USB_EHCI_REGS_BASE
|
||
|
CONFIG_SYS_USB_EVENT_POLL
|
||
|
CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
|
||
|
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
|
||
|
CONFIG_SYS_USB_FAT_BOOT_PARTITION
|
||
|
CONFIG_SYS_USB_HOST
|
||
|
CONFIG_SYS_USB_OHCI_BOARD_INIT
|
||
|
CONFIG_SYS_USB_OHCI_CPU_INIT
|
||
|
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
|
||
|
CONFIG_SYS_USB_OHCI_REGS_BASE
|
||
|
CONFIG_SYS_USB_OHCI_SLOT_NAME
|
||
|
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS
|
||
|
CONFIG_SYS_USER_SWITCHES_BASE
|
||
|
CONFIG_SYS_USE_BOOT_NORFLASH
|
||
|
CONFIG_SYS_USE_DATAFLASH
|
||
|
CONFIG_SYS_USE_DATAFLASH_CS0
|
||
|
CONFIG_SYS_USE_DATAFLASH_CS1
|
||
|
CONFIG_SYS_USE_DATAFLASH_CS3
|
||
|
CONFIG_SYS_USE_DSPLINK
|
||
|
CONFIG_SYS_USE_FLASH
|
||
|
CONFIG_SYS_USE_MAIN_OSCILLATOR
|
||
|
CONFIG_SYS_USE_MMC
|
||
|
CONFIG_SYS_USE_MPC834XSYS_USB_PHY
|
||
|
CONFIG_SYS_USE_NAND
|
||
|
CONFIG_SYS_USE_NANDFLASH
|
||
|
CONFIG_SYS_USE_NOR
|
||
|
CONFIG_SYS_USE_NORFLASH
|
||
|
CONFIG_SYS_USE_PPCENV
|
||
|
CONFIG_SYS_USE_SERIALFLASH
|
||
|
CONFIG_SYS_USE_SPIFLASH
|
||
|
CONFIG_SYS_USE_UBI
|
||
|
CONFIG_SYS_USR_EXCEP
|
||
|
CONFIG_SYS_U_BOOT_OFFS
|
||
|
CONFIG_SYS_VA_BITS
|
||
|
CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR
|
||
|
CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN
|
||
|
CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT
|
||
|
CONFIG_SYS_VCXK_AUTODETECT
|
||
|
CONFIG_SYS_VCXK_BASE
|
||
|
CONFIG_SYS_VCXK_DEFAULT_LINEALIGN
|
||
|
CONFIG_SYS_VCXK_DOUBLEBUFFERED
|
||
|
CONFIG_SYS_VCXK_ENABLE_DDR
|
||
|
CONFIG_SYS_VCXK_ENABLE_PIN
|
||
|
CONFIG_SYS_VCXK_ENABLE_PORT
|
||
|
CONFIG_SYS_VCXK_INVERT_DDR
|
||
|
CONFIG_SYS_VCXK_INVERT_PIN
|
||
|
CONFIG_SYS_VCXK_INVERT_PORT
|
||
|
CONFIG_SYS_VCXK_REQUEST_DDR
|
||
|
CONFIG_SYS_VCXK_REQUEST_PIN
|
||
|
CONFIG_SYS_VCXK_REQUEST_PORT
|
||
|
CONFIG_SYS_VCXK_RESET_DDR
|
||
|
CONFIG_SYS_VCXK_RESET_PIN
|
||
|
CONFIG_SYS_VCXK_RESET_PORT
|
||
|
CONFIG_SYS_VGA_RAM_EN
|
||
|
CONFIG_SYS_VIDEO
|
||
|
CONFIG_SYS_VIDEO_LOGO_MAX_SIZE
|
||
|
CONFIG_SYS_VPC3_BASE
|
||
|
CONFIG_SYS_VPC3_SIZE
|
||
|
CONFIG_SYS_VSC7385_BASE
|
||
|
CONFIG_SYS_VSC7385_BASE_PHYS
|
||
|
CONFIG_SYS_VSC7385_BR_PRELIM
|
||
|
CONFIG_SYS_VSC7385_OR_PRELIM
|
||
|
CONFIG_SYS_VSC7385_SIZE
|
||
|
CONFIG_SYS_VXWORKS_MAC_PTR
|
||
|
CONFIG_SYS_WATCHDOG_FLAGS_ADDR
|
||
|
CONFIG_SYS_WATCHDOG_FREQ
|
||
|
CONFIG_SYS_WATCHDOG_MAGIC
|
||
|
CONFIG_SYS_WATCHDOG_MAGIC_MASK
|
||
|
CONFIG_SYS_WATCHDOG_TIME_ADDR
|
||
|
CONFIG_SYS_WATCHDOG_VALUE
|
||
|
CONFIG_SYS_WDTC_WDMR_VAL
|
||
|
CONFIG_SYS_WDTTIMERBASE
|
||
|
CONFIG_SYS_WDT_PERIOD_HIGH
|
||
|
CONFIG_SYS_WDT_PERIOD_LOW
|
||
|
CONFIG_SYS_WHITE_ON_BLACK
|
||
|
CONFIG_SYS_WINDOW1_BASE
|
||
|
CONFIG_SYS_WRITE_SWAPPED_DATA
|
||
|
CONFIG_SYS_XHCI_USB1_ADDR
|
||
|
CONFIG_SYS_XHCI_USB2_ADDR
|
||
|
CONFIG_SYS_XHCI_USB3_ADDR
|
||
|
CONFIG_SYS_XILINX_SPI_LIST
|
||
|
CONFIG_SYS_XIMG_LEN
|
||
|
CONFIG_SYS_XLB_PIPELINING
|
||
|
CONFIG_SYS_XSVF_DEFAULT_ADDR
|
||
|
CONFIG_SYS_XWAY_EBU_BOOTCFG
|
||
|
CONFIG_SYS_ZYNQ_QSPI_WAIT
|
||
|
CONFIG_SYS_ZYNQ_SPI_WAIT
|
||
|
CONFIG_SYS_i2C_FSL
|
||
|
CONFIG_TAM3517_SETTINGS
|
||
|
CONFIG_TAM3517_SW3_SETTINGS
|
||
|
CONFIG_TCA642X
|
||
|
CONFIG_TEGRA_BOARD_STRING
|
||
|
CONFIG_TEGRA_CLOCK_SCALING
|
||
|
CONFIG_TEGRA_ENABLE_UARTA
|
||
|
CONFIG_TEGRA_ENABLE_UARTB
|
||
|
CONFIG_TEGRA_ENABLE_UARTC
|
||
|
CONFIG_TEGRA_ENABLE_UARTD
|
||
|
CONFIG_TEGRA_ENABLE_UARTE
|
||
|
CONFIG_TEGRA_GPU
|
||
|
CONFIG_TEGRA_KEYBOARD
|
||
|
CONFIG_TEGRA_LP0
|
||
|
CONFIG_TEGRA_MMC
|
||
|
CONFIG_TEGRA_NAND
|
||
|
CONFIG_TEGRA_PMU
|
||
|
CONFIG_TEGRA_SLINK_CTRLS
|
||
|
CONFIG_TEGRA_SPI
|
||
|
CONFIG_TEGRA_UARTA_GPU
|
||
|
CONFIG_TEGRA_UARTA_SDIO1
|
||
|
CONFIG_TEGRA_UARTA_UAA_UAB
|
||
|
CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3
|
||
|
CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1
|
||
|
CONFIG_TESTPIN_MASK
|
||
|
CONFIG_TESTPIN_REG
|
||
|
CONFIG_TEST_LIST_SORT
|
||
|
CONFIG_TFP410_I2C_ADDR
|
||
|
CONFIG_TFTP_BLOCKSIZE
|
||
|
CONFIG_TFTP_FILE_NAME_MAX_LEN
|
||
|
CONFIG_TFTP_PORT
|
||
|
CONFIG_TFTP_TSIZE
|
||
|
CONFIG_THOR_RESET_OFF
|
||
|
CONFIG_THUMB2_KERNEL
|
||
|
CONFIG_THUNDERX
|
||
|
CONFIG_TI814X
|
||
|
CONFIG_TI816X
|
||
|
CONFIG_TI816X_DDR_PLL_796
|
||
|
CONFIG_TI816X_EVM_DDR2
|
||
|
CONFIG_TI816X_EVM_DDR3
|
||
|
CONFIG_TI816X_USE_EMIF0
|
||
|
CONFIG_TI816X_USE_EMIF1
|
||
|
CONFIG_TI81XX
|
||
|
CONFIG_TIMER_CLK_FREQ
|
||
|
CONFIG_TIMESTAMP
|
||
|
CONFIG_TIZEN
|
||
|
CONFIG_TI_KEYSTONE_SERDES
|
||
|
CONFIG_TI_KSNAV
|
||
|
CONFIG_TI_SPI_MMAP
|
||
|
CONFIG_TMU_CMD_DTT
|
||
|
CONFIG_TMU_TIMER
|
||
|
CONFIG_TOTAL5200
|
||
|
CONFIG_TPL_DRIVERS_MISC_SUPPORT
|
||
|
CONFIG_TPL_PAD_TO
|
||
|
CONFIG_TPM_TIS_BASE_ADDRESS
|
||
|
CONFIG_TPS6586X_POWER
|
||
|
CONFIG_TQM5200
|
||
|
CONFIG_TQM5200S
|
||
|
CONFIG_TQM5200_B
|
||
|
CONFIG_TQM5200_REV100
|
||
|
CONFIG_TQM823L
|
||
|
CONFIG_TQM823M
|
||
|
CONFIG_TQM834X
|
||
|
CONFIG_TQM850L
|
||
|
CONFIG_TQM850M
|
||
|
CONFIG_TQM855L
|
||
|
CONFIG_TQM855M
|
||
|
CONFIG_TQM860L
|
||
|
CONFIG_TQM860M
|
||
|
CONFIG_TQM862L
|
||
|
CONFIG_TQM862M
|
||
|
CONFIG_TQM866M
|
||
|
CONFIG_TQM885D
|
||
|
CONFIG_TQM8xxL
|
||
|
CONFIG_TQM8xxM
|
||
|
CONFIG_TRACE
|
||
|
CONFIG_TRACE_BUFFER_SIZE
|
||
|
CONFIG_TRACE_EARLY
|
||
|
CONFIG_TRACE_EARLY_ADDR
|
||
|
CONFIG_TRACE_EARLY_SIZE
|
||
|
CONFIG_TRAILBLAZER
|
||
|
CONFIG_TRATS
|
||
|
CONFIG_TSEC
|
||
|
CONFIG_TSEC1
|
||
|
CONFIG_TSEC1_NAME
|
||
|
CONFIG_TSEC2
|
||
|
CONFIG_TSEC2_NAME
|
||
|
CONFIG_TSEC3
|
||
|
CONFIG_TSEC3_NAME
|
||
|
CONFIG_TSEC4
|
||
|
CONFIG_TSEC4_NAME
|
||
|
CONFIG_TSECV2
|
||
|
CONFIG_TSECV2_1
|
||
|
CONFIG_TSEC_ENET
|
||
|
CONFIG_TSEC_TBI
|
||
|
CONFIG_TSEC_TBICR_SETTINGS
|
||
|
CONFIG_TSI108_ETH_NUM_PORTS
|
||
|
CONFIG_TSIM
|
||
|
CONFIG_TUGE1
|
||
|
CONFIG_TULIP
|
||
|
CONFIG_TULIP_FIX_DAVICOM
|
||
|
CONFIG_TULIP_SELECT_MEDIA
|
||
|
CONFIG_TULIP_USE_IO
|
||
|
CONFIG_TUXX1
|
||
|
CONFIG_TWL4030_INPUT
|
||
|
CONFIG_TWL4030_KEYPAD
|
||
|
CONFIG_TWL4030_LED
|
||
|
CONFIG_TWL4030_POWER
|
||
|
CONFIG_TWL4030_PWM
|
||
|
CONFIG_TWL4030_USB
|
||
|
CONFIG_TWL6030_INPUT
|
||
|
CONFIG_TWL6030_POWER
|
||
|
CONFIG_TWR
|
||
|
CONFIG_TWR_P1025
|
||
|
CONFIG_TX_DESCR_NUM
|
||
|
CONFIG_TZSW_RESERVED_DRAM_SIZE
|
||
|
CONFIG_T_SH7706LSR
|
||
|
CONFIG_UART_BASE
|
||
|
CONFIG_UART_BR_PRELIM
|
||
|
CONFIG_UART_CONSOLE
|
||
|
CONFIG_UART_CONSOLE_IS_JTAG
|
||
|
CONFIG_UART_MEM
|
||
|
CONFIG_UART_OR_PRELIM
|
||
|
CONFIG_UBIBLOCK
|
||
|
CONFIG_UBIFS_SILENCE_MSG
|
||
|
CONFIG_UBIFS_VOLUME
|
||
|
CONFIG_UBI_PART
|
||
|
CONFIG_UBI_SILENCE_MSG
|
||
|
CONFIG_UBI_SIZE
|
||
|
CONFIG_UBOOT1_ENV_ADDR
|
||
|
CONFIG_UBOOT2_ENV_ADDR
|
||
|
CONFIG_UBOOTPATH
|
||
|
CONFIG_UBOOT_ENABLE_PADS_ALL
|
||
|
CONFIG_UBOOT_ENV_ADDR
|
||
|
CONFIG_UBOOT_SECTOR_COUNT
|
||
|
CONFIG_UBOOT_SECTOR_START
|
||
|
CONFIG_UCP1020
|
||
|
CONFIG_UCP1020_REV_1_3
|
||
|
CONFIG_UDP_CHECKSUM
|
||
|
CONFIG_UEC_ETH
|
||
|
CONFIG_UEC_ETH1
|
||
|
CONFIG_UEC_ETH2
|
||
|
CONFIG_UEC_ETH3
|
||
|
CONFIG_UEC_ETH4
|
||
|
CONFIG_UEC_ETH5
|
||
|
CONFIG_UEC_ETH6
|
||
|
CONFIG_UEC_ETH7
|
||
|
CONFIG_UEC_ETH8
|
||
|
CONFIG_UID16
|
||
|
CONFIG_ULI526X
|
||
|
CONFIG_ULPI_REF_CLK
|
||
|
CONFIG_UMSDEVS
|
||
|
CONFIG_UNIPHIER_ETH
|
||
|
CONFIG_UPDATEB
|
||
|
CONFIG_UPDATE_LOAD_ADDR
|
||
|
CONFIG_UPDATE_TFTP
|
||
|
CONFIG_UPDATE_TFTP_CNT_MAX
|
||
|
CONFIG_UPDATE_TFTP_MSEC_MAX
|
||
|
CONFIG_USART1
|
||
|
CONFIG_USART3
|
||
|
CONFIG_USART_BASE
|
||
|
CONFIG_USART_ID
|
||
|
CONFIG_USBBOOTCOMMAND
|
||
|
CONFIG_USBDEBUG
|
||
|
CONFIG_USBD_CONFIGURATION_STR
|
||
|
CONFIG_USBD_CTRL_INTERFACE_STR
|
||
|
CONFIG_USBD_DATA_INTERFACE_STR
|
||
|
CONFIG_USBD_HS
|
||
|
CONFIG_USBD_MANUFACTURER
|
||
|
CONFIG_USBD_PRODUCTID
|
||
|
CONFIG_USBD_PRODUCTID_CDCACM
|
||
|
CONFIG_USBD_PRODUCTID_GSERIAL
|
||
|
CONFIG_USBD_PRODUCT_NAME
|
||
|
CONFIG_USBD_SERIAL_BULK_HS_PKTSIZE
|
||
|
CONFIG_USBD_SERIAL_BULK_PKTSIZE
|
||
|
CONFIG_USBD_SERIAL_INT_ENDPOINT
|
||
|
CONFIG_USBD_SERIAL_INT_PKTSIZE
|
||
|
CONFIG_USBD_SERIAL_IN_ENDPOINT
|
||
|
CONFIG_USBD_SERIAL_IN_PKTSIZE
|
||
|
CONFIG_USBD_SERIAL_OUT_ENDPOINT
|
||
|
CONFIG_USBD_SERIAL_OUT_PKTSIZE
|
||
|
CONFIG_USBD_VENDORID
|
||
|
CONFIG_USBID_ADDR
|
||
|
CONFIG_USBNET_DEV_ADDR
|
||
|
CONFIG_USBNET_HOST_ADDR
|
||
|
CONFIG_USBNET_MANUFACTURER
|
||
|
CONFIG_USBTTY
|
||
|
CONFIG_USB_AM35X
|
||
|
CONFIG_USB_ATMEL
|
||
|
CONFIG_USB_ATMEL_CLK_SEL_PLLB
|
||
|
CONFIG_USB_ATMEL_CLK_SEL_UPLL
|
||
|
CONFIG_USB_BIN_FIXUP
|
||
|
CONFIG_USB_BLACKFIN
|
||
|
CONFIG_USB_BLACKFIN_CLKIN
|
||
|
CONFIG_USB_BOOTING
|
||
|
CONFIG_USB_CABLE_CHECK
|
||
|
CONFIG_USB_CLOCK
|
||
|
CONFIG_USB_CONFIG
|
||
|
CONFIG_USB_DEVICE
|
||
|
CONFIG_USB_DEV_BASE
|
||
|
CONFIG_USB_DEV_PULLUP_GPIO
|
||
|
CONFIG_USB_DWC2
|
||
|
CONFIG_USB_DWC2_REG_ADDR
|
||
|
CONFIG_USB_EHCI_ARMADA100
|
||
|
CONFIG_USB_EHCI_BASE
|
||
|
CONFIG_USB_EHCI_BASE_LIST
|
||
|
CONFIG_USB_EHCI_EXYNOS
|
||
|
CONFIG_USB_EHCI_FARADAY
|
||
|
CONFIG_USB_EHCI_FSL
|
||
|
CONFIG_USB_EHCI_KIRKWOOD
|
||
|
CONFIG_USB_EHCI_MX5
|
||
|
CONFIG_USB_EHCI_MXC
|
||
|
CONFIG_USB_EHCI_MXS
|
||
|
CONFIG_USB_EHCI_OMAP
|
||
|
CONFIG_USB_EHCI_PCI
|
||
|
CONFIG_USB_EHCI_PPC4XX
|
||
|
CONFIG_USB_EHCI_RMOBILE
|
||
|
CONFIG_USB_EHCI_SPEAR
|
||
|
CONFIG_USB_EHCI_SUNXI
|
||
|
CONFIG_USB_EHCI_TEGRA
|
||
|
CONFIG_USB_EHCI_TXFIFO_THRESH
|
||
|
CONFIG_USB_EHCI_VCT
|
||
|
CONFIG_USB_EHCI_VF
|
||
|
CONFIG_USB_ETHER
|
||
|
CONFIG_USB_ETHER_ASIX
|
||
|
CONFIG_USB_ETHER_ASIX88179
|
||
|
CONFIG_USB_ETHER_DM9601
|
||
|
CONFIG_USB_ETHER_MCS7830
|
||
|
CONFIG_USB_ETHER_RNDIS
|
||
|
CONFIG_USB_ETHER_RTL8152
|
||
|
CONFIG_USB_ETHER_SMSC95XX
|
||
|
CONFIG_USB_ETHER_xxx
|
||
|
CONFIG_USB_ETH_CDC
|
||
|
CONFIG_USB_ETH_QMULT
|
||
|
CONFIG_USB_ETH_RNDIS
|
||
|
CONFIG_USB_ETH_SUBSET
|
||
|
CONFIG_USB_EXT2_BOOT
|
||
|
CONFIG_USB_FAT_BOOT
|
||
|
CONFIG_USB_FREQ
|
||
|
CONFIG_USB_FUNCTION_MASS_STORAGE
|
||
|
CONFIG_USB_FUNCTION_THOR
|
||
|
CONFIG_USB_GADGET_AMD5536UDC
|
||
|
CONFIG_USB_GADGET_AT91
|
||
|
CONFIG_USB_GADGET_AU1X00
|
||
|
CONFIG_USB_GADGET_DUMMY_HCD
|
||
|
CONFIG_USB_GADGET_DWC2_OTG_PHY
|
||
|
CONFIG_USB_GADGET_FOTG210
|
||
|
CONFIG_USB_GADGET_FSL_USB2
|
||
|
CONFIG_USB_GADGET_GOKU
|
||
|
CONFIG_USB_GADGET_IMX
|
||
|
CONFIG_USB_GADGET_M66592
|
||
|
CONFIG_USB_GADGET_MASS_STORAGE
|
||
|
CONFIG_USB_GADGET_MPC8272
|
||
|
CONFIG_USB_GADGET_MQ11XX
|
||
|
CONFIG_USB_GADGET_MUSBHSFC
|
||
|
CONFIG_USB_GADGET_N9604
|
||
|
CONFIG_USB_GADGET_NET2280
|
||
|
CONFIG_USB_GADGET_OMAP
|
||
|
CONFIG_USB_GADGET_PXA27X
|
||
|
CONFIG_USB_GADGET_PXA2XX
|
||
|
CONFIG_USB_GADGET_S3C2410
|
||
|
CONFIG_USB_GADGET_SA1100
|
||
|
CONFIG_USB_GADGET_SUPERH
|
||
|
CONFIG_USB_GADGET_SX2
|
||
|
CONFIG_USB_HOST_ETHER
|
||
|
CONFIG_USB_HOST_XHCI_BASE
|
||
|
CONFIG_USB_INVENTRA_DMA
|
||
|
CONFIG_USB_ISP1301_I2C_ADDR
|
||
|
CONFIG_USB_MAX_CONTROLLER_COUNT
|
||
|
CONFIG_USB_MUSB_AM35X
|
||
|
CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT
|
||
|
CONFIG_USB_MUSB_DSPS
|
||
|
CONFIG_USB_MUSB_HCD
|
||
|
CONFIG_USB_MUSB_OMAP2PLUS
|
||
|
CONFIG_USB_MUSB_PIO_ONLY
|
||
|
CONFIG_USB_MUSB_TIMEOUT
|
||
|
CONFIG_USB_MUSB_TUSB6010
|
||
|
CONFIG_USB_MUSB_UDC
|
||
|
CONFIG_USB_MUSB_UDD
|
||
|
CONFIG_USB_OHCI
|
||
|
CONFIG_USB_OHCI_EP93XX
|
||
|
CONFIG_USB_OHCI_LPC32XX
|
||
|
CONFIG_USB_OHCI_NEW
|
||
|
CONFIG_USB_OHCI_SUNXI
|
||
|
CONFIG_USB_OMAP3
|
||
|
CONFIG_USB_OTG
|
||
|
CONFIG_USB_OTG_BLACKLIST_HUB
|
||
|
CONFIG_USB_PHY_CFG_BASE
|
||
|
CONFIG_USB_PHY_TYPE
|
||
|
CONFIG_USB_PXA25X_SMALL
|
||
|
CONFIG_USB_R8A66597_HCD
|
||
|
CONFIG_USB_SERIALNO
|
||
|
CONFIG_USB_SS_BASE
|
||
|
CONFIG_USB_TI_CPPI_DMA
|
||
|
CONFIG_USB_TTY
|
||
|
CONFIG_USB_TUSB_OMAP_DMA
|
||
|
CONFIG_USB_UHCI
|
||
|
CONFIG_USB_ULPI_TIMEOUT
|
||
|
CONFIG_USB_XHCI_EXYNOS
|
||
|
CONFIG_USB_XHCI_FSL
|
||
|
CONFIG_USB_XHCI_KEYSTONE
|
||
|
CONFIG_USB_XHCI_OMAP
|
||
|
CONFIG_USB_XHCI_PCI
|
||
|
CONFIG_USER_LOWLEVEL_INIT
|
||
|
CONFIG_USE_FDT
|
||
|
CONFIG_USE_INTERRUPT
|
||
|
CONFIG_USE_IRQ
|
||
|
CONFIG_USE_NAND
|
||
|
CONFIG_USE_NETDEV
|
||
|
CONFIG_USE_NOR
|
||
|
CONFIG_USE_ONENAND_BOARD_INIT
|
||
|
CONFIG_USE_SPIFLASH
|
||
|
CONFIG_USE_STDINT
|
||
|
CONFIG_USE_TTY
|
||
|
CONFIG_UTBIPAR_INIT_TBIPA
|
||
|
CONFIG_U_BOOT_HDR_ADDR
|
||
|
CONFIG_U_BOOT_HDR_SIZE
|
||
|
CONFIG_U_QE
|
||
|
CONFIG_V38B
|
||
|
CONFIG_VAL
|
||
|
CONFIG_VAR_SIZE_SPL
|
||
|
CONFIG_VCO_HZ
|
||
|
CONFIG_VCO_MULT
|
||
|
CONFIG_VCT_NOR
|
||
|
CONFIG_VE8313
|
||
|
CONFIG_VERY_BIG_RAM
|
||
|
CONFIG_VEXPRESS_EXTENDED_MEMORY_MAP
|
||
|
CONFIG_VEXPRESS_ORIGINAL_MEMORY_MAP
|
||
|
CONFIG_VF610
|
||
|
CONFIG_VID
|
||
|
CONFIG_VIDEO_BCM2835
|
||
|
CONFIG_VIDEO_BMP_GZIP
|
||
|
CONFIG_VIDEO_BMP_LOGO
|
||
|
CONFIG_VIDEO_BMP_RLE8
|
||
|
CONFIG_VIDEO_CORALP
|
||
|
CONFIG_VIDEO_DA8XX
|
||
|
CONFIG_VIDEO_DT_SIMPLEFB
|
||
|
CONFIG_VIDEO_FONT_4X6
|
||
|
CONFIG_VIDEO_LCD_I2C_BUS
|
||
|
CONFIG_VIDEO_LOGO
|
||
|
CONFIG_VIDEO_MB862xx
|
||
|
CONFIG_VIDEO_MB862xx_ACCEL
|
||
|
CONFIG_VIDEO_MX3
|
||
|
CONFIG_VIDEO_MXS
|
||
|
CONFIG_VIDEO_MXS_MODE_SYSTEM
|
||
|
CONFIG_VIDEO_OMAP3
|
||
|
CONFIG_VIDEO_ONBOARD
|
||
|
CONFIG_VIDEO_SM501
|
||
|
CONFIG_VIDEO_SM501_16BPP
|
||
|
CONFIG_VIDEO_SM501_32BPP
|
||
|
CONFIG_VIDEO_SM501_8BPP
|
||
|
CONFIG_VIDEO_SM501_PCI
|
||
|
CONFIG_VIDEO_STD_TIMINGS
|
||
|
CONFIG_VIDEO_SUNXI
|
||
|
CONFIG_VIDEO_VCXK
|
||
|
CONFIG_VID_FLS_ENV
|
||
|
CONFIG_VM86
|
||
|
CONFIG_VME8349
|
||
|
CONFIG_VOIPAC_LCD
|
||
|
CONFIG_VOL_MONITOR_INA220
|
||
|
CONFIG_VOL_MONITOR_IR36021_READ
|
||
|
CONFIG_VOL_MONITOR_IR36021_SET
|
||
|
CONFIG_VOM405
|
||
|
CONFIG_VR_CTL_CLKBUF
|
||
|
CONFIG_VR_CTL_FREQ
|
||
|
CONFIG_VR_CTL_VAL
|
||
|
CONFIG_VR_CTL_VLEV
|
||
|
CONFIG_VSC7385_ENET
|
||
|
CONFIG_VSC7385_IMAGE
|
||
|
CONFIG_VSC7385_IMAGE_SIZE
|
||
|
CONFIG_VSC9953
|
||
|
CONFIG_VSC_CROSSBAR
|
||
|
CONFIG_WALNUT
|
||
|
CONFIG_WATCHDOG
|
||
|
CONFIG_WATCHDOG_BASEADDR
|
||
|
CONFIG_WATCHDOG_IRQ
|
||
|
CONFIG_WATCHDOG_NOWAYOUT
|
||
|
CONFIG_WATCHDOG_PRESC
|
||
|
CONFIG_WATCHDOG_RC
|
||
|
CONFIG_WATCHDOG_TIMEOUT
|
||
|
CONFIG_WATCHDOG_TIMEOUT_MSECS
|
||
|
CONFIG_WDOG_GPIO_PIN
|
||
|
CONFIG_WD_MAX_RATE
|
||
|
CONFIG_WD_PERIOD
|
||
|
CONFIG_X600
|
||
|
CONFIG_X86EMU_DEBUG
|
||
|
CONFIG_X86EMU_RAW_IO
|
||
|
CONFIG_X86_64
|
||
|
CONFIG_X86_BSWAP
|
||
|
CONFIG_X86_MRC_ADDR
|
||
|
CONFIG_X86_REFCODE_ADDR
|
||
|
CONFIG_X86_REFCODE_RUN_ADDR
|
||
|
CONFIG_XGI_XG22_BASE
|
||
|
CONFIG_XILINX_405
|
||
|
CONFIG_XILINX_440
|
||
|
CONFIG_XILINX_GPIO
|
||
|
CONFIG_XILINX_LL_TEMAC
|
||
|
CONFIG_XILINX_LL_TEMAC_CLK
|
||
|
CONFIG_XILINX_PPC440_GENERIC
|
||
|
CONFIG_XILINX_SPI_IDLE_VAL
|
||
|
CONFIG_XILINX_TB_WATCHDOG
|
||
|
CONFIG_XPEDITE1000
|
||
|
CONFIG_XPEDITE5140
|
||
|
CONFIG_XPEDITE5200
|
||
|
CONFIG_XPEDITE550X
|
||
|
CONFIG_XR16L2751
|
||
|
CONFIG_XSENGINE
|
||
|
CONFIG_XTFPGA
|
||
|
CONFIG_YAFFSFS_PROVIDE_VALUES
|
||
|
CONFIG_YAFFS_AUTO_UNICODE
|
||
|
CONFIG_YAFFS_CASE_INSENSITIVE
|
||
|
CONFIG_YAFFS_DEFINES_TYPES
|
||
|
CONFIG_YAFFS_DIRECT
|
||
|
CONFIG_YAFFS_PROVIDE_DEFS
|
||
|
CONFIG_YAFFS_UNICODE
|
||
|
CONFIG_YAFFS_UTIL
|
||
|
CONFIG_YAFFS_WINCE
|
||
|
CONFIG_YELLOWSTONE
|
||
|
CONFIG_YELLOW_LED
|
||
|
CONFIG_YOSEMITE
|
||
|
CONFIG_ZBOOT_32
|
||
|
CONFIG_ZC770_XM010
|
||
|
CONFIG_ZC770_XM011
|
||
|
CONFIG_ZC770_XM012
|
||
|
CONFIG_ZC770_XM013
|
||
|
CONFIG_ZLIB
|
||
|
CONFIG_ZLT
|
||
|
CONFIG_ZM7300
|
||
|
CONFIG_ZYNQMP_EEPROM
|
||
|
CONFIG_ZYNQMP_XHCI_LIST
|
||
|
CONFIG_ZYNQ_EEPROM
|
||
|
CONFIG_ZYNQ_EEPROM_BUS
|
||
|
CONFIG_ZYNQ_GEM_EEPROM_ADDR
|
||
|
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET
|
||
|
CONFIG_ZYNQ_HISPD_BROKEN
|
||
|
CONFIG_ZYNQ_I2C0
|
||
|
CONFIG_ZYNQ_I2C1
|
||
|
CONFIG_ZYNQ_PS_CLK_FREQ
|
||
|
CONFIG_ZYNQ_SDHCI0
|
||
|
CONFIG_ZYNQ_SDHCI1
|
||
|
CONFIG_ZYNQ_SDHCI_MAX_FREQ
|
||
|
CONFIG_ZYNQ_SDHCI_MIN_FREQ
|
||
|
CONFIG_ZYNQ_SERIAL
|
||
|
CONFIG_eTSEC_MDIO_BUS
|