u-boot/arch/x86/include/asm/cmos_layout.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
 */

#ifndef __CMOS_LAYOUT_H
#define __CMOS_LAYOUT_H

/*
 * The RTC internal registers and RAM is organized as two banks of 128 bytes
 * each, called the standard and extended banks. The first 14 bytes of the
 * standard bank contain the RTC time and date information along with four
 * registers, A - D, that are used for configuration of the RTC. The extended
 * bank contains a full 128 bytes of battery backed SRAM.
 *
 * For simplicity in U-Boot we only support CMOS in the standard bank, and
 * its base address starts from offset 0x10, which leaves us 112 bytes space.
 */
#define CMOS_BASE		0x10

/*
 * The file records all offsets off CMOS_BASE that is currently used by
 * U-Boot for various reasons. It is put in such a unified place in order
 * to be consistent across platforms.
 */

/* stack address for S3 boot in a FSP configuration, 4 bytes */
#define CMOS_FSP_STACK_ADDR	CMOS_BASE

#endif /* __CMOS_LAYOUT_H */
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> 7 years ago			`/* SPDX-License-Identifier: GPL-2.0+ */`
x86: fsp: Save stack address to CMOS for next S3 boot At the end of pre-relocation phase, save the new stack address to CMOS and use it as the stack on next S3 boot for fsp_init() continuation function. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de> 8 years ago			`/*`
			`* Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>`
			`*/`

			`#ifndef __CMOS_LAYOUT_H`
			`#define __CMOS_LAYOUT_H`

			`/*`
			`* The RTC internal registers and RAM is organized as two banks of 128 bytes`
			`* each, called the standard and extended banks. The first 14 bytes of the`
			`* standard bank contain the RTC time and date information along with four`
			`* registers, A - D, that are used for configuration of the RTC. The extended`
			`* bank contains a full 128 bytes of battery backed SRAM.`
			`*`
			`* For simplicity in U-Boot we only support CMOS in the standard bank, and`
			`* its base address starts from offset 0x10, which leaves us 112 bytes space.`
			`*/`
			`#define CMOS_BASE 0x10`

			`/*`
			`* The file records all offsets off CMOS_BASE that is currently used by`
			`* U-Boot for various reasons. It is put in such a unified place in order`
			`* to be consistent across platforms.`
			`*/`

			`/* stack address for S3 boot in a FSP configuration, 4 bytes */`
			`#define CMOS_FSP_STACK_ADDR CMOS_BASE`

			`#endif /* __CMOS_LAYOUT_H */`