upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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42 lines
614 B
42 lines
614 B
17 years ago
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/* Memory sub-system initialization code */
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#include <config.h>
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#include <version.h>
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#include <asm/regdef.h>
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#include <asm/mipsregs.h>
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.text
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.set noreorder
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.set mips32
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.globl lowlevel_init
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lowlevel_init:
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/*
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* Step 2) Establish Status Register
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* (set BEV, clear ERL, clear EXL, clear IE)
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*/
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li t1, 0x00400000
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mtc0 t1, CP0_STATUS
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/*
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* Step 3) Establish CP0 Config0
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* (set K0=3)
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*/
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li t1, 0x00000003
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mtc0 t1, CP0_CONFIG
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/*
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* Step 7) Establish Cause
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* (set IV bit)
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*/
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li t1, 0x00800000
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mtc0 t1, CP0_CAUSE
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/* Establish Wired (and Random) */
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mtc0 zero, CP0_WIRED
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nop
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j ra
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nop
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