upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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85 lines
2.5 KiB
85 lines
2.5 KiB
15 years ago
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/*
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* (C) Copyright 2008-2009
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* BuS Elektronik GmbH & Co. KG <www.bus-elektronik.de>
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* Jens Scharsig <esw@bus-elektronik.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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U-Boot vcxk video controller driver
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======================================
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By defining CONFIG_VIDEO_VCXK this driver can be used with VC2K, VC4K and
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VC8K devices on following boards:
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board | ARCH | Vendor
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-----------------------------------------------------------------------
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EB+CPU5282-T1 | MCF5282 | BuS Elektronik GmbH & Co. KG
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EB+MCF-EVB123 | MCF5282 | BuS Elektronik GmbH & Co. KG
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EB+CPUx9K2 | AT91RM9200 | BuS Elektronik GmbH & Co. KG
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ZLSA | AT91RM9200 | Ruf Telematik AG
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Driver configuration
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--------------------
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The driver needs some defines to describe the target hardware:
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CONFIG_SYS_VCXK_BASE
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base address of VCxK hardware memory
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CONFIG_SYS_VCXK_DEFAULT_LINEALIGN
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defines the physical alignment of a pixel row
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CONFIG_SYS_VCXK_DOUBLEBUFFERED
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some boards that use vcxk prevent read from framebuffer memory.
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define this option to enable double buffering (needs 16KiB RAM)
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CONFIG_SYS_VCXK_<xxxx>_PIN
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defines the number of the I/O line PIN in the port
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valid values for <xxxx> are:
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ACKNOWLEDGE
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describes the acknowledge line from vcxk hardware
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ENABLE
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describes the enable line to vcxk hardware
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INVERT
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describes the invert line to vcxk hardware
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RESET
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describes the reset line to vcxk hardware
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REQUEST
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describes the request line to vcxk hardware
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CONFIG_SYS_VCXK_<xxxx>_PORT
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defines the I/O port which is connected with the line
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for valid values for <xxxx> see CONFIG_SYS_VCXK_<xxxx>_PIN
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CONFIG_SYS_VCXK_<xxxx>_DDR
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defines the register which configures the direction
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for valid values for <xxxx> see CONFIG_SYS_VCXK_<xxxx>_PIN
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