omap3: cm-t3517: add USB support

Add both host and mUSB support.
Currently, the selection between host USB and mUSB is done through the
config file.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Reviewed-by: Tom Rini <trini@ti.com>
master
Igor Grinberg 10 years ago committed by Tom Rini
parent b09bf72317
commit 011f5c13f8
  1. 82
      board/compulab/cm_t3517/cm_t3517.c
  2. 38
      board/compulab/cm_t3517/mux.c
  3. 17
      include/configs/cm_t3517.h

@ -8,14 +8,19 @@
#include <common.h>
#include <status_led.h>
#include <usb.h>
#include <mmc.h>
#include <linux/compiler.h>
#include <linux/usb/musb.h>
#include <asm/io.h>
#include <asm/arch/mem.h>
#include <asm/arch/am35x_def.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/musb.h>
#include <asm/omap_musb.h>
#include <asm/ehci-omap.h>
#include "../common/common.h"
@ -27,6 +32,53 @@ const omap3_sysinfo sysinfo = {
"NAND 128/512M",
};
#ifdef CONFIG_USB_MUSB_AM35X
static struct musb_hdrc_config cm_t3517_musb_config = {
.multipoint = 1,
.dyn_fifo = 1,
.num_eps = 16,
.ram_bits = 12,
};
static struct omap_musb_board_data cm_t3517_musb_board_data = {
.set_phy_power = am35x_musb_phy_power,
.clear_irq = am35x_musb_clear_irq,
.reset = am35x_musb_reset,
};
static struct musb_hdrc_platform_data cm_t3517_musb_pdata = {
#if defined(CONFIG_MUSB_HOST)
.mode = MUSB_HOST,
#elif defined(CONFIG_MUSB_GADGET)
.mode = MUSB_PERIPHERAL,
#else
#error "Please define either CONFIG_MUSB_HOST or CONFIG_MUSB_GADGET"
#endif
.config = &cm_t3517_musb_config,
.power = 250,
.platform_ops = &am35x_ops,
.board_data = &cm_t3517_musb_board_data,
};
static void cm_t3517_musb_init(void)
{
/*
* Set up USB clock/mode in the DEVCONF2 register.
* USB2.0 PHY reference clock is 13 MHz
*/
clrsetbits_le32(&am35x_scm_general_regs->devconf2,
CONF2_REFFREQ | CONF2_OTGMODE | CONF2_PHY_GPIOMODE,
CONF2_REFFREQ_13MHZ | CONF2_SESENDEN |
CONF2_VBDTCTEN | CONF2_DATPOL);
if (musb_register(&cm_t3517_musb_pdata, &cm_t3517_musb_board_data,
(void *)AM35XX_IPSS_USBOTGSS_BASE))
printf("Failed initializing AM35x MUSB!\n");
}
#else
static inline void am3517_evm_musb_init(void) {}
#endif
int board_init(void)
{
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
@ -38,6 +90,8 @@ int board_init(void)
status_led_set(STATUS_LED_BOOT, STATUS_LED_ON);
#endif
cm_t3517_musb_init();
return 0;
}
@ -58,3 +112,31 @@ int board_mmc_init(bd_t *bis)
return omap_mmc_init(0, 0, 0, SB_T35_CD_GPIO, SB_T35_WP_GPIO);
}
#endif
#ifdef CONFIG_USB_EHCI_OMAP
static struct omap_usbhs_board_data cm_t3517_usbhs_bdata = {
.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
};
#define CM_T3517_USB_HUB_RESET_GPIO 152
#define SB_T35_USB_HUB_RESET_GPIO 98
int ehci_hcd_init(int index, enum usb_init_type init,
struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
cl_usb_hub_init(CM_T3517_USB_HUB_RESET_GPIO, "cm-t3517 hub rst");
cl_usb_hub_init(SB_T35_USB_HUB_RESET_GPIO, "sb-t35 hub rst");
return omap_ehci_hcd_init(index, &cm_t3517_usbhs_bdata, hccr, hcor);
}
int ehci_hcd_stop(void)
{
cl_usb_hub_deinit(CM_T3517_USB_HUB_RESET_GPIO);
cl_usb_hub_deinit(SB_T35_USB_HUB_RESET_GPIO);
return omap_ehci_hcd_stop();
}
#endif /* CONFIG_USB_EHCI_OMAP */

@ -104,6 +104,10 @@ void set_muxconf_regs(void)
MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M4)); /*GPIO_144*/
/* WIFI nRESET GPIO145 */
MUX_VAL(CP(UART2_RTS), (IEN | PTD | EN | M4)); /*GPIO_145*/
/* USB1 PHY Reset GPIO 146 */
MUX_VAL(CP(UART2_TX), (IEN | PTD | EN | M4)); /*GPIO_146*/
/* USB2 PHY Reset GPIO 147 */
MUX_VAL(CP(UART2_RX), (IEN | PTD | EN | M4)); /*GPIO_147*/
/* MMC1 */
MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0));
@ -119,12 +123,46 @@ void set_muxconf_regs(void)
MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0));
MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0));
/* SB-T35 USB HUB Reset GPIO98 */
MUX_VAL(CP(CCDC_WEN), (IDIS | PTU | EN | M4)); /*GPIO_98*/
/* CM-T3517 USB HUB Reset GPIO152 */
MUX_VAL(CP(MCBSP4_CLKX), (IDIS | PTD | DIS | M4)); /*GPIO_152*/
/* Green LED GPIO186 */
MUX_VAL(CP(SYS_CLKOUT2), (IDIS | PTU | DIS | M4)); /*GPIO_186*/
/* RTC V3020 CS Enable GPIO160 */
MUX_VAL(CP(MCBSP_CLKS), (IEN | PTD | EN | M4)); /*GPIO_160*/
/* USB0 - mUSB */
MUX_VAL(CP(USB0_DRVBUS), (IEN | PTD | EN | M0));
/* USB1 EHCI */
MUX_VAL(CP(ETK_D0_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT0*/
MUX_VAL(CP(ETK_D1_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT1*/
MUX_VAL(CP(ETK_D2_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT2*/
MUX_VAL(CP(ETK_D7_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT3*/
MUX_VAL(CP(ETK_D4_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT4*/
MUX_VAL(CP(ETK_D5_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT5*/
MUX_VAL(CP(ETK_D6_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT6*/
MUX_VAL(CP(ETK_D3_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT7*/
MUX_VAL(CP(ETK_D8_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DIR*/
MUX_VAL(CP(ETK_D9_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_NXT*/
MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTD | DIS | M3)); /*HSUSB1_CLK*/
MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | DIS | M3)); /*HSUSB1_STP*/
/* USB2 EHCI */
MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | EN | M3)); /*HSUSB2_DT0*/
MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | EN | M3)); /*HSUSB2_DT1*/
MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M3)); /*HSUSB2_DT2*/
MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M3)); /*HSUSB2_DT3*/
MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | EN | M3)); /*HSUSB2_DT4*/
MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | EN | M3)); /*HSUSB2_DT5*/
MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M3)); /*HSUSB2_DT6*/
MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | EN | M3)); /*HSUSB2_DT7*/
MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | EN | M3)); /*HSUSB2_DIR*/
MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | EN | M3)); /*HSUSB2_NXT*/
MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTD | DIS | M3)); /*HSUSB2_CLK*/
MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTU | DIS | M3)); /*HSUSB2_STP*/
/* SYS_BOOT */
MUX_VAL(CP(SYS_BOOT0), (IEN | PTU | DIS | M4)); /*GPIO_2*/
MUX_VAL(CP(SYS_BOOT1), (IEN | PTU | DIS | M4)); /*GPIO_3*/

@ -98,6 +98,23 @@
#define CONFIG_OMAP_HSMMC
#define CONFIG_DOS_PARTITION
/* USB */
#define CONFIG_USB_MUSB_AM35X
#ifndef CONFIG_USB_MUSB_AM35X
#define CONFIG_USB_OMAP3
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_OMAP
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146
#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147
#else /* !CONFIG_USB_MUSB_AM35X */
#define CONFIG_MUSB_HOST
#define CONFIG_MUSB_PIO_ONLY
#endif /* CONFIG_USB_MUSB_AM35X */
#define CONFIG_USB_STORAGE
#define CONFIG_CMD_USB
/* commands to include */
#include <config_cmd_default.h>

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