These drivers have never been converted to NET_MULTI, and they are only used by one board (BMW). So drop the drivers until someone feels like rewriting them for NET_MULTI support. Rather than punting the BMW board completely, just disable net support in its board config. Seems to build fine without it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>master
parent
1285a2808a
commit
029cf6b4b2
@ -1,46 +0,0 @@ |
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/******************************************************************************/ |
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/* */ |
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/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 Broadcom */ |
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/* Corporation. */ |
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/* All rights reserved. */ |
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/* */ |
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/* This program is free software; you can redistribute it and/or modify */ |
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/* it under the terms of the GNU General Public License as published by */ |
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/* the Free Software Foundation, located in the file LICENSE. */ |
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/* */ |
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/* History: */ |
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/* */ |
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/******************************************************************************/ |
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|
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#if INCLUDE_5701_AX_FIX |
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|
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#include "bcm570x_mm.h" |
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#include "5701rls.h" |
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|
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LM_STATUS LM_LoadRlsFirmware(PLM_DEVICE_BLOCK pDevice) |
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{ |
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T3_FWIMG_INFO FwImgInfo; |
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|
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FwImgInfo.StartAddress = t3FwStartAddr; |
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FwImgInfo.Text.Buffer = (PLM_UINT8)t3FwText; |
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FwImgInfo.Text.Offset = t3FwTextAddr; |
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FwImgInfo.Text.Length = t3FwTextLen; |
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FwImgInfo.ROnlyData.Buffer = (PLM_UINT8)t3FwRodata; |
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FwImgInfo.ROnlyData.Offset = t3FwRodataAddr; |
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FwImgInfo.ROnlyData.Length = t3FwRodataLen; |
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FwImgInfo.Data.Buffer = (PLM_UINT8)t3FwData; |
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FwImgInfo.Data.Offset = t3FwDataAddr; |
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FwImgInfo.Data.Length = t3FwDataLen; |
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|
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if (LM_LoadFirmware(pDevice, |
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&FwImgInfo, |
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T3_RX_CPU_ID | T3_TX_CPU_ID, |
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T3_RX_CPU_ID) != LM_STATUS_SUCCESS) |
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{ |
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return LM_STATUS_FAILURE; |
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} |
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|
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return LM_STATUS_SUCCESS; |
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} |
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|
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#endif /* INCLUDE_5701_AX_FIX */ |
@ -1,198 +0,0 @@ |
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/******************************************************************************/ |
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/* */ |
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/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 Broadcom */ |
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/* Corporation. */ |
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/* All rights reserved. */ |
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/* */ |
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/* This program is free software; you can redistribute it and/or modify */ |
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/* it under the terms of the GNU General Public License as published by */ |
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/* the Free Software Foundation, located in the file LICENSE. */ |
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/* */ |
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/* History: */ |
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/******************************************************************************/ |
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|
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typedef unsigned long U32; |
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int t3FwReleaseMajor = 0x0; |
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int t3FwReleaseMinor = 0x0; |
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int t3FwReleaseFix = 0x0; |
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U32 t3FwStartAddr = 0x08000000; |
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U32 t3FwTextAddr = 0x08000000; |
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int t3FwTextLen = 0x9c0; |
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U32 t3FwRodataAddr = 0x080009c0; |
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int t3FwRodataLen = 0x60; |
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U32 t3FwDataAddr = 0x08000a40; |
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int t3FwDataLen = 0x20; |
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U32 t3FwSbssAddr = 0x08000a60; |
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int t3FwSbssLen = 0xc; |
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U32 t3FwBssAddr = 0x08000a70; |
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int t3FwBssLen = 0x10; |
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U32 t3FwText[(0x9c0/4) + 1] = { |
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0x0, |
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0x10000003, 0x0, 0xd, 0xd, |
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0x3c1d0800, 0x37bd3ffc, 0x3a0f021, 0x3c100800, |
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0x26100000, 0xe000018, 0x0, 0xd, |
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0x3c1d0800, 0x37bd3ffc, 0x3a0f021, 0x3c100800, |
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0x26100034, 0xe00021c, 0x0, 0xd, |
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0x0, 0x0, 0x0, 0x27bdffe0, |
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0x3c1cc000, 0xafbf0018, 0xaf80680c, 0xe00004c, |
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0x241b2105, 0x97850000, 0x97870002, 0x9782002c, |
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0x9783002e, 0x3c040800, 0x248409c0, 0xafa00014, |
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0x21400, 0x621825, 0x52c00, 0xafa30010, |
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0x8f860010, 0xe52825, 0xe000060, 0x24070102, |
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0x3c02ac00, 0x34420100, 0x3c03ac01, 0x34630100, |
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0xaf820490, 0x3c02ffff, 0xaf820494, 0xaf830498, |
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0xaf82049c, 0x24020001, 0xaf825ce0, 0xe00003f, |
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0xaf825d00, 0xe000140, 0x0, 0x8fbf0018, |
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0x3e00008, 0x27bd0020, 0x2402ffff, 0xaf825404, |
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0x8f835400, 0x34630400, 0xaf835400, 0xaf825404, |
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0x3c020800, 0x24420034, 0xaf82541c, 0x3e00008, |
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0xaf805400, 0x0, 0x0, 0x3c020800, |
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0x34423000, 0x3c030800, 0x34633000, 0x3c040800, |
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0x348437ff, 0x3c010800, 0xac220a64, 0x24020040, |
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0x3c010800, 0xac220a68, 0x3c010800, 0xac200a60, |
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0xac600000, 0x24630004, 0x83102b, 0x5040fffd, |
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0xac600000, 0x3e00008, 0x0, 0x804821, |
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0x8faa0010, 0x3c020800, 0x8c420a60, 0x3c040800, |
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0x8c840a68, 0x8fab0014, 0x24430001, 0x44102b, |
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0x3c010800, 0xac230a60, 0x14400003, 0x4021, |
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0x3c010800, 0xac200a60, 0x3c020800, 0x8c420a60, |
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0x3c030800, 0x8c630a64, 0x91240000, 0x21140, |
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0x431021, 0x481021, 0x25080001, 0xa0440000, |
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0x29020008, 0x1440fff4, 0x25290001, 0x3c020800, |
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0x8c420a60, 0x3c030800, 0x8c630a64, 0x8f84680c, |
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0x21140, 0x431021, 0xac440008, 0xac45000c, |
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0xac460010, 0xac470014, 0xac4a0018, 0x3e00008, |
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0xac4b001c, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x2000008, |
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0x0, 0xa0001e3, 0x3c0a0001, 0xa0001e3, |
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0x3c0a0002, 0xa0001e3, 0x0, 0xa0001e3, |
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0x0, 0xa0001e3, 0x0, 0xa0001e3, |
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0x0, 0xa0001e3, 0x0, 0xa0001e3, |
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0x0, 0xa0001e3, 0x0, 0xa0001e3, |
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0x0, 0xa0001e3, 0x0, 0xa0001e3, |
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0x3c0a0007, 0xa0001e3, 0x3c0a0008, 0xa0001e3, |
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0x3c0a0009, 0xa0001e3, 0x0, 0xa0001e3, |
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0x0, 0xa0001e3, 0x3c0a000b, 0xa0001e3, |
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0x3c0a000c, 0xa0001e3, 0x3c0a000d, 0xa0001e3, |
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0x0, 0xa0001e3, 0x0, 0xa0001e3, |
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0x3c0a000e, 0xa0001e3, 0x0, 0xa0001e3, |
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0x0, 0xa0001e3, 0x0, 0xa0001e3, |
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0x0, 0xa0001e3, 0x0, 0xa0001e3, |
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0x0, 0xa0001e3, 0x0, 0xa0001e3, |
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0x0, 0xa0001e3, 0x3c0a0013, 0xa0001e3, |
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0x3c0a0014, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x27bdffe0, |
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0x1821, 0x1021, 0xafbf0018, 0xafb10014, |
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0xafb00010, 0x3c010800, 0x220821, 0xac200a70, |
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0x3c010800, 0x220821, 0xac200a74, 0x3c010800, |
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0x220821, 0xac200a78, 0x24630001, 0x1860fff5, |
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0x2442000c, 0x24110001, 0x8f906810, 0x32020004, |
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0x14400005, 0x24040001, 0x3c020800, 0x8c420a78, |
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0x18400003, 0x2021, 0xe000182, 0x0, |
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0x32020001, 0x10400003, 0x0, 0xe000169, |
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0x0, 0xa000153, 0xaf915028, 0x8fbf0018, |
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0x8fb10014, 0x8fb00010, 0x3e00008, 0x27bd0020, |
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0x3c050800, 0x8ca50a70, 0x3c060800, 0x8cc60a80, |
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0x3c070800, 0x8ce70a78, 0x27bdffe0, 0x3c040800, |
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0x248409d0, 0xafbf0018, 0xafa00010, 0xe000060, |
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0xafa00014, 0xe00017b, 0x2021, 0x8fbf0018, |
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0x3e00008, 0x27bd0020, 0x24020001, 0x8f836810, |
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0x821004, 0x21027, 0x621824, 0x3e00008, |
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0xaf836810, 0x27bdffd8, 0xafbf0024, 0x1080002e, |
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0xafb00020, 0x8f825cec, 0xafa20018, 0x8f825cec, |
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0x3c100800, 0x26100a78, 0xafa2001c, 0x34028000, |
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0xaf825cec, 0x8e020000, 0x18400016, 0x0, |
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0x3c020800, 0x94420a74, 0x8fa3001c, 0x221c0, |
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0xac830004, 0x8fa2001c, 0x3c010800, 0xe000201, |
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0xac220a74, 0x10400005, 0x0, 0x8e020000, |
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0x24420001, 0xa0001df, 0xae020000, 0x3c020800, |
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0x8c420a70, 0x21c02, 0x321c0, 0xa0001c5, |
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0xafa2001c, 0xe000201, 0x0, 0x1040001f, |
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0x0, 0x8e020000, 0x8fa3001c, 0x24420001, |
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0x3c010800, 0xac230a70, 0x3c010800, 0xac230a74, |
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0xa0001df, 0xae020000, 0x3c100800, 0x26100a78, |
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0x8e020000, 0x18400028, 0x0, 0xe000201, |
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0x0, 0x14400024, 0x0, 0x8e020000, |
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0x3c030800, 0x8c630a70, 0x2442ffff, 0xafa3001c, |
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0x18400006, 0xae020000, 0x31402, 0x221c0, |
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0x8c820004, 0x3c010800, 0xac220a70, 0x97a2001e, |
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0x2442ff00, 0x2c420300, 0x1440000b, 0x24024000, |
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0x3c040800, 0x248409dc, 0xafa00010, 0xafa00014, |
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0x8fa6001c, 0x24050008, 0xe000060, 0x3821, |
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0xa0001df, 0x0, 0xaf825cf8, 0x3c020800, |
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0x8c420a40, 0x8fa3001c, 0x24420001, 0xaf835cf8, |
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0x3c010800, 0xac220a40, 0x8fbf0024, 0x8fb00020, |
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0x3e00008, 0x27bd0028, 0x27bdffe0, 0x3c040800, |
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0x248409e8, 0x2821, 0x3021, 0x3821, |
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0xafbf0018, 0xafa00010, 0xe000060, 0xafa00014, |
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0x8fbf0018, 0x3e00008, 0x27bd0020, 0x8f82680c, |
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0x8f85680c, 0x21827, 0x3182b, 0x31823, |
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0x431024, 0x441021, 0xa2282b, 0x10a00006, |
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0x0, 0x401821, 0x8f82680c, 0x43102b, |
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0x1440fffd, 0x0, 0x3e00008, 0x0, |
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0x3c040800, 0x8c840000, 0x3c030800, 0x8c630a40, |
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0x64102b, 0x54400002, 0x831023, 0x641023, |
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0x2c420008, 0x3e00008, 0x38420001, 0x27bdffe0, |
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0x802821, 0x3c040800, 0x24840a00, 0x3021, |
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0x3821, 0xafbf0018, 0xafa00010, 0xe000060, |
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0xafa00014, 0xa000216, 0x0, 0x8fbf0018, |
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0x3e00008, 0x27bd0020, 0x0, 0x27bdffe0, |
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0x3c1cc000, 0xafbf0018, 0xe00004c, 0xaf80680c, |
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0x3c040800, 0x24840a10, 0x3802821, 0x3021, |
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0x3821, 0xafa00010, 0xe000060, 0xafa00014, |
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0x2402ffff, 0xaf825404, 0x3c0200aa, 0xe000234, |
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0xaf825434, 0x8fbf0018, 0x3e00008, 0x27bd0020, |
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0x0, 0x0, 0x0, 0x27bdffe8, |
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0xafb00010, 0x24100001, 0xafbf0014, 0x3c01c003, |
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0xac200000, 0x8f826810, 0x30422000, 0x10400003, |
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0x0, 0xe000246, 0x0, 0xa00023a, |
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0xaf905428, 0x8fbf0014, 0x8fb00010, 0x3e00008, |
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0x27bd0018, 0x27bdfff8, 0x8f845d0c, 0x3c0200ff, |
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0x3c030800, 0x8c630a50, 0x3442fff8, 0x821024, |
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0x1043001e, 0x3c0500ff, 0x34a5fff8, 0x3c06c003, |
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0x3c074000, 0x851824, 0x8c620010, 0x3c010800, |
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0xac230a50, 0x30420008, 0x10400005, 0x871025, |
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0x8cc20000, 0x24420001, 0xacc20000, 0x871025, |
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0xaf825d0c, 0x8fa20000, 0x24420001, 0xafa20000, |
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0x8fa20000, 0x8fa20000, 0x24420001, 0xafa20000, |
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0x8fa20000, 0x8f845d0c, 0x3c030800, 0x8c630a50, |
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0x851024, 0x1443ffe8, 0x851824, 0x27bd0008, |
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0x3e00008, 0x0, 0x0, 0x0 }; |
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U32 t3FwRodata[(0x60/4) + 1] = { |
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0x35373031, 0x726c7341, 0x0, |
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0x0, 0x53774576, 0x656e7430, 0x0, |
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0x726c7045, 0x76656e74, 0x31000000, 0x556e6b6e, |
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0x45766e74, 0x0, 0x0, 0x0, |
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0x0, 0x66617461, 0x6c457272, 0x0, |
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0x0, 0x4d61696e, 0x43707542, 0x0, |
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0x0, 0x0 }; |
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U32 t3FwData[(0x20/4) + 1] = { |
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0x0, 0x0, 0x0, |
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0x0, 0x0, 0x0, 0x0, |
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0x0, 0x0 }; |
File diff suppressed because it is too large
Load Diff
@ -1,439 +0,0 @@ |
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/******************************************************************************/ |
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/* */ |
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/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2001 Broadcom */ |
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/* Corporation. */ |
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/* All rights reserved. */ |
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/* */ |
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/* This program is free software; you can redistribute it and/or modify */ |
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/* it under the terms of the GNU General Public License as published by */ |
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/* the Free Software Foundation, located in the file LICENSE. */ |
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/* */ |
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/* History: */ |
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/******************************************************************************/ |
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#if !defined(CONFIG_NET_MULTI) |
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#if INCLUDE_TBI_SUPPORT |
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#include "bcm570x_autoneg.h" |
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#include "bcm570x_mm.h" |
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|
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|
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/******************************************************************************/ |
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/* Description: */ |
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/* */ |
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/* Return: */ |
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/******************************************************************************/ |
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void |
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MM_AnTxConfig( |
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PAN_STATE_INFO pAnInfo) |
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{ |
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PLM_DEVICE_BLOCK pDevice; |
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|
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pDevice = (PLM_DEVICE_BLOCK) pAnInfo->pContext; |
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|
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REG_WR(pDevice, MacCtrl.TxAutoNeg, (LM_UINT32) pAnInfo->TxConfig.AsUSHORT); |
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|
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pDevice->MacMode |= MAC_MODE_SEND_CONFIGS; |
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REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode); |
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} |
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|
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|
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/******************************************************************************/ |
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/* Description: */ |
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/* */ |
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/* Return: */ |
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/******************************************************************************/ |
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void |
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MM_AnTxIdle( |
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PAN_STATE_INFO pAnInfo) |
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{ |
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PLM_DEVICE_BLOCK pDevice; |
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|
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pDevice = (PLM_DEVICE_BLOCK) pAnInfo->pContext; |
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|
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pDevice->MacMode &= ~MAC_MODE_SEND_CONFIGS; |
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REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode); |
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} |
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|
||||
|
||||
/******************************************************************************/ |
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/* Description: */ |
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/* */ |
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/* Return: */ |
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/******************************************************************************/ |
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char |
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MM_AnRxConfig( |
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PAN_STATE_INFO pAnInfo, |
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unsigned short *pRxConfig) |
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{ |
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PLM_DEVICE_BLOCK pDevice; |
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LM_UINT32 Value32; |
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char Retcode; |
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|
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Retcode = AN_FALSE; |
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|
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pDevice = (PLM_DEVICE_BLOCK) pAnInfo->pContext; |
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|
||||
Value32 = REG_RD(pDevice, MacCtrl.Status); |
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if(Value32 & MAC_STATUS_RECEIVING_CFG) |
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{ |
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Value32 = REG_RD(pDevice, MacCtrl.RxAutoNeg); |
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*pRxConfig = (unsigned short) Value32; |
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|
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Retcode = AN_TRUE; |
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} |
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|
||||
return Retcode; |
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} |
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|
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|
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/******************************************************************************/ |
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/* Description: */ |
||||
/* */ |
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/* Return: */ |
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/******************************************************************************/ |
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void |
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AutonegInit( |
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PAN_STATE_INFO pAnInfo) |
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{ |
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unsigned long j; |
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|
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for(j = 0; j < sizeof(AN_STATE_INFO); j++) |
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{ |
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((unsigned char *) pAnInfo)[j] = 0; |
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} |
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|
||||
/* Initialize the default advertisement register. */ |
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pAnInfo->mr_adv_full_duplex = 1; |
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pAnInfo->mr_adv_sym_pause = 1; |
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pAnInfo->mr_adv_asym_pause = 1; |
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pAnInfo->mr_an_enable = 1; |
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} |
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|
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|
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/******************************************************************************/ |
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/* Description: */ |
||||
/* */ |
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/* Return: */ |
||||
/******************************************************************************/ |
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AUTONEG_STATUS |
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Autoneg8023z( |
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PAN_STATE_INFO pAnInfo) |
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{ |
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unsigned short RxConfig; |
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unsigned long Delta_us; |
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AUTONEG_STATUS AnRet; |
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|
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/* Get the current time. */ |
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if(pAnInfo->State == AN_STATE_UNKNOWN) |
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{ |
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pAnInfo->RxConfig.AsUSHORT = 0; |
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pAnInfo->CurrentTime_us = 0; |
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pAnInfo->LinkTime_us = 0; |
||||
pAnInfo->AbilityMatchCfg = 0; |
||||
pAnInfo->AbilityMatchCnt = 0; |
||||
pAnInfo->AbilityMatch = AN_FALSE; |
||||
pAnInfo->IdleMatch = AN_FALSE; |
||||
pAnInfo->AckMatch = AN_FALSE; |
||||
} |
||||
|
||||
/* Increment the timer tick. This function is called every microsecon. */ |
||||
/* pAnInfo->CurrentTime_us++; */ |
||||
|
||||
/* Set the AbilityMatch, IdleMatch, and AckMatch flags if their */ |
||||
/* corresponding conditions are satisfied. */ |
||||
if(MM_AnRxConfig(pAnInfo, &RxConfig)) |
||||
{ |
||||
if(RxConfig != pAnInfo->AbilityMatchCfg) |
||||
{ |
||||
pAnInfo->AbilityMatchCfg = RxConfig; |
||||
pAnInfo->AbilityMatch = AN_FALSE; |
||||
pAnInfo->AbilityMatchCnt = 0; |
||||
} |
||||
else |
||||
{ |
||||
pAnInfo->AbilityMatchCnt++; |
||||
if(pAnInfo->AbilityMatchCnt > 1) |
||||
{ |
||||
pAnInfo->AbilityMatch = AN_TRUE; |
||||
pAnInfo->AbilityMatchCfg = RxConfig; |
||||
} |
||||
} |
||||
|
||||
if(RxConfig & AN_CONFIG_ACK) |
||||
{ |
||||
pAnInfo->AckMatch = AN_TRUE; |
||||
} |
||||
else |
||||
{ |
||||
pAnInfo->AckMatch = AN_FALSE; |
||||
} |
||||
|
||||
pAnInfo->IdleMatch = AN_FALSE; |
||||
} |
||||
else |
||||
{ |
||||
pAnInfo->IdleMatch = AN_TRUE; |
||||
|
||||
pAnInfo->AbilityMatchCfg = 0; |
||||
pAnInfo->AbilityMatchCnt = 0; |
||||
pAnInfo->AbilityMatch = AN_FALSE; |
||||
pAnInfo->AckMatch = AN_FALSE; |
||||
|
||||
RxConfig = 0; |
||||
} |
||||
|
||||
/* Save the last Config. */ |
||||
pAnInfo->RxConfig.AsUSHORT = RxConfig; |
||||
|
||||
/* Default return code. */ |
||||
AnRet = AUTONEG_STATUS_OK; |
||||
|
||||
/* Autoneg state machine as defined in 802.3z section 37.3.1.5. */ |
||||
switch(pAnInfo->State) |
||||
{ |
||||
case AN_STATE_UNKNOWN: |
||||
if(pAnInfo->mr_an_enable || pAnInfo->mr_restart_an) |
||||
{ |
||||
pAnInfo->CurrentTime_us = 0; |
||||
pAnInfo->State = AN_STATE_AN_ENABLE; |
||||
} |
||||
|
||||
/* Fall through.*/ |
||||
|
||||
case AN_STATE_AN_ENABLE: |
||||
pAnInfo->mr_an_complete = AN_FALSE; |
||||
pAnInfo->mr_page_rx = AN_FALSE; |
||||
|
||||
if(pAnInfo->mr_an_enable) |
||||
{ |
||||
pAnInfo->LinkTime_us = 0; |
||||
pAnInfo->AbilityMatchCfg = 0; |
||||
pAnInfo->AbilityMatchCnt = 0; |
||||
pAnInfo->AbilityMatch = AN_FALSE; |
||||
pAnInfo->IdleMatch = AN_FALSE; |
||||
pAnInfo->AckMatch = AN_FALSE; |
||||
|
||||
pAnInfo->State = AN_STATE_AN_RESTART_INIT; |
||||
} |
||||
else |
||||
{ |
||||
pAnInfo->State = AN_STATE_DISABLE_LINK_OK; |
||||
} |
||||
break; |
||||
|
||||
case AN_STATE_AN_RESTART_INIT: |
||||
pAnInfo->LinkTime_us = pAnInfo->CurrentTime_us; |
||||
pAnInfo->mr_np_loaded = AN_FALSE; |
||||
|
||||
pAnInfo->TxConfig.AsUSHORT = 0; |
||||
MM_AnTxConfig(pAnInfo); |
||||
|
||||
AnRet = AUTONEG_STATUS_TIMER_ENABLED; |
||||
|
||||
pAnInfo->State = AN_STATE_AN_RESTART; |
||||
|
||||
/* Fall through.*/ |
||||
|
||||
case AN_STATE_AN_RESTART: |
||||
/* Get the current time and compute the delta with the saved */ |
||||
/* link timer. */ |
||||
Delta_us = pAnInfo->CurrentTime_us - pAnInfo->LinkTime_us; |
||||
if(Delta_us > AN_LINK_TIMER_INTERVAL_US) |
||||
{ |
||||
pAnInfo->State = AN_STATE_ABILITY_DETECT_INIT; |
||||
} |
||||
else |
||||
{ |
||||
AnRet = AUTONEG_STATUS_TIMER_ENABLED; |
||||
} |
||||
break; |
||||
|
||||
case AN_STATE_DISABLE_LINK_OK: |
||||
AnRet = AUTONEG_STATUS_DONE; |
||||
break; |
||||
|
||||
case AN_STATE_ABILITY_DETECT_INIT: |
||||
/* Note: in the state diagram, this variable is set to */ |
||||
/* mr_adv_ability<12>. Is this right?. */ |
||||
pAnInfo->mr_toggle_tx = AN_FALSE; |
||||
|
||||
/* Send the config as advertised in the advertisement register. */ |
||||
pAnInfo->TxConfig.AsUSHORT = 0; |
||||
pAnInfo->TxConfig.D5_FD = pAnInfo->mr_adv_full_duplex; |
||||
pAnInfo->TxConfig.D6_HD = pAnInfo->mr_adv_half_duplex; |
||||
pAnInfo->TxConfig.D7_PS1 = pAnInfo->mr_adv_sym_pause; |
||||
pAnInfo->TxConfig.D8_PS2 = pAnInfo->mr_adv_asym_pause; |
||||
pAnInfo->TxConfig.D12_RF1 = pAnInfo->mr_adv_remote_fault1; |
||||
pAnInfo->TxConfig.D13_RF2 = pAnInfo->mr_adv_remote_fault2; |
||||
pAnInfo->TxConfig.D15_NP = pAnInfo->mr_adv_next_page; |
||||
|
||||
MM_AnTxConfig(pAnInfo); |
||||
|
||||
pAnInfo->State = AN_STATE_ABILITY_DETECT; |
||||
|
||||
break; |
||||
|
||||
case AN_STATE_ABILITY_DETECT: |
||||
if(pAnInfo->AbilityMatch == AN_TRUE && |
||||
pAnInfo->RxConfig.AsUSHORT != 0) |
||||
{ |
||||
pAnInfo->State = AN_STATE_ACK_DETECT_INIT; |
||||
} |
||||
|
||||
break; |
||||
|
||||
case AN_STATE_ACK_DETECT_INIT: |
||||
pAnInfo->TxConfig.D14_ACK = 1; |
||||
MM_AnTxConfig(pAnInfo); |
||||
|
||||
pAnInfo->State = AN_STATE_ACK_DETECT; |
||||
|
||||
/* Fall through. */ |
||||
|
||||
case AN_STATE_ACK_DETECT: |
||||
if(pAnInfo->AckMatch == AN_TRUE) |
||||
{ |
||||
if((pAnInfo->RxConfig.AsUSHORT & ~AN_CONFIG_ACK) == |
||||
(pAnInfo->AbilityMatchCfg & ~AN_CONFIG_ACK)) |
||||
{ |
||||
pAnInfo->State = AN_STATE_COMPLETE_ACK_INIT; |
||||
} |
||||
else |
||||
{ |
||||
pAnInfo->State = AN_STATE_AN_ENABLE; |
||||
} |
||||
} |
||||
else if(pAnInfo->AbilityMatch == AN_TRUE && |
||||
pAnInfo->RxConfig.AsUSHORT == 0) |
||||
{ |
||||
pAnInfo->State = AN_STATE_AN_ENABLE; |
||||
} |
||||
|
||||
break; |
||||
|
||||
case AN_STATE_COMPLETE_ACK_INIT: |
||||
/* Make sure invalid bits are not set. */ |
||||
if(pAnInfo->RxConfig.bits.D0 || pAnInfo->RxConfig.bits.D1 || |
||||
pAnInfo->RxConfig.bits.D2 || pAnInfo->RxConfig.bits.D3 || |
||||
pAnInfo->RxConfig.bits.D4 || pAnInfo->RxConfig.bits.D9 || |
||||
pAnInfo->RxConfig.bits.D10 || pAnInfo->RxConfig.bits.D11) |
||||
{ |
||||
AnRet = AUTONEG_STATUS_FAILED; |
||||
break; |
||||
} |
||||
|
||||
/* Set up the link partner advertisement register. */ |
||||
pAnInfo->mr_lp_adv_full_duplex = pAnInfo->RxConfig.D5_FD; |
||||
pAnInfo->mr_lp_adv_half_duplex = pAnInfo->RxConfig.D6_HD; |
||||
pAnInfo->mr_lp_adv_sym_pause = pAnInfo->RxConfig.D7_PS1; |
||||
pAnInfo->mr_lp_adv_asym_pause = pAnInfo->RxConfig.D8_PS2; |
||||
pAnInfo->mr_lp_adv_remote_fault1 = pAnInfo->RxConfig.D12_RF1; |
||||
pAnInfo->mr_lp_adv_remote_fault2 = pAnInfo->RxConfig.D13_RF2; |
||||
pAnInfo->mr_lp_adv_next_page = pAnInfo->RxConfig.D15_NP; |
||||
|
||||
pAnInfo->LinkTime_us = pAnInfo->CurrentTime_us; |
||||
|
||||
pAnInfo->mr_toggle_tx = !pAnInfo->mr_toggle_tx; |
||||
pAnInfo->mr_toggle_rx = pAnInfo->RxConfig.bits.D11; |
||||
pAnInfo->mr_np_rx = pAnInfo->RxConfig.D15_NP; |
||||
pAnInfo->mr_page_rx = AN_TRUE; |
||||
|
||||
pAnInfo->State = AN_STATE_COMPLETE_ACK; |
||||
AnRet = AUTONEG_STATUS_TIMER_ENABLED; |
||||
|
||||
break; |
||||
|
||||
case AN_STATE_COMPLETE_ACK: |
||||
if(pAnInfo->AbilityMatch == AN_TRUE && |
||||
pAnInfo->RxConfig.AsUSHORT == 0) |
||||
{ |
||||
pAnInfo->State = AN_STATE_AN_ENABLE; |
||||
break; |
||||
} |
||||
|
||||
Delta_us = pAnInfo->CurrentTime_us - pAnInfo->LinkTime_us; |
||||
|
||||
if(Delta_us > AN_LINK_TIMER_INTERVAL_US) |
||||
{ |
||||
if(pAnInfo->mr_adv_next_page == 0 || |
||||
pAnInfo->mr_lp_adv_next_page == 0) |
||||
{ |
||||
pAnInfo->State = AN_STATE_IDLE_DETECT_INIT; |
||||
} |
||||
else |
||||
{ |
||||
if(pAnInfo->TxConfig.bits.D15 == 0 && |
||||
pAnInfo->mr_np_rx == 0) |
||||
{ |
||||
pAnInfo->State = AN_STATE_IDLE_DETECT_INIT; |
||||
} |
||||
else |
||||
{ |
||||
AnRet = AUTONEG_STATUS_FAILED; |
||||
} |
||||
} |
||||
} |
||||
|
||||
break; |
||||
|
||||
case AN_STATE_IDLE_DETECT_INIT: |
||||
pAnInfo->LinkTime_us = pAnInfo->CurrentTime_us; |
||||
|
||||
MM_AnTxIdle(pAnInfo); |
||||
|
||||
pAnInfo->State = AN_STATE_IDLE_DETECT; |
||||
|
||||
AnRet = AUTONEG_STATUS_TIMER_ENABLED; |
||||
|
||||
break; |
||||
|
||||
case AN_STATE_IDLE_DETECT: |
||||
if(pAnInfo->AbilityMatch == AN_TRUE && |
||||
pAnInfo->RxConfig.AsUSHORT == 0) |
||||
{ |
||||
pAnInfo->State = AN_STATE_AN_ENABLE; |
||||
break; |
||||
} |
||||
|
||||
Delta_us = pAnInfo->CurrentTime_us - pAnInfo->LinkTime_us; |
||||
if(Delta_us > AN_LINK_TIMER_INTERVAL_US) |
||||
{ |
||||
#if 0 |
||||
/* if(pAnInfo->IdleMatch == AN_TRUE) */ |
||||
/* { */ |
||||
#endif |
||||
pAnInfo->State = AN_STATE_LINK_OK; |
||||
#if 0 |
||||
/* } */ |
||||
/* else */ |
||||
/* { */ |
||||
/* AnRet = AUTONEG_STATUS_FAILED; */ |
||||
/* break; */ |
||||
/* } */ |
||||
#endif |
||||
} |
||||
|
||||
break; |
||||
|
||||
case AN_STATE_LINK_OK: |
||||
pAnInfo->mr_an_complete = AN_TRUE; |
||||
pAnInfo->mr_link_ok = AN_TRUE; |
||||
AnRet = AUTONEG_STATUS_DONE; |
||||
|
||||
break; |
||||
|
||||
case AN_STATE_NEXT_PAGE_WAIT_INIT: |
||||
break; |
||||
|
||||
case AN_STATE_NEXT_PAGE_WAIT: |
||||
break; |
||||
|
||||
default: |
||||
AnRet = AUTONEG_STATUS_FAILED; |
||||
break; |
||||
} |
||||
|
||||
return AnRet; |
||||
} |
||||
#endif /* INCLUDE_TBI_SUPPORT */ |
||||
|
||||
#endif /* !defined(CONFIG_NET_MULTI) */ |
@ -1,408 +0,0 @@ |
||||
/******************************************************************************/ |
||||
/* */ |
||||
/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2001 Broadcom */ |
||||
/* Corporation. */ |
||||
/* All rights reserved. */ |
||||
/* */ |
||||
/* This program is free software; you can redistribute it and/or modify */ |
||||
/* it under the terms of the GNU General Public License as published by */ |
||||
/* the Free Software Foundation, located in the file LICENSE. */ |
||||
/* */ |
||||
/* History: */ |
||||
/******************************************************************************/ |
||||
|
||||
|
||||
#ifndef AUTONEG_H |
||||
#define AUTONEG_H |
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Constants. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define AN_LINK_TIMER_INTERVAL_US 9000 /* 10ms */ |
||||
|
||||
/* TRUE, FALSE */ |
||||
#define AN_TRUE 1 |
||||
#define AN_FALSE 0 |
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Main data structure for keeping track of 802.3z auto-negotation state */ |
||||
/* variables as shown in Figure 37-6 of the IEEE 802.3z specification. */ |
||||
/******************************************************************************/ |
||||
|
||||
typedef struct |
||||
{ |
||||
/* Current auto-negotiation state. */ |
||||
unsigned long State; |
||||
#define AN_STATE_UNKNOWN 0 |
||||
#define AN_STATE_AN_ENABLE 1 |
||||
#define AN_STATE_AN_RESTART_INIT 2 |
||||
#define AN_STATE_AN_RESTART 3 |
||||
#define AN_STATE_DISABLE_LINK_OK 4 |
||||
#define AN_STATE_ABILITY_DETECT_INIT 5 |
||||
#define AN_STATE_ABILITY_DETECT 6 |
||||
#define AN_STATE_ACK_DETECT_INIT 7 |
||||
#define AN_STATE_ACK_DETECT 8 |
||||
#define AN_STATE_COMPLETE_ACK_INIT 9 |
||||
#define AN_STATE_COMPLETE_ACK 10 |
||||
#define AN_STATE_IDLE_DETECT_INIT 11 |
||||
#define AN_STATE_IDLE_DETECT 12 |
||||
#define AN_STATE_LINK_OK 13 |
||||
#define AN_STATE_NEXT_PAGE_WAIT_INIT 14 |
||||
#define AN_STATE_NEXT_PAGE_WAIT 16 |
||||
|
||||
/* Link timer. */ |
||||
unsigned long LinkTime_us; |
||||
|
||||
/* Current time. */ |
||||
unsigned long CurrentTime_us; |
||||
|
||||
/* Need these values for consistency check. */ |
||||
unsigned short AbilityMatchCfg; |
||||
|
||||
/* Ability, idle, and ack match functions. */ |
||||
unsigned long AbilityMatchCnt; |
||||
char AbilityMatch; |
||||
char IdleMatch; |
||||
char AckMatch; |
||||
|
||||
/* Tx config data */ |
||||
union |
||||
{ |
||||
/* The TxConfig register is arranged as follows: */ |
||||
/* */ |
||||
/* MSB LSB */ |
||||
/* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ |
||||
/* | D7| D6| D5| D4| D3| D2| D1| D0|D15|D14|D13|D12|D11|D10| D9| D8| */ |
||||
/* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ |
||||
struct |
||||
{ |
||||
#ifdef BIG_ENDIAN_HOST |
||||
unsigned int D7:1; /* PS1 */ |
||||
unsigned int D6:1; /* HD */ |
||||
unsigned int D5:1; /* FD */ |
||||
unsigned int D4:1; |
||||
unsigned int D3:1; |
||||
unsigned int D2:1; |
||||
unsigned int D1:1; |
||||
unsigned int D0:1; |
||||
unsigned int D15:1; /* NP */ |
||||
unsigned int D14:1; /* ACK */ |
||||
unsigned int D13:1; /* RF2 */ |
||||
unsigned int D12:1; /* RF1 */ |
||||
unsigned int D11:1; |
||||
unsigned int D10:1; |
||||
unsigned int D9:1; |
||||
unsigned int D8:1; /* PS2 */ |
||||
#else /* BIG_ENDIAN_HOST */ |
||||
unsigned int D8:1; /* PS2 */ |
||||
unsigned int D9:1; |
||||
unsigned int D10:1; |
||||
unsigned int D11:1; |
||||
unsigned int D12:1; /* RF1 */ |
||||
unsigned int D13:1; /* RF2 */ |
||||
unsigned int D14:1; /* ACK */ |
||||
unsigned int D15:1; /* NP */ |
||||
unsigned int D0:1; |
||||
unsigned int D1:1; |
||||
unsigned int D2:1; |
||||
unsigned int D3:1; |
||||
unsigned int D4:1; |
||||
unsigned int D5:1; /* FD */ |
||||
unsigned int D6:1; /* HD */ |
||||
unsigned int D7:1; /* PS1 */ |
||||
#endif |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
|
||||
#define D8_PS2 bits.D8 |
||||
#define D12_RF1 bits.D12 |
||||
#define D13_RF2 bits.D13 |
||||
#define D14_ACK bits.D14 |
||||
#define D15_NP bits.D15 |
||||
#define D5_FD bits.D5 |
||||
#define D6_HD bits.D6 |
||||
#define D7_PS1 bits.D7 |
||||
} TxConfig; |
||||
|
||||
/* Rx config data */ |
||||
union |
||||
{ |
||||
/* The RxConfig register is arranged as follows: */ |
||||
/* */ |
||||
/* MSB LSB */ |
||||
/* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ |
||||
/* | D7| D6| D5| D4| D3| D2| D1| D0|D15|D14|D13|D12|D11|D10| D9| D8| */ |
||||
/* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ |
||||
struct |
||||
{ |
||||
#ifdef BIG_ENDIAN_HOST |
||||
unsigned int D7:1; /* PS1 */ |
||||
unsigned int D6:1; /* HD */ |
||||
unsigned int D5:1; /* FD */ |
||||
unsigned int D4:1; |
||||
unsigned int D3:1; |
||||
unsigned int D2:1; |
||||
unsigned int D1:1; |
||||
unsigned int D0:1; |
||||
unsigned int D15:1; /* NP */ |
||||
unsigned int D14:1; /* ACK */ |
||||
unsigned int D13:1; /* RF2 */ |
||||
unsigned int D12:1; /* RF1 */ |
||||
unsigned int D11:1; |
||||
unsigned int D10:1; |
||||
unsigned int D9:1; |
||||
unsigned int D8:1; /* PS2 */ |
||||
#else /* BIG_ENDIAN_HOST */ |
||||
unsigned int D8:1; /* PS2 */ |
||||
unsigned int D9:1; |
||||
unsigned int D10:1; |
||||
unsigned int D11:1; |
||||
unsigned int D12:1; /* RF1 */ |
||||
unsigned int D13:1; /* RF2 */ |
||||
unsigned int D14:1; /* ACK */ |
||||
unsigned int D15:1; /* NP */ |
||||
unsigned int D0:1; |
||||
unsigned int D1:1; |
||||
unsigned int D2:1; |
||||
unsigned int D3:1; |
||||
unsigned int D4:1; |
||||
unsigned int D5:1; /* FD */ |
||||
unsigned int D6:1; /* HD */ |
||||
unsigned int D7:1; /* PS1 */ |
||||
#endif |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
} RxConfig; |
||||
|
||||
#define AN_CONFIG_NP 0x0080 |
||||
#define AN_CONFIG_ACK 0x0040 |
||||
#define AN_CONFIG_RF2 0x0020 |
||||
#define AN_CONFIG_RF1 0x0010 |
||||
#define AN_CONFIG_PS2 0x0001 |
||||
#define AN_CONFIG_PS1 0x8000 |
||||
#define AN_CONFIG_HD 0x4000 |
||||
#define AN_CONFIG_FD 0x2000 |
||||
|
||||
|
||||
/* Management registers. */ |
||||
|
||||
/* Control register. */ |
||||
union |
||||
{ |
||||
struct |
||||
{ |
||||
unsigned int an_enable:1; |
||||
unsigned int loopback:1; |
||||
unsigned int reset:1; |
||||
unsigned int restart_an:1; |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
|
||||
#define mr_an_enable Mr0.bits.an_enable |
||||
#define mr_loopback Mr0.bits.loopback |
||||
#define mr_main_reset Mr0.bits.reset |
||||
#define mr_restart_an Mr0.bits.restart_an |
||||
} Mr0; |
||||
|
||||
/* Status register. */ |
||||
union |
||||
{ |
||||
struct |
||||
{ |
||||
unsigned int an_complete:1; |
||||
unsigned int link_ok:1; |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
|
||||
#define mr_an_complete Mr1.bits.an_complete |
||||
#define mr_link_ok Mr1.bits.link_ok |
||||
} Mr1; |
||||
|
||||
/* Advertisement register. */ |
||||
union |
||||
{ |
||||
struct |
||||
{ |
||||
unsigned int reserved_4:5; |
||||
unsigned int full_duplex:1; |
||||
unsigned int half_duplex:1; |
||||
unsigned int sym_pause:1; |
||||
unsigned int asym_pause:1; |
||||
unsigned int reserved_11:3; |
||||
unsigned int remote_fault1:1; |
||||
unsigned int remote_fault2:1; |
||||
unsigned int reserved_14:1; |
||||
unsigned int next_page:1; |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
|
||||
#define mr_adv_full_duplex Mr4.bits.full_duplex |
||||
#define mr_adv_half_duplex Mr4.bits.half_duplex |
||||
#define mr_adv_sym_pause Mr4.bits.sym_pause |
||||
#define mr_adv_asym_pause Mr4.bits.asym_pause |
||||
#define mr_adv_remote_fault1 Mr4.bits.remote_fault1 |
||||
#define mr_adv_remote_fault2 Mr4.bits.remote_fault2 |
||||
#define mr_adv_next_page Mr4.bits.next_page |
||||
} Mr4; |
||||
|
||||
/* Link partner advertisement register. */ |
||||
union |
||||
{ |
||||
struct |
||||
{ |
||||
unsigned int reserved_4:5; |
||||
unsigned int lp_full_duplex:1; |
||||
unsigned int lp_half_duplex:1; |
||||
unsigned int lp_sym_pause:1; |
||||
unsigned int lp_asym_pause:1; |
||||
unsigned int reserved_11:3; |
||||
unsigned int lp_remote_fault1:1; |
||||
unsigned int lp_remote_fault2:1; |
||||
unsigned int lp_ack:1; |
||||
unsigned int lp_next_page:1; |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
|
||||
#define mr_lp_adv_full_duplex Mr5.bits.lp_full_duplex |
||||
#define mr_lp_adv_half_duplex Mr5.bits.lp_half_duplex |
||||
#define mr_lp_adv_sym_pause Mr5.bits.lp_sym_pause |
||||
#define mr_lp_adv_asym_pause Mr5.bits.lp_asym_pause |
||||
#define mr_lp_adv_remote_fault1 Mr5.bits.lp_remote_fault1 |
||||
#define mr_lp_adv_remote_fault2 Mr5.bits.lp_remote_fault2 |
||||
#define mr_lp_adv_next_page Mr5.bits.lp_next_page |
||||
} Mr5; |
||||
|
||||
/* Auto-negotiation expansion register. */ |
||||
union |
||||
{ |
||||
struct |
||||
{ |
||||
unsigned int reserved_0:1; |
||||
unsigned int page_received:1; |
||||
unsigned int next_pageable:1; |
||||
unsigned int reserved_15:13; |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
} Mr6; |
||||
|
||||
/* Auto-negotiation next page transmit register. */ |
||||
union |
||||
{ |
||||
struct |
||||
{ |
||||
unsigned int code_field:11; |
||||
unsigned int toggle:1; |
||||
unsigned int ack2:1; |
||||
unsigned int message_page:1; |
||||
unsigned int reserved_14:1; |
||||
unsigned int next_page:1; |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
|
||||
#define mr_np_tx Mr7.AsUSHORT |
||||
} Mr7; |
||||
|
||||
/* Auto-negotiation link partner ability register. */ |
||||
union |
||||
{ |
||||
struct |
||||
{ |
||||
unsigned int code_field:11; |
||||
unsigned int toggle:1; |
||||
unsigned int ack2:1; |
||||
unsigned int message_page:1; |
||||
unsigned int ack:1; |
||||
unsigned int next_page:1; |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
|
||||
#define mr_lp_np_rx Mr8.AsUSHORT |
||||
} Mr8; |
||||
|
||||
/* Extended status register. */ |
||||
union |
||||
{ |
||||
struct |
||||
{ |
||||
unsigned int reserved_11:12; |
||||
unsigned int base1000_t_hd:1; |
||||
unsigned int base1000_t_fd:1; |
||||
unsigned int base1000_x_hd:1; |
||||
unsigned int base1000_x_fd:1; |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
} Mr15; |
||||
|
||||
/* Miscellaneous state variables. */ |
||||
union |
||||
{ |
||||
struct |
||||
{ |
||||
unsigned int toggle_tx:1; |
||||
unsigned int toggle_rx:1; |
||||
unsigned int np_rx:1; |
||||
unsigned int page_rx:1; |
||||
unsigned int np_loaded:1; |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
|
||||
#define mr_toggle_tx MrMisc.bits.toggle_tx |
||||
#define mr_toggle_rx MrMisc.bits.toggle_rx |
||||
#define mr_np_rx MrMisc.bits.np_rx |
||||
#define mr_page_rx MrMisc.bits.page_rx |
||||
#define mr_np_loaded MrMisc.bits.np_loaded |
||||
} MrMisc; |
||||
|
||||
|
||||
/* Implement specifics */ |
||||
|
||||
/* Pointer to the operating system specific data structure. */ |
||||
void *pContext; |
||||
} AN_STATE_INFO, *PAN_STATE_INFO; |
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Return code of Autoneg8023z. */ |
||||
/******************************************************************************/ |
||||
|
||||
typedef enum |
||||
{ |
||||
AUTONEG_STATUS_OK = 0, |
||||
AUTONEG_STATUS_DONE = 1, |
||||
AUTONEG_STATUS_TIMER_ENABLED = 2, |
||||
AUTONEG_STATUS_FAILED = 0xfffffff |
||||
} AUTONEG_STATUS, *PAUTONEG_STATUS; |
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Function prototypes. */ |
||||
/******************************************************************************/ |
||||
|
||||
AUTONEG_STATUS Autoneg8023z(PAN_STATE_INFO pAnInfo); |
||||
void AutonegInit(PAN_STATE_INFO pAnInfo); |
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* The following functions are defined in the os-dependent module. */ |
||||
/******************************************************************************/ |
||||
|
||||
void MM_AnTxConfig(PAN_STATE_INFO pAnInfo); |
||||
void MM_AnTxIdle(PAN_STATE_INFO pAnInfo); |
||||
char MM_AnRxConfig(PAN_STATE_INFO pAnInfo, unsigned short *pRxConfig); |
||||
|
||||
|
||||
#endif /* AUTONEG_H */ |
@ -1,57 +0,0 @@ |
||||
|
||||
/******************************************************************************/ |
||||
/* */ |
||||
/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 Broadcom */ |
||||
/* Corporation. */ |
||||
/* All rights reserved. */ |
||||
/* */ |
||||
/* This program is free software; you can redistribute it and/or modify */ |
||||
/* it under the terms of the GNU General Public License as published by */ |
||||
/* the Free Software Foundation, located in the file LICENSE. */ |
||||
/* */ |
||||
/* History: */ |
||||
/* 02/25/00 Hav Khauv Initial version. */ |
||||
/******************************************************************************/ |
||||
|
||||
#ifndef BITS_H |
||||
#define BITS_H |
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Bit Mask definitions */ |
||||
/******************************************************************************/ |
||||
#define BIT_NONE 0x00 |
||||
#define BIT_0 0x01 |
||||
#define BIT_1 0x02 |
||||
#define BIT_2 0x04 |
||||
#define BIT_3 0x08 |
||||
#define BIT_4 0x10 |
||||
#define BIT_5 0x20 |
||||
#define BIT_6 0x40 |
||||
#define BIT_7 0x80 |
||||
#define BIT_8 0x0100 |
||||
#define BIT_9 0x0200 |
||||
#define BIT_10 0x0400 |
||||
#define BIT_11 0x0800 |
||||
#define BIT_12 0x1000 |
||||
#define BIT_13 0x2000 |
||||
#define BIT_14 0x4000 |
||||
#define BIT_15 0x8000 |
||||
#define BIT_16 0x010000 |
||||
#define BIT_17 0x020000 |
||||
#define BIT_18 0x040000 |
||||
#define BIT_19 0x080000 |
||||
#define BIT_20 0x100000 |
||||
#define BIT_21 0x200000 |
||||
#define BIT_22 0x400000 |
||||
#define BIT_23 0x800000 |
||||
#define BIT_24 0x01000000 |
||||
#define BIT_25 0x02000000 |
||||
#define BIT_26 0x04000000 |
||||
#define BIT_27 0x08000000 |
||||
#define BIT_28 0x10000000 |
||||
#define BIT_29 0x20000000 |
||||
#define BIT_30 0x40000000 |
||||
#define BIT_31 0x80000000 |
||||
|
||||
#endif /* BITS_H */ |
@ -1,109 +0,0 @@ |
||||
|
||||
/******************************************************************************/ |
||||
/* */ |
||||
/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 Broadcom */ |
||||
/* Corporation. */ |
||||
/* All rights reserved. */ |
||||
/* */ |
||||
/* This program is free software; you can redistribute it and/or modify */ |
||||
/* it under the terms of the GNU General Public License as published by */ |
||||
/* the Free Software Foundation, located in the file LICENSE. */ |
||||
/* */ |
||||
/* History: */ |
||||
/* 02/25/00 Hav Khauv Initial version. */ |
||||
/******************************************************************************/ |
||||
|
||||
#ifndef DEBUG_H |
||||
#define DEBUG_H |
||||
|
||||
#ifdef VXWORKS |
||||
#include <vxWorks.h> |
||||
#endif |
||||
|
||||
/******************************************************************************/ |
||||
/* Debug macros */ |
||||
/******************************************************************************/ |
||||
|
||||
/* Code path for controlling output debug messages. */ |
||||
/* Define your code path here. */ |
||||
#define CP_INIT 0x010000 |
||||
#define CP_SEND 0x020000 |
||||
#define CP_RCV 0x040000 |
||||
#define CP_INT 0x080000 |
||||
#define CP_UINIT 0x100000 |
||||
#define CP_RESET 0x200000 |
||||
|
||||
#define CP_ALL (CP_INIT | CP_SEND | CP_RCV | CP_INT | \ |
||||
CP_RESET | CP_UINIT) |
||||
|
||||
#define CP_MASK 0xffff0000 |
||||
|
||||
|
||||
/* Debug message levels. */ |
||||
#define LV_VERBOSE 0x03 |
||||
#define LV_INFORM 0x02 |
||||
#define LV_WARN 0x01 |
||||
#define LV_FATAL 0x00 |
||||
|
||||
#define LV_MASK 0xffff |
||||
|
||||
|
||||
/* Code path and messsage level combined. These are the first argument of */ |
||||
/* the DbgMessage macro. */ |
||||
#define INIT_V (CP_INIT | LV_VERBOSE) |
||||
#define INIT_I (CP_INIT | LV_INFORM) |
||||
#define INIT_W (CP_INIT | LV_WARN) |
||||
#define SEND_V (CP_SEND | LV_VERBOSE) |
||||
#define SEND_I (CP_SEND | LV_INFORM) |
||||
#define SEND_W (CP_SEND | LV_WARN) |
||||
#define RCV_V (CP_RCV | LV_VERBOSE) |
||||
#define RCV_I (CP_RCV | LV_INFORM) |
||||
#define RCV_W (CP_RCV | LV_WARN) |
||||
#define INT_V (CP_INT | LV_VERBOSE) |
||||
#define INT_I (CP_INT | LV_INFORM) |
||||
#define INT_W (CP_INT | LV_WARN) |
||||
#define UINIT_V (CP_UINIT | LV_VERBOSE) |
||||
#define UINIT_I (CP_UINIT | LV_INFORM) |
||||
#define UINIT_W (CP_UINIT | LV_WARN) |
||||
#define RESET_V (CP_RESET | LV_VERBOSE) |
||||
#define RESET_I (CP_RESET | LV_INFORM) |
||||
#define RESET_W (CP_RESET | LV_WARN) |
||||
#define CPALL_V (CP_ALL | LV_VERBOSE) |
||||
#define CPALL_I (CP_ALL | LV_INFORM) |
||||
#define CPALL_W (CP_ALL | LV_WARN) |
||||
|
||||
|
||||
/* All code path message levels. */ |
||||
#define FATAL (CP_ALL | LV_FATAL) |
||||
#define WARN (CP_ALL | LV_WARN) |
||||
#define INFORM (CP_ALL | LV_INFORM) |
||||
#define VERBOSE (CP_ALL | LV_VERBOSE) |
||||
|
||||
|
||||
/* These constants control the message output. */ |
||||
/* Set your debug message output level and code path here. */ |
||||
#ifndef DBG_MSG_CP |
||||
#define DBG_MSG_CP CP_ALL /* Where to output messages. */ |
||||
#endif |
||||
|
||||
#ifndef DBG_MSG_LV |
||||
#define DBG_MSG_LV LV_VERBOSE /* Level of message output. */ |
||||
#endif |
||||
|
||||
/* DbgMessage macro. */ |
||||
#if DBG |
||||
#define DbgMessage(CNTRL, MESSAGE) \ |
||||
if((CNTRL & DBG_MSG_CP) && ((CNTRL & LV_MASK) <= DBG_MSG_LV)) \
|
||||
printf MESSAGE |
||||
#define DbgBreak() DbgBreakPoint() |
||||
#undef STATIC |
||||
#define STATIC |
||||
#else |
||||
#define DbgMessage(CNTRL, MESSAGE) |
||||
#define DbgBreak() |
||||
#undef STATIC |
||||
#define STATIC static |
||||
#endif /* DBG */ |
||||
|
||||
|
||||
#endif /* DEBUG_H */ |
@ -1,434 +0,0 @@ |
||||
|
||||
/******************************************************************************/ |
||||
/* */ |
||||
/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 Broadcom */ |
||||
/* Corporation. */ |
||||
/* All rights reserved. */ |
||||
/* */ |
||||
/* This program is free software; you can redistribute it and/or modify */ |
||||
/* it under the terms of the GNU General Public License as published by */ |
||||
/* the Free Software Foundation, located in the file LICENSE. */ |
||||
/* */ |
||||
/* History: */ |
||||
/* 02/25/00 Hav Khauv Initial version. */ |
||||
/******************************************************************************/ |
||||
|
||||
#ifndef LM_H |
||||
#define LM_H |
||||
|
||||
#include "bcm570x_queue.h" |
||||
#include "bcm570x_bits.h" |
||||
|
||||
/******************************************************************************/ |
||||
/* Basic types. */ |
||||
/******************************************************************************/ |
||||
|
||||
typedef char LM_CHAR, *PLM_CHAR; |
||||
typedef unsigned int LM_UINT, *PLM_UINT; |
||||
typedef unsigned char LM_UINT8, *PLM_UINT8; |
||||
typedef unsigned short LM_UINT16, *PLM_UINT16; |
||||
typedef unsigned int LM_UINT32, *PLM_UINT32; |
||||
typedef unsigned int LM_COUNTER, *PLM_COUNTER; |
||||
typedef void LM_VOID, *PLM_VOID; |
||||
typedef char LM_BOOL, *PLM_BOOL; |
||||
|
||||
/* 64bit value. */ |
||||
typedef struct { |
||||
#ifdef BIG_ENDIAN_HOST |
||||
LM_UINT32 High; |
||||
LM_UINT32 Low; |
||||
#else /* BIG_ENDIAN_HOST */ |
||||
LM_UINT32 Low; |
||||
LM_UINT32 High; |
||||
#endif /* !BIG_ENDIAN_HOST */ |
||||
} LM_UINT64, *PLM_UINT64; |
||||
|
||||
typedef LM_UINT64 LM_PHYSICAL_ADDRESS, *PLM_PHYSICAL_ADDRESS; |
||||
|
||||
/* void LM_INC_PHYSICAL_ADDRESS(PLM_PHYSICAL_ADDRESS pAddr,LM_UINT32 IncSize) */ |
||||
#define LM_INC_PHYSICAL_ADDRESS(pAddr, IncSize) \ |
||||
{ \
|
||||
LM_UINT32 OrgLow; \
|
||||
\
|
||||
OrgLow = (pAddr)->Low; \
|
||||
(pAddr)->Low += IncSize; \
|
||||
if((pAddr)->Low < OrgLow) { \
|
||||
(pAddr)->High++; /* Wrap around. */ \
|
||||
} \
|
||||
} |
||||
|
||||
#ifndef NULL |
||||
#define NULL ((void *) 0) |
||||
#endif /* NULL */ |
||||
|
||||
#ifndef OFFSETOF |
||||
#define OFFSETOF(_s, _m) (MM_UINT_PTR(&(((_s *) 0)->_m))) |
||||
#endif /* OFFSETOF */ |
||||
|
||||
/******************************************************************************/ |
||||
/* Simple macros. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define IS_ETH_BROADCAST(_pEthAddr) \ |
||||
(((unsigned char *) (_pEthAddr))[0] == ((unsigned char) 0xff)) |
||||
|
||||
#define IS_ETH_MULTICAST(_pEthAddr) \ |
||||
(((unsigned char *) (_pEthAddr))[0] & ((unsigned char) 0x01)) |
||||
|
||||
#define IS_ETH_ADDRESS_EQUAL(_pEtherAddr1, _pEtherAddr2) \ |
||||
((((unsigned char *) (_pEtherAddr1))[0] == \
|
||||
((unsigned char *) (_pEtherAddr2))[0]) && \
|
||||
(((unsigned char *) (_pEtherAddr1))[1] == \
|
||||
((unsigned char *) (_pEtherAddr2))[1]) && \
|
||||
(((unsigned char *) (_pEtherAddr1))[2] == \
|
||||
((unsigned char *) (_pEtherAddr2))[2]) && \
|
||||
(((unsigned char *) (_pEtherAddr1))[3] == \
|
||||
((unsigned char *) (_pEtherAddr2))[3]) && \
|
||||
(((unsigned char *) (_pEtherAddr1))[4] == \
|
||||
((unsigned char *) (_pEtherAddr2))[4]) && \
|
||||
(((unsigned char *) (_pEtherAddr1))[5] == \
|
||||
((unsigned char *) (_pEtherAddr2))[5])) |
||||
|
||||
#define COPY_ETH_ADDRESS(_Src, _Dst) \ |
||||
((unsigned char *) (_Dst))[0] = ((unsigned char *) (_Src))[0]; \
|
||||
((unsigned char *) (_Dst))[1] = ((unsigned char *) (_Src))[1]; \
|
||||
((unsigned char *) (_Dst))[2] = ((unsigned char *) (_Src))[2]; \
|
||||
((unsigned char *) (_Dst))[3] = ((unsigned char *) (_Src))[3]; \
|
||||
((unsigned char *) (_Dst))[4] = ((unsigned char *) (_Src))[4]; \
|
||||
((unsigned char *) (_Dst))[5] = ((unsigned char *) (_Src))[5]; |
||||
|
||||
/******************************************************************************/ |
||||
/* Constants. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define ETHERNET_ADDRESS_SIZE 6 |
||||
#define ETHERNET_PACKET_HEADER_SIZE 14 |
||||
#define MIN_ETHERNET_PACKET_SIZE 64 /* with 4 byte crc. */ |
||||
#define MAX_ETHERNET_PACKET_SIZE 1518 /* with 4 byte crc. */ |
||||
#define MIN_ETHERNET_PACKET_SIZE_NO_CRC 60 |
||||
#define MAX_ETHERNET_PACKET_SIZE_NO_CRC 1514 |
||||
#define MAX_ETHERNET_PACKET_BUFFER_SIZE 1536 /* A nice even number. */ |
||||
|
||||
#ifndef LM_MAX_MC_TABLE_SIZE |
||||
#define LM_MAX_MC_TABLE_SIZE 32 |
||||
#endif /* LM_MAX_MC_TABLE_SIZE */ |
||||
#define LM_MC_ENTRY_SIZE (ETHERNET_ADDRESS_SIZE+1) |
||||
#define LM_MC_INSTANCE_COUNT_INDEX (LM_MC_ENTRY_SIZE-1) |
||||
|
||||
/* Receive filter masks. */ |
||||
#define LM_ACCEPT_UNICAST 0x0001 |
||||
#define LM_ACCEPT_MULTICAST 0x0002 |
||||
#define LM_ACCEPT_ALL_MULTICAST 0x0004 |
||||
#define LM_ACCEPT_BROADCAST 0x0008 |
||||
#define LM_ACCEPT_ERROR_PACKET 0x0010 |
||||
|
||||
#define LM_PROMISCUOUS_MODE 0x10000 |
||||
|
||||
/******************************************************************************/ |
||||
/* PCI registers. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define PCI_VENDOR_ID_REG 0x00 |
||||
#define PCI_DEVICE_ID_REG 0x02 |
||||
|
||||
#define PCI_COMMAND_REG 0x04 |
||||
#define PCI_IO_SPACE_ENABLE 0x0001 |
||||
#define PCI_MEM_SPACE_ENABLE 0x0002 |
||||
#define PCI_BUSMASTER_ENABLE 0x0004 |
||||
#define PCI_MEMORY_WRITE_INVALIDATE 0x0010 |
||||
#define PCI_PARITY_ERROR_ENABLE 0x0040 |
||||
#define PCI_SYSTEM_ERROR_ENABLE 0x0100 |
||||
#define PCI_FAST_BACK_TO_BACK_ENABLE 0x0200 |
||||
|
||||
#define PCI_STATUS_REG 0x06 |
||||
#define PCI_REV_ID_REG 0x08 |
||||
|
||||
#define PCI_CACHE_LINE_SIZE_REG 0x0c |
||||
|
||||
#define PCI_IO_BASE_ADDR_REG 0x10 |
||||
#define PCI_IO_BASE_ADDR_MASK 0xfffffff0 |
||||
|
||||
#define PCI_MEM_BASE_ADDR_LOW 0x10 |
||||
#define PCI_MEM_BASE_ADDR_HIGH 0x14 |
||||
|
||||
#define PCI_SUBSYSTEM_VENDOR_ID_REG 0x2c |
||||
#define PCI_SUBSYSTEM_ID_REG 0x2e |
||||
#define PCI_INT_LINE_REG 0x3c |
||||
|
||||
#define PCIX_CAP_REG 0x40 |
||||
#define PCIX_ENABLE_RELAXED_ORDERING BIT_17 |
||||
|
||||
/******************************************************************************/ |
||||
/* Fragment structure. */ |
||||
/******************************************************************************/ |
||||
|
||||
typedef struct { |
||||
LM_UINT32 FragSize; |
||||
LM_PHYSICAL_ADDRESS FragBuf; |
||||
} LM_FRAG, *PLM_FRAG; |
||||
|
||||
typedef struct { |
||||
/* FragCount is initialized for the caller to the maximum array size, on */ |
||||
/* return FragCount is the number of the actual fragments in the array. */ |
||||
LM_UINT32 FragCount; |
||||
|
||||
/* Total buffer size. */ |
||||
LM_UINT32 TotalSize; |
||||
|
||||
/* Fragment array buffer. */ |
||||
LM_FRAG Fragments[1]; |
||||
} LM_FRAG_LIST, *PLM_FRAG_LIST; |
||||
|
||||
#define DECLARE_FRAG_LIST_BUFFER_TYPE(_FRAG_LIST_TYPE_NAME, _MAX_FRAG_COUNT) \ |
||||
typedef struct { \
|
||||
LM_FRAG_LIST FragList; \
|
||||
LM_FRAG FragListBuffer[_MAX_FRAG_COUNT-1]; \
|
||||
} _FRAG_LIST_TYPE_NAME, *P##_FRAG_LIST_TYPE_NAME |
||||
|
||||
/******************************************************************************/ |
||||
/* Status codes. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define LM_STATUS_SUCCESS 0 |
||||
#define LM_STATUS_FAILURE 1 |
||||
|
||||
#define LM_STATUS_INTERRUPT_ACTIVE 2 |
||||
#define LM_STATUS_INTERRUPT_NOT_ACTIVE 3 |
||||
|
||||
#define LM_STATUS_LINK_ACTIVE 4 |
||||
#define LM_STATUS_LINK_DOWN 5 |
||||
#define LM_STATUS_LINK_SETTING_MISMATCH 6 |
||||
|
||||
#define LM_STATUS_TOO_MANY_FRAGMENTS 7 |
||||
#define LM_STATUS_TRANSMIT_ABORTED 8 |
||||
#define LM_STATUS_TRANSMIT_ERROR 9 |
||||
#define LM_STATUS_RECEIVE_ABORTED 10 |
||||
#define LM_STATUS_RECEIVE_ERROR 11 |
||||
#define LM_STATUS_INVALID_PACKET_SIZE 12 |
||||
#define LM_STATUS_OUT_OF_MAP_REGISTERS 13 |
||||
#define LM_STATUS_UNKNOWN_ADAPTER 14 |
||||
|
||||
typedef LM_UINT LM_STATUS, *PLM_STATUS; |
||||
|
||||
/******************************************************************************/ |
||||
/* Requested media type. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define LM_REQUESTED_MEDIA_TYPE_AUTO 0 |
||||
#define LM_REQUESTED_MEDIA_TYPE_BNC 1 |
||||
#define LM_REQUESTED_MEDIA_TYPE_UTP_AUTO 2 |
||||
#define LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS 3 |
||||
#define LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS_FULL_DUPLEX 4 |
||||
#define LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS 5 |
||||
#define LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS_FULL_DUPLEX 6 |
||||
#define LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS 7 |
||||
#define LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS_FULL_DUPLEX 8 |
||||
#define LM_REQUESTED_MEDIA_TYPE_FIBER_100MBPS 9 |
||||
#define LM_REQUESTED_MEDIA_TYPE_FIBER_100MBPS_FULL_DUPLEX 10 |
||||
#define LM_REQUESTED_MEDIA_TYPE_FIBER_1000MBPS 11 |
||||
#define LM_REQUESTED_MEDIA_TYPE_FIBER_1000MBPS_FULL_DUPLEX 12 |
||||
#define LM_REQUESTED_MEDIA_TYPE_MAC_LOOPBACK 0xfffe |
||||
#define LM_REQUESTED_MEDIA_TYPE_PHY_LOOPBACK 0xffff |
||||
|
||||
typedef LM_UINT32 LM_REQUESTED_MEDIA_TYPE, *PLM_REQUESTED_MEDIA_TYPE; |
||||
|
||||
/******************************************************************************/ |
||||
/* Media type. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define LM_MEDIA_TYPE_UNKNOWN -1 |
||||
#define LM_MEDIA_TYPE_AUTO 0 |
||||
#define LM_MEDIA_TYPE_UTP 1 |
||||
#define LM_MEDIA_TYPE_BNC 2 |
||||
#define LM_MEDIA_TYPE_AUI 3 |
||||
#define LM_MEDIA_TYPE_FIBER 4 |
||||
|
||||
typedef LM_UINT32 LM_MEDIA_TYPE, *PLM_MEDIA_TYPE; |
||||
|
||||
/******************************************************************************/ |
||||
/* Line speed. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define LM_LINE_SPEED_UNKNOWN 0 |
||||
#define LM_LINE_SPEED_10MBPS 1 |
||||
#define LM_LINE_SPEED_100MBPS 2 |
||||
#define LM_LINE_SPEED_1000MBPS 3 |
||||
|
||||
typedef LM_UINT32 LM_LINE_SPEED, *PLM_LINE_SPEED; |
||||
|
||||
/******************************************************************************/ |
||||
/* Duplex mode. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define LM_DUPLEX_MODE_UNKNOWN 0 |
||||
#define LM_DUPLEX_MODE_HALF 1 |
||||
#define LM_DUPLEX_MODE_FULL 2 |
||||
|
||||
typedef LM_UINT32 LM_DUPLEX_MODE, *PLM_DUPLEX_MODE; |
||||
|
||||
/******************************************************************************/ |
||||
/* Power state. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define LM_POWER_STATE_D0 0 |
||||
#define LM_POWER_STATE_D1 1 |
||||
#define LM_POWER_STATE_D2 2 |
||||
#define LM_POWER_STATE_D3 3 |
||||
|
||||
typedef LM_UINT32 LM_POWER_STATE, *PLM_POWER_STATE; |
||||
|
||||
/******************************************************************************/ |
||||
/* Task offloading. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define LM_TASK_OFFLOAD_NONE 0x0000 |
||||
#define LM_TASK_OFFLOAD_TX_IP_CHECKSUM 0x0001 |
||||
#define LM_TASK_OFFLOAD_RX_IP_CHECKSUM 0x0002 |
||||
#define LM_TASK_OFFLOAD_TX_TCP_CHECKSUM 0x0004 |
||||
#define LM_TASK_OFFLOAD_RX_TCP_CHECKSUM 0x0008 |
||||
#define LM_TASK_OFFLOAD_TX_UDP_CHECKSUM 0x0010 |
||||
#define LM_TASK_OFFLOAD_RX_UDP_CHECKSUM 0x0020 |
||||
#define LM_TASK_OFFLOAD_TCP_SEGMENTATION 0x0040 |
||||
|
||||
typedef LM_UINT32 LM_TASK_OFFLOAD, *PLM_TASK_OFFLOAD; |
||||
|
||||
/******************************************************************************/ |
||||
/* Flow control. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define LM_FLOW_CONTROL_NONE 0x00 |
||||
#define LM_FLOW_CONTROL_RECEIVE_PAUSE 0x01 |
||||
#define LM_FLOW_CONTROL_TRANSMIT_PAUSE 0x02 |
||||
#define LM_FLOW_CONTROL_RX_TX_PAUSE (LM_FLOW_CONTROL_RECEIVE_PAUSE | \ |
||||
LM_FLOW_CONTROL_TRANSMIT_PAUSE) |
||||
|
||||
/* This value can be or-ed with RECEIVE_PAUSE and TRANSMIT_PAUSE. If the */ |
||||
/* auto-negotiation is disabled and the RECEIVE_PAUSE and TRANSMIT_PAUSE */ |
||||
/* bits are set, then flow control is enabled regardless of link partner's */ |
||||
/* flow control capability. */ |
||||
#define LM_FLOW_CONTROL_AUTO_PAUSE 0x80000000 |
||||
|
||||
typedef LM_UINT32 LM_FLOW_CONTROL, *PLM_FLOW_CONTROL; |
||||
|
||||
/******************************************************************************/ |
||||
/* Wake up mode. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define LM_WAKE_UP_MODE_NONE 0 |
||||
#define LM_WAKE_UP_MODE_MAGIC_PACKET 1 |
||||
#define LM_WAKE_UP_MODE_NWUF 2 |
||||
#define LM_WAKE_UP_MODE_LINK_CHANGE 4 |
||||
|
||||
typedef LM_UINT32 LM_WAKE_UP_MODE, *PLM_WAKE_UP_MODE; |
||||
|
||||
/******************************************************************************/ |
||||
/* Counters. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define LM_COUNTER_FRAMES_XMITTED_OK 0 |
||||
#define LM_COUNTER_FRAMES_RECEIVED_OK 1 |
||||
#define LM_COUNTER_ERRORED_TRANSMIT_COUNT 2 |
||||
#define LM_COUNTER_ERRORED_RECEIVE_COUNT 3 |
||||
#define LM_COUNTER_RCV_CRC_ERROR 4 |
||||
#define LM_COUNTER_ALIGNMENT_ERROR 5 |
||||
#define LM_COUNTER_SINGLE_COLLISION_FRAMES 6 |
||||
#define LM_COUNTER_MULTIPLE_COLLISION_FRAMES 7 |
||||
#define LM_COUNTER_FRAMES_DEFERRED 8 |
||||
#define LM_COUNTER_MAX_COLLISIONS 9 |
||||
#define LM_COUNTER_RCV_OVERRUN 10 |
||||
#define LM_COUNTER_XMIT_UNDERRUN 11 |
||||
#define LM_COUNTER_UNICAST_FRAMES_XMIT 12 |
||||
#define LM_COUNTER_MULTICAST_FRAMES_XMIT 13 |
||||
#define LM_COUNTER_BROADCAST_FRAMES_XMIT 14 |
||||
#define LM_COUNTER_UNICAST_FRAMES_RCV 15 |
||||
#define LM_COUNTER_MULTICAST_FRAMES_RCV 16 |
||||
#define LM_COUNTER_BROADCAST_FRAMES_RCV 17 |
||||
|
||||
typedef LM_UINT32 LM_COUNTER_TYPE, *PLM_COUNTER_TYPE; |
||||
|
||||
/******************************************************************************/ |
||||
/* Forward definition. */ |
||||
/******************************************************************************/ |
||||
|
||||
typedef struct _LM_DEVICE_BLOCK *PLM_DEVICE_BLOCK; |
||||
typedef struct _LM_PACKET *PLM_PACKET; |
||||
|
||||
/******************************************************************************/ |
||||
/* Function prototypes. */ |
||||
/******************************************************************************/ |
||||
|
||||
LM_STATUS LM_GetAdapterInfo (PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_InitializeAdapter (PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_ResetAdapter (PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_DisableInterrupt (PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_EnableInterrupt (PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_SendPacket (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket); |
||||
LM_STATUS LM_ServiceInterrupts (PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_QueueRxPackets (PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_SetReceiveMask (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Mask); |
||||
LM_STATUS LM_Halt (PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_Abort (PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_MulticastAdd (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMcAddress); |
||||
LM_STATUS LM_MulticastDel (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMcAddress); |
||||
LM_STATUS LM_MulticastClear (PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_SetMacAddress (PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_LoopbackAddress (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pAddress); |
||||
|
||||
LM_UINT32 LM_GetCrcCounter (PLM_DEVICE_BLOCK pDevice); |
||||
|
||||
LM_WAKE_UP_MODE LM_PMCapabilities (PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_NwufAdd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 ByteMaskSize, |
||||
LM_UINT8 * pByteMask, LM_UINT8 * pPattern); |
||||
LM_STATUS LM_NwufRemove (PLM_DEVICE_BLOCK pDevice, LM_UINT32 ByteMaskSize, |
||||
LM_UINT8 * pByteMask, LM_UINT8 * pPattern); |
||||
LM_STATUS LM_SetPowerState (PLM_DEVICE_BLOCK pDevice, |
||||
LM_POWER_STATE PowerLevel); |
||||
|
||||
LM_VOID LM_ReadPhy (PLM_DEVICE_BLOCK pDevice, LM_UINT32 PhyReg, |
||||
PLM_UINT32 pData32); |
||||
LM_VOID LM_WritePhy (PLM_DEVICE_BLOCK pDevice, LM_UINT32 PhyReg, |
||||
LM_UINT32 Data32); |
||||
|
||||
LM_STATUS LM_ControlLoopBack (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Control); |
||||
LM_STATUS LM_SetupPhy (PLM_DEVICE_BLOCK pDevice); |
||||
int LM_BlinkLED (PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlinkDuration); |
||||
|
||||
/******************************************************************************/ |
||||
/* These are the OS specific functions called by LMAC. */ |
||||
/******************************************************************************/ |
||||
|
||||
LM_STATUS MM_ReadConfig16 (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, |
||||
LM_UINT16 * pValue16); |
||||
LM_STATUS MM_WriteConfig16 (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, |
||||
LM_UINT16 Value16); |
||||
LM_STATUS MM_ReadConfig32 (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, |
||||
LM_UINT32 * pValue32); |
||||
LM_STATUS MM_WriteConfig32 (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, |
||||
LM_UINT32 Value32); |
||||
LM_STATUS MM_MapMemBase (PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS MM_MapIoBase (PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS MM_IndicateRxPackets (PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS MM_IndicateTxPackets (PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS MM_StartTxDma (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket); |
||||
LM_STATUS MM_CompleteTxDma (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket); |
||||
LM_STATUS MM_AllocateMemory (PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize, |
||||
PLM_VOID * pMemoryBlockVirt); |
||||
LM_STATUS MM_AllocateSharedMemory (PLM_DEVICE_BLOCK pDevice, |
||||
LM_UINT32 BlockSize, |
||||
PLM_VOID * pMemoryBlockVirt, |
||||
PLM_PHYSICAL_ADDRESS pMemoryBlockPhy, |
||||
LM_BOOL Cached); |
||||
LM_STATUS MM_GetConfig (PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS MM_IndicateStatus (PLM_DEVICE_BLOCK pDevice, LM_STATUS Status); |
||||
LM_STATUS MM_InitializeUmPackets (PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS MM_FreeRxBuffer (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket); |
||||
LM_STATUS MM_CoalesceTxBuffer (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket); |
||||
LM_STATUS LM_MbufWorkAround (PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_SetLinkSpeed (PLM_DEVICE_BLOCK pDevice, |
||||
LM_REQUESTED_MEDIA_TYPE RequestedMediaType); |
||||
|
||||
#if INCLUDE_5703_A0_FIX |
||||
LM_STATUS LM_Load5703DmaWFirmware (PLM_DEVICE_BLOCK pDevice); |
||||
#endif |
||||
|
||||
#endif /* LM_H */ |
@ -1,158 +0,0 @@ |
||||
|
||||
/******************************************************************************/ |
||||
/* */ |
||||
/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 Broadcom */ |
||||
/* Corporation. */ |
||||
/* All rights reserved. */ |
||||
/* */ |
||||
/* This program is free software; you can redistribute it and/or modify */ |
||||
/* it under the terms of the GNU General Public License as published by */ |
||||
/* the Free Software Foundation, located in the file LICENSE. */ |
||||
/* */ |
||||
/******************************************************************************/ |
||||
|
||||
#ifndef MM_H |
||||
#define MM_H |
||||
|
||||
#define __raw_readl readl |
||||
#define __raw_writel writel |
||||
|
||||
#define BIG_ENDIAN_HOST 1 |
||||
#define readl(addr) (*(volatile unsigned int*)(addr)) |
||||
#define writel(b,addr) ((*(volatile unsigned int *) (addr)) = (b)) |
||||
|
||||
/* Define memory barrier function here if needed */ |
||||
#define wmb() |
||||
#define membar() |
||||
#include <common.h> |
||||
#include <asm/types.h> |
||||
#include "bcm570x_lm.h" |
||||
#include "bcm570x_queue.h" |
||||
#include "tigon3.h" |
||||
#include <pci.h> |
||||
|
||||
#define FALSE 0 |
||||
#define TRUE 1 |
||||
#define ERROR -1 |
||||
|
||||
#if DBG |
||||
#define STATIC |
||||
#else |
||||
#define STATIC static |
||||
#endif |
||||
|
||||
extern int MM_Packet_Desc_Size; |
||||
|
||||
#define MM_PACKET_DESC_SIZE MM_Packet_Desc_Size |
||||
|
||||
DECLARE_QUEUE_TYPE (UM_RX_PACKET_Q, MAX_RX_PACKET_DESC_COUNT + 1); |
||||
|
||||
#define MAX_MEM 16 |
||||
|
||||
/* Synch */ |
||||
typedef int mutex_t; |
||||
typedef int spinlock_t; |
||||
|
||||
/* Embedded device control */ |
||||
typedef struct _UM_DEVICE_BLOCK { |
||||
LM_DEVICE_BLOCK lm_dev; |
||||
pci_dev_t pdev; |
||||
char *name; |
||||
void *mem_list[MAX_MEM]; |
||||
dma_addr_t dma_list[MAX_MEM]; |
||||
int mem_size_list[MAX_MEM]; |
||||
int mem_list_num; |
||||
int mtu; |
||||
int index; |
||||
int opened; |
||||
int delayed_link_ind; /* Delay link status during initial load */ |
||||
int adapter_just_inited; /* the first few seconds after init. */ |
||||
int spurious_int; /* new -- unsupported */ |
||||
int timer_interval; |
||||
int adaptive_expiry; |
||||
int crc_counter_expiry; /* new -- unsupported */ |
||||
int poll_tib_expiry; /* new -- unsupported */ |
||||
int tx_full; |
||||
int tx_queued; |
||||
int line_speed; /* in Mbps, 0 if link is down */ |
||||
UM_RX_PACKET_Q rx_out_of_buf_q; |
||||
int rx_out_of_buf; |
||||
int rx_low_buf_thresh; /* changed to rx_buf_repl_thresh */ |
||||
int rx_buf_repl_panic_thresh; |
||||
int rx_buf_align; /* new -- unsupported */ |
||||
int do_global_lock; |
||||
mutex_t global_lock; |
||||
mutex_t undi_lock; |
||||
long undi_flags; |
||||
volatile int interrupt; |
||||
int tasklet_pending; |
||||
int tasklet_busy; /* new -- unsupported */ |
||||
int rx_pkt; |
||||
int tx_pkt; |
||||
#ifdef NICE_SUPPORT /* unsupported, this is a linux ioctl */ |
||||
void (*nice_rx) (void *, void *); |
||||
void *nice_ctx; |
||||
#endif /* NICE_SUPPORT */ |
||||
int rx_adaptive_coalesce; |
||||
unsigned int rx_last_cnt; |
||||
unsigned int tx_last_cnt; |
||||
unsigned int rx_curr_coalesce_frames; |
||||
unsigned int rx_curr_coalesce_ticks; |
||||
unsigned int tx_curr_coalesce_frames; /* new -- unsupported */ |
||||
#if TIGON3_DEBUG /* new -- unsupported */ |
||||
uint tx_zc_count; |
||||
uint tx_chksum_count; |
||||
uint tx_himem_count; |
||||
uint rx_good_chksum_count; |
||||
#endif |
||||
unsigned int rx_bad_chksum_count; /* new -- unsupported */ |
||||
unsigned int rx_misc_errors; /* new -- unsupported */ |
||||
} UM_DEVICE_BLOCK, *PUM_DEVICE_BLOCK; |
||||
|
||||
/* Physical/PCI DMA address */ |
||||
typedef union { |
||||
dma_addr_t dma_map; |
||||
} dma_map_t; |
||||
|
||||
/* Packet */ |
||||
typedef struct |
||||
_UM_PACKET { |
||||
LM_PACKET lm_packet; |
||||
void *skbuff; /* Address of packet buffer */ |
||||
} UM_PACKET, *PUM_PACKET; |
||||
|
||||
#define MM_ACQUIRE_UNDI_LOCK(_pDevice) |
||||
#define MM_RELEASE_UNDI_LOCK(_pDevice) |
||||
#define MM_ACQUIRE_INT_LOCK(_pDevice) |
||||
#define MM_RELEASE_INT_LOCK(_pDevice) |
||||
#define MM_UINT_PTR(_ptr) ((unsigned long) (_ptr)) |
||||
|
||||
/* Macro for setting 64bit address struct */ |
||||
#define set_64bit_addr(paddr, low, high) \ |
||||
(paddr)->Low = low; \
|
||||
(paddr)->High = high; |
||||
|
||||
/* Assume that PCI controller's view of host memory is same as host */ |
||||
|
||||
#define MEM_TO_PCI_PHYS(addr) (addr) |
||||
|
||||
extern void MM_SetAddr (LM_PHYSICAL_ADDRESS * paddr, dma_addr_t addr); |
||||
extern void MM_SetT3Addr (T3_64BIT_HOST_ADDR * paddr, dma_addr_t addr); |
||||
extern void MM_MapTxDma (PLM_DEVICE_BLOCK pDevice, |
||||
struct _LM_PACKET *pPacket, T3_64BIT_HOST_ADDR * paddr, |
||||
LM_UINT32 * len, int frag); |
||||
extern void MM_MapRxDma (PLM_DEVICE_BLOCK pDevice, |
||||
struct _LM_PACKET *pPacket, |
||||
T3_64BIT_HOST_ADDR * paddr); |
||||
|
||||
/* BSP needs to provide sysUsecDelay and sysSerialPrintString */ |
||||
extern void sysSerialPrintString (char *s); |
||||
#define MM_Wait(usec) udelay(usec) |
||||
|
||||
/* Define memory barrier function here if needed */ |
||||
#define wmb() |
||||
|
||||
#if 0 |
||||
#define cpu_to_le32(val) LONGSWAP(val) |
||||
#endif |
||||
#endif /* MM_H */ |
@ -1,387 +0,0 @@ |
||||
|
||||
/******************************************************************************/ |
||||
/* */ |
||||
/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 Broadcom */ |
||||
/* Corporation. */ |
||||
/* All rights reserved. */ |
||||
/* */ |
||||
/* This program is free software; you can redistribute it and/or modify */ |
||||
/* it under the terms of the GNU General Public License as published by */ |
||||
/* the Free Software Foundation, located in the file LICENSE. */ |
||||
/* */ |
||||
/* Queue functions. */ |
||||
/* void QQ_InitQueue(PQQ_CONTAINER pQueue) */ |
||||
/* char QQ_Full(PQQ_CONTAINER pQueue) */ |
||||
/* char QQ_Empty(PQQ_CONTAINER pQueue) */ |
||||
/* unsigned int QQ_GetSize(PQQ_CONTAINER pQueue) */ |
||||
/* unsigned int QQ_GetEntryCnt(PQQ_CONTAINER pQueue) */ |
||||
/* char QQ_PushHead(PQQ_CONTAINER pQueue, PQQ_ENTRY pEntry) */ |
||||
/* char QQ_PushTail(PQQ_CONTAINER pQueue, PQQ_ENTRY pEntry) */ |
||||
/* PQQ_ENTRY QQ_PopHead(PQQ_CONTAINER pQueue) */ |
||||
/* PQQ_ENTRY QQ_PopTail(PQQ_CONTAINER pQueue) */ |
||||
/* PQQ_ENTRY QQ_GetHead(PQQ_CONTAINER pQueue, unsigned int Idx) */ |
||||
/* PQQ_ENTRY QQ_GetTail(PQQ_CONTAINER pQueue, unsigned int Idx) */ |
||||
/* */ |
||||
/* */ |
||||
/* History: */ |
||||
/* 02/25/00 Hav Khauv Initial version. */ |
||||
/******************************************************************************/ |
||||
|
||||
#ifndef BCM_QUEUE_H |
||||
#define BCM_QUEUE_H |
||||
#ifndef EMBEDDED |
||||
#define EMBEDDED 1 |
||||
#endif |
||||
|
||||
/******************************************************************************/ |
||||
/* Queue definitions. */ |
||||
/******************************************************************************/ |
||||
|
||||
/* Entry for queueing. */ |
||||
typedef void *PQQ_ENTRY; |
||||
|
||||
/* Linux Atomic Ops support */ |
||||
typedef struct { int counter; } atomic_t; |
||||
|
||||
|
||||
/*
|
||||
* This combination of `inline' and `extern' has almost the effect of a |
||||
* macro. The way to use it is to put a function definition in a header |
||||
* file with these keywords, and put another copy of the definition |
||||
* (lacking `inline' and `extern') in a library file. The definition in |
||||
* the header file will cause most calls to the function to be inlined. |
||||
* If any uses of the function remain, they will refer to the single copy |
||||
* in the library. |
||||
*/ |
||||
extern __inline void |
||||
atomic_set(atomic_t* entry, int val) |
||||
{ |
||||
entry->counter = val; |
||||
} |
||||
extern __inline int |
||||
atomic_read(atomic_t* entry) |
||||
{ |
||||
return entry->counter; |
||||
} |
||||
extern __inline void |
||||
atomic_inc(atomic_t* entry) |
||||
{ |
||||
if(entry) |
||||
entry->counter++; |
||||
} |
||||
|
||||
extern __inline void |
||||
atomic_dec(atomic_t* entry) |
||||
{ |
||||
if(entry) |
||||
entry->counter--; |
||||
} |
||||
|
||||
extern __inline void |
||||
atomic_sub(int a, atomic_t* entry) |
||||
{ |
||||
if(entry) |
||||
entry->counter -= a; |
||||
} |
||||
extern __inline void |
||||
atomic_add(int a, atomic_t* entry) |
||||
{ |
||||
if(entry) |
||||
entry->counter += a; |
||||
} |
||||
|
||||
|
||||
/* Queue header -- base type. */ |
||||
typedef struct { |
||||
unsigned int Head; |
||||
unsigned int Tail; |
||||
unsigned int Size; |
||||
atomic_t EntryCnt; |
||||
PQQ_ENTRY Array[1]; |
||||
} QQ_CONTAINER, *PQQ_CONTAINER; |
||||
|
||||
|
||||
/* Declare queue type macro. */ |
||||
#define DECLARE_QUEUE_TYPE(_QUEUE_TYPE, _QUEUE_SIZE) \ |
||||
\
|
||||
typedef struct { \
|
||||
QQ_CONTAINER Container; \
|
||||
PQQ_ENTRY EntryBuffer[_QUEUE_SIZE]; \
|
||||
} _QUEUE_TYPE, *P##_QUEUE_TYPE |
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Compilation switches. */ |
||||
/******************************************************************************/ |
||||
|
||||
#if DBG |
||||
#undef QQ_NO_OVERFLOW_CHECK |
||||
#undef QQ_NO_UNDERFLOW_CHECK |
||||
#endif /* DBG */ |
||||
|
||||
#ifdef QQ_USE_MACROS |
||||
/* notdone */ |
||||
#else |
||||
|
||||
#ifdef QQ_NO_INLINE |
||||
#define __inline |
||||
#endif /* QQ_NO_INLINE */ |
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
extern __inline void |
||||
QQ_InitQueue( |
||||
PQQ_CONTAINER pQueue, |
||||
unsigned int QueueSize) { |
||||
pQueue->Head = 0; |
||||
pQueue->Tail = 0; |
||||
pQueue->Size = QueueSize+1; |
||||
atomic_set(&pQueue->EntryCnt, 0); |
||||
} /* QQ_InitQueue */ |
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
extern __inline char |
||||
QQ_Full( |
||||
PQQ_CONTAINER pQueue) { |
||||
unsigned int NewHead; |
||||
|
||||
NewHead = (pQueue->Head + 1) % pQueue->Size; |
||||
|
||||
return(NewHead == pQueue->Tail); |
||||
} /* QQ_Full */ |
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
extern __inline char |
||||
QQ_Empty( |
||||
PQQ_CONTAINER pQueue) { |
||||
return(pQueue->Head == pQueue->Tail); |
||||
} /* QQ_Empty */ |
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
extern __inline unsigned int |
||||
QQ_GetSize( |
||||
PQQ_CONTAINER pQueue) { |
||||
return pQueue->Size; |
||||
} /* QQ_GetSize */ |
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
extern __inline unsigned int |
||||
QQ_GetEntryCnt( |
||||
PQQ_CONTAINER pQueue) { |
||||
return atomic_read(&pQueue->EntryCnt); |
||||
} /* QQ_GetEntryCnt */ |
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/* TRUE entry was added successfully. */ |
||||
/* FALSE queue is full. */ |
||||
/******************************************************************************/ |
||||
extern __inline char |
||||
QQ_PushHead( |
||||
PQQ_CONTAINER pQueue, |
||||
PQQ_ENTRY pEntry) { |
||||
unsigned int Head; |
||||
|
||||
Head = (pQueue->Head + 1) % pQueue->Size; |
||||
|
||||
#if !defined(QQ_NO_OVERFLOW_CHECK) |
||||
if(Head == pQueue->Tail) { |
||||
return 0; |
||||
} /* if */ |
||||
#endif /* QQ_NO_OVERFLOW_CHECK */ |
||||
|
||||
pQueue->Array[pQueue->Head] = pEntry; |
||||
wmb(); |
||||
pQueue->Head = Head; |
||||
atomic_inc(&pQueue->EntryCnt); |
||||
|
||||
return -1; |
||||
} /* QQ_PushHead */ |
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/* TRUE entry was added successfully. */ |
||||
/* FALSE queue is full. */ |
||||
/******************************************************************************/ |
||||
extern __inline char |
||||
QQ_PushTail( |
||||
PQQ_CONTAINER pQueue, |
||||
PQQ_ENTRY pEntry) { |
||||
unsigned int Tail; |
||||
|
||||
Tail = pQueue->Tail; |
||||
if(Tail == 0) { |
||||
Tail = pQueue->Size; |
||||
} /* if */ |
||||
Tail--; |
||||
|
||||
#if !defined(QQ_NO_OVERFLOW_CHECK) |
||||
if(Tail == pQueue->Head) { |
||||
return 0; |
||||
} /* if */ |
||||
#endif /* QQ_NO_OVERFLOW_CHECK */ |
||||
|
||||
pQueue->Array[Tail] = pEntry; |
||||
wmb(); |
||||
pQueue->Tail = Tail; |
||||
atomic_inc(&pQueue->EntryCnt); |
||||
|
||||
return -1; |
||||
} /* QQ_PushTail */ |
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
extern __inline PQQ_ENTRY |
||||
QQ_PopHead( |
||||
PQQ_CONTAINER pQueue) { |
||||
unsigned int Head; |
||||
PQQ_ENTRY Entry; |
||||
|
||||
Head = pQueue->Head; |
||||
|
||||
#if !defined(QQ_NO_UNDERFLOW_CHECK) |
||||
if(Head == pQueue->Tail) { |
||||
return (PQQ_ENTRY) 0; |
||||
} /* if */ |
||||
#endif /* QQ_NO_UNDERFLOW_CHECK */ |
||||
|
||||
if(Head == 0) { |
||||
Head = pQueue->Size; |
||||
} /* if */ |
||||
Head--; |
||||
|
||||
Entry = pQueue->Array[Head]; |
||||
#ifdef EMBEDDED |
||||
membar(); |
||||
#else |
||||
mb(); |
||||
#endif |
||||
pQueue->Head = Head; |
||||
atomic_dec(&pQueue->EntryCnt); |
||||
|
||||
return Entry; |
||||
} /* QQ_PopHead */ |
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
extern __inline PQQ_ENTRY |
||||
QQ_PopTail( |
||||
PQQ_CONTAINER pQueue) { |
||||
unsigned int Tail; |
||||
PQQ_ENTRY Entry; |
||||
|
||||
Tail = pQueue->Tail; |
||||
|
||||
#if !defined(QQ_NO_UNDERFLOW_CHECK) |
||||
if(Tail == pQueue->Head) { |
||||
return (PQQ_ENTRY) 0; |
||||
} /* if */ |
||||
#endif /* QQ_NO_UNDERFLOW_CHECK */ |
||||
|
||||
Entry = pQueue->Array[Tail]; |
||||
#ifdef EMBEDDED |
||||
membar(); |
||||
#else |
||||
mb(); |
||||
#endif |
||||
pQueue->Tail = (Tail + 1) % pQueue->Size; |
||||
atomic_dec(&pQueue->EntryCnt); |
||||
|
||||
return Entry; |
||||
} /* QQ_PopTail */ |
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
extern __inline PQQ_ENTRY |
||||
QQ_GetHead( |
||||
PQQ_CONTAINER pQueue, |
||||
unsigned int Idx) |
||||
{ |
||||
if(Idx >= atomic_read(&pQueue->EntryCnt)) |
||||
{ |
||||
return (PQQ_ENTRY) 0; |
||||
} |
||||
|
||||
if(pQueue->Head > Idx) |
||||
{ |
||||
Idx = pQueue->Head - Idx; |
||||
} |
||||
else |
||||
{ |
||||
Idx = pQueue->Size - (Idx - pQueue->Head); |
||||
} |
||||
Idx--; |
||||
|
||||
return pQueue->Array[Idx]; |
||||
} |
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
extern __inline PQQ_ENTRY |
||||
QQ_GetTail( |
||||
PQQ_CONTAINER pQueue, |
||||
unsigned int Idx) |
||||
{ |
||||
if(Idx >= atomic_read(&pQueue->EntryCnt)) |
||||
{ |
||||
return (PQQ_ENTRY) 0; |
||||
} |
||||
|
||||
Idx += pQueue->Tail; |
||||
if(Idx >= pQueue->Size) |
||||
{ |
||||
Idx = Idx - pQueue->Size; |
||||
} |
||||
|
||||
return pQueue->Array[Idx]; |
||||
} |
||||
|
||||
#endif /* QQ_USE_MACROS */ |
||||
|
||||
|
||||
#endif /* QUEUE_H */ |
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
Loading…
Reference in new issue