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@ -239,11 +239,17 @@ |
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#define CONFIG_SYS_GRER1_VAL 0x00000000 |
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#define CONFIG_SYS_GRER2_VAL 0x00000000 |
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#define CONFIG_SYS_GRER3_VAL 0x00000000 |
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#define CONFIG_SYS_GFER0_VAL 0x00000000 |
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#define CONFIG_SYS_GFER1_VAL 0x00000000 |
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#define CONFIG_SYS_GFER2_VAL 0x00000000 |
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#define CONFIG_SYS_GFER3_VAL 0x00000020 |
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#if CONFIG_POLARIS |
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#define CONFIG_SYS_GFER0_VAL 0x00000001 |
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#define CONFIG_SYS_GFER2_VAL 0x00200000 |
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#else |
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#define CONFIG_SYS_GFER0_VAL 0x00000000 |
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#define CONFIG_SYS_GFER2_VAL 0x00000000 |
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#endif |
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#define CONFIG_SYS_PSSR_VAL 0x20 /* CHECK */ |
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@ -259,7 +265,11 @@ |
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#define CONFIG_SYS_MSC0_VAL 0x4df84df0 |
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#define CONFIG_SYS_MSC1_VAL 0x7ff87ff4 |
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#if CONFIG_POLARIS |
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#define CONFIG_SYS_MSC2_VAL 0xa2697ff8 |
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#else |
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#define CONFIG_SYS_MSC2_VAL 0xa26936d4 |
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#endif |
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#define CONFIG_SYS_MDCNFG_VAL 0x880009C9 |
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#define CONFIG_SYS_MDREFR_VAL 0x20ca201e |
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#define CONFIG_SYS_MDMRS_VAL 0x00220022 |
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@ -280,7 +290,13 @@ |
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#define CONFIG_NET_MULTI 1 |
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#define CONFIG_DRIVER_DM9000 1 |
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#define CONFIG_DM9000_BASE 0x08000000 |
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#if CONFIG_POLARIS |
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#define CONFIG_DM9000_BASE 0x0C800000 |
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#else |
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#define CONFIG_DM9000_BASE 0x08000000 |
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#endif |
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#define DM9000_IO CONFIG_DM9000_BASE |
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#define DM9000_DATA (CONFIG_DM9000_BASE+0x8004) |
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@ -312,6 +328,9 @@ |
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/* write flash less slowly */ |
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 |
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/* Unlock to be used with Intel chips */ |
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#define CONFIG_SYS_FLASH_PROTECTION 1 |
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/* Flash environment locations */ |
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#define CONFIG_ENV_IS_IN_FLASH 1 |
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#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + CONFIG_SYS_MONITOR_LEN) /* Addr of Environment Sector */ |
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