diff --git a/arch/arm/mach-socfpga/include/mach/sdram.h b/arch/arm/mach-socfpga/include/mach/sdram.h
index c139a28..901cd9b 100644
--- a/arch/arm/mach-socfpga/include/mach/sdram.h
+++ b/arch/arm/mach-socfpga/include/mach/sdram.h
@@ -14,6 +14,9 @@ int sdram_calibration_full(void);
 
 const struct socfpga_sdram_config *socfpga_get_sdram_config(void);
 
+void socfpga_get_seq_ac_init(const u32 **init, unsigned int *nelem);
+void socfpga_get_seq_inst_init(const u32 **init, unsigned int *nelem);
+
 #define SDR_CTRLGRP_ADDRESS	(SOCFPGA_SDR_ADDRESS | 0x5000)
 
 struct socfpga_sdr_ctrl {
diff --git a/board/altera/socfpga/wrap_sdram_config.c b/board/altera/socfpga/wrap_sdram_config.c
index c70854e..d87bec0 100644
--- a/board/altera/socfpga/wrap_sdram_config.c
+++ b/board/altera/socfpga/wrap_sdram_config.c
@@ -10,6 +10,9 @@
 /* QTS output file. */
 #include "qts/sdram_config.h"
 
+#include "qts/sequencer_auto_ac_init.h"
+#include "qts/sequencer_auto_inst_init.h"
+
 static const struct socfpga_sdram_config sdram_config = {
 	.ctrl_cfg =
 		(CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE <<
@@ -183,3 +186,15 @@ const struct socfpga_sdram_config *socfpga_get_sdram_config(void)
 {
 	return &sdram_config;
 }
+
+void socfpga_get_seq_ac_init(const u32 **init, unsigned int *nelem)
+{
+	*init = ac_rom_init;
+	*nelem = ARRAY_SIZE(ac_rom_init);
+}
+
+void socfpga_get_seq_inst_init(const u32 **init, unsigned int *nelem)
+{
+	*init = inst_rom_init;
+	*nelem = ARRAY_SIZE(inst_rom_init);
+}
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c
index 06a3bf6..31e339b 100644
--- a/drivers/ddr/altera/sequencer.c
+++ b/drivers/ddr/altera/sequencer.c
@@ -15,8 +15,6 @@
  *        a proper thorough cleanup.
  */
 #include "../../../board/altera/socfpga/qts/sequencer_auto.h"
-#include "../../../board/altera/socfpga/qts/sequencer_auto_ac_init.h"
-#include "../../../board/altera/socfpga/qts/sequencer_auto_inst_init.h"
 #include "../../../board/altera/socfpga/qts/sequencer_defines.h"
 
 static struct socfpga_sdr_rw_load_manager *sdr_rw_load_mgr_regs =
@@ -3561,15 +3559,19 @@ static void debug_mem_calibrate(int pass)
  */
 static void hc_initialize_rom_data(void)
 {
+	unsigned int nelem = 0;
+	const u32 *rom_init;
 	u32 i, addr;
 
+	socfpga_get_seq_inst_init(&rom_init, &nelem);
 	addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | RW_MGR_INST_ROM_WRITE_OFFSET;
-	for (i = 0; i < ARRAY_SIZE(inst_rom_init); i++)
-		writel(inst_rom_init[i], addr + (i << 2));
+	for (i = 0; i < nelem; i++)
+		writel(rom_init[i], addr + (i << 2));
 
+	socfpga_get_seq_ac_init(&rom_init, &nelem);
 	addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | RW_MGR_AC_ROM_WRITE_OFFSET;
-	for (i = 0; i < ARRAY_SIZE(ac_rom_init); i++)
-		writel(ac_rom_init[i], addr + (i << 2));
+	for (i = 0; i < nelem; i++)
+		writel(rom_init[i], addr + (i << 2));
 }
 
 /**