This patch adds support for the SPI controller found on Freescale PowerPC processors such as the MCP834x family. Additionally, a new config option, CONFIG_HARD_SPI, is added for general purpose SPI controller use. Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>master
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#
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# (C) Copyright 2000-2007
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB := $(obj)libspi.a
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COBJS-y += mpc8xxx_spi.o
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COBJS := $(COBJS-y)
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SRCS := $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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all: $(LIB) |
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$(LIB): $(obj).depend $(OBJS) |
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$(AR) $(ARFLAGS) $@ $(OBJS)
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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/*
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* Copyright (c) 2006 Ben Warren, Qstreams Networks Inc. |
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* With help from the common/soft_spi and cpu/mpc8260 drivers |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <spi.h> |
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#include <asm/mpc8xxx_spi.h> |
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#ifdef CONFIG_HARD_SPI |
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#define SPI_EV_NE 0x80000000 >> 22 /* Receiver Not Empty */ |
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#define SPI_EV_NF 0x80000000 >> 23 /* Transmitter Not Full */ |
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#define SPI_MODE_LOOP 0x80000000 >> 1 /* Loopback mode */ |
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#define SPI_MODE_REV 0x80000000 >> 5 /* Reverse mode - MSB first */ |
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#define SPI_MODE_MS 0x80000000 >> 6 /* Always master */ |
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#define SPI_MODE_EN 0x80000000 >> 7 /* Enable interface */ |
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#define SPI_PRESCALER(reg, div) (reg)=((reg) & 0xfff0ffff) | ((div)<<16) |
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#define SPI_CHARLENGTH(reg, div) (reg)=((reg) & 0xff0fffff) | ((div)<<20) |
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#define SPI_TIMEOUT 1000 |
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void spi_init(void) |
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{ |
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volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi; |
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/* ------------------------------------------------
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* SPI pins on the MPC83xx are not muxed, so all we do is initialize |
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* some registers |
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* ------------------------------------------------ */ |
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spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN; |
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SPI_PRESCALER(spi->mode, 1); /* Use SYSCLK / 8 (16.67MHz typ.) */ |
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spi->event = 0xffffffff; /* Clear all SPI events */ |
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spi->mask = 0x00000000; /* Mask all SPI interrupts */ |
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spi->com = 0; /* LST bit doesn't do anything, so disregard */ |
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} |
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int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar * dout, uchar * din) |
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{ |
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volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi; |
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unsigned int tmpdout, tmpdin, event; |
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int numBlks = bitlen / 32 + (bitlen % 32 ? 1 : 0); |
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int tm, isRead = 0; |
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unsigned char charSize = 32; |
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debug("spi_xfer: chipsel %08X dout %08X din %08X bitlen %d\n", |
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(int)chipsel, *(uint *) dout, *(uint *) din, bitlen); |
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if (chipsel != NULL) |
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(*chipsel) (1); /* select the target chip */ |
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spi->event = 0xffffffff; /* Clear all SPI events */ |
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/* handle data in 32-bit chunks */ |
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while (numBlks--) { |
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tmpdout = 0; |
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charSize = (bitlen >= 32 ? 32 : bitlen); |
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/* Shift data so it's msb-justified */ |
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tmpdout = *(u32 *) dout >> (32 - charSize); |
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/* The LEN field of the SPMODE register is set as follows:
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* |
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* Bit length setting |
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* l <= 4 3 |
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* 4 < l <= 16 l - 1 |
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* l > 16 0 |
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*/ |
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if (bitlen <= 16) |
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SPI_CHARLENGTH(spi->mode, bitlen <= 4 ? 3 : bitlen - 1); |
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else { |
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SPI_CHARLENGTH(spi->mode, 0); |
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/* Set up the next iteration if sending > 32 bits */ |
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bitlen -= 32; |
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dout += 4; |
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} |
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spi->tx = tmpdout; /* Write the data out */ |
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debug("*** spi_xfer: ... %08x written\n", tmpdout); |
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/* --------------------------------
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* Wait for SPI transmit to get out |
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* or time out (1 second = 1000 ms) |
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* The NE event must be read and cleared first |
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* -------------------------------- */ |
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for (tm = 0, isRead = 0; tm < SPI_TIMEOUT; ++tm) { |
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event = spi->event; |
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if (event & SPI_EV_NE) { |
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tmpdin = spi->rx; |
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spi->event |= SPI_EV_NE; |
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isRead = 1; |
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*(u32 *) din = (tmpdin << (32 - charSize)); |
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if (charSize == 32) { |
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/* Advance output buffer by 32 bits */ |
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din += 4; |
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} |
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} |
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/* Only bail when we've had both NE and NF events.
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* This will cause timeouts on RO devices, so maybe |
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* in the future put an arbitrary delay after writing |
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* the device. Arbitrary delays suck, though... */ |
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if (isRead && (event & SPI_EV_NF)) |
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break; |
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} |
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if (tm >= SPI_TIMEOUT) |
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puts("*** spi_xfer: Time out during SPI transfer"); |
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debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin); |
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} |
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if (chipsel != NULL) |
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(*chipsel) (0); /* deselect the target chip */ |
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return 0; |
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} |
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#endif /* CONFIG_HARD_SPI */ |
@ -0,0 +1,49 @@ |
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/*
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* Freescale non-CPM SPI Controller |
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* |
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* Copyright 2008 Qstreams Networks, Inc. |
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* |
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* This software may be used and distributed according to the |
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* terms of the GNU Public License, Version 2, incorporated |
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* herein by reference. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License |
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* Version 2 as published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#ifndef _ASM_MPC8XXX_SPI_H_ |
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#define _ASM_MPC8XXX_SPI_H_ |
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#include <asm/types.h> |
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#if defined(CONFIG_MPC834X) || \ |
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defined(CONFIG_MPC8313) || \
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defined(CONFIG_MPC8315) || \
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defined(CONFIG_MPC837X) |
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typedef struct spi8xxx |
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{ |
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u8 res0[0x20]; /* 0x0-0x01f reserved */ |
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u32 mode; /* mode register */ |
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u32 event; /* event register */ |
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u32 mask; /* mask register */ |
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u32 com; /* command register */ |
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u32 tx; /* transmit register */ |
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u32 rx; /* receive register */ |
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u8 res1[0xC8]; /* fill up to 0x100 */ |
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} spi8xxx_t; |
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#endif |
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#endif /* _ASM_MPC8XXX_SPI_H_ */ |
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