This patch enables support zc1275 revB board. It has SD added compared to revA. The same configuration will work for RevC boards aswell. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>lime2-spi
parent
c3898a8891
commit
04ab29ab25
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// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* dts file for Xilinx ZynqMP ZC1275 RevB |
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* |
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* (C) Copyright 2018, Xilinx, Inc. |
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* |
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* Michal Simek <michal.simek@xilinx.com> |
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* Siva Durga Prasad Paladugu <sivadur@xilinx.com> |
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*/ |
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/dts-v1/; |
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#include "zynqmp.dtsi" |
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#include "zynqmp-clk-ccf.dtsi" |
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/ { |
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model = "ZynqMP ZC1275 RevB"; |
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compatible = "xlnx,zynqmp-zc1275-revB", "xlnx,zynqmp-zc1275", "xlnx,zynqmp"; |
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|
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aliases { |
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serial0 = &uart0; |
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serial1 = &dcc; |
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spi0 = &qspi; |
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mmc0 = &sdhci1; |
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}; |
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chosen { |
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bootargs = "earlycon"; |
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stdout-path = "serial0:115200n8"; |
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}; |
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memory@0 { |
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device_type = "memory"; |
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reg = <0x0 0x0 0x0 0x80000000>; |
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}; |
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}; |
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&dcc { |
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status = "okay"; |
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}; |
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&qspi { |
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status = "okay"; |
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flash@0 { |
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compatible = "m25p80"; /* 32MB */ |
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#address-cells = <1>; |
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#size-cells = <1>; |
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reg = <0x0>; |
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spi-tx-bus-width = <1>; |
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spi-rx-bus-width = <4>; |
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spi-max-frequency = <108000000>; /* Based on DC1 spec */ |
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partition@qspi-fsbl-uboot { /* for testing purpose */ |
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label = "qspi-fsbl-uboot"; |
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reg = <0x0 0x100000>; |
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}; |
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partition@qspi-linux { /* for testing purpose */ |
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label = "qspi-linux"; |
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reg = <0x100000 0x500000>; |
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}; |
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partition@qspi-device-tree { /* for testing purpose */ |
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label = "qspi-device-tree"; |
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reg = <0x600000 0x20000>; |
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}; |
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partition@qspi-rootfs { /* for testing purpose */ |
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label = "qspi-rootfs"; |
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reg = <0x620000 0x5E0000>; |
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}; |
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}; |
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}; |
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&uart0 { |
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status = "okay"; |
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}; |
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&sdhci1 { |
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status = "okay"; |
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no-1-8-v; |
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xlnx,mio_bank = <1>; |
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}; |
@ -0,0 +1,523 @@ |
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/*
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* (c) Copyright 2015 Xilinx, Inc. All rights reserved. |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <asm/arch/psu_init_gpl.h> |
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#include <xil_io.h> |
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static unsigned long psu_pll_init_data(void) |
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{ |
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psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4E2C62U); |
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psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00013C00U); |
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psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U); |
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psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U); |
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psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U); |
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mask_poll(0xFF5E0040, 0x00000002U); |
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psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U); |
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psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000200U); |
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psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E4B0C82U); |
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psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00015A00U); |
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psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U); |
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psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U); |
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psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U); |
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mask_poll(0xFF5E0040, 0x00000001U); |
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psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U); |
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psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U); |
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psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U); |
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psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014200U); |
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psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U); |
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psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U); |
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psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U); |
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mask_poll(0xFD1A0044, 0x00000001U); |
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psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U); |
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psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U); |
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psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U); |
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psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014800U); |
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psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U); |
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psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U); |
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psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U); |
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mask_poll(0xFD1A0044, 0x00000002U); |
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psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U); |
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psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000300U); |
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psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C62U); |
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psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00014000U); |
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psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U); |
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psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U); |
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psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U); |
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mask_poll(0xFD1A0044, 0x00000004U); |
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psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U); |
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psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000200U); |
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return 1; |
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} |
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static unsigned long psu_clock_init_data(void) |
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{ |
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psu_mask_write(0xFF5E0068, 0x013F3F07U, 0x01010C00U); |
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psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010502U); |
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psu_mask_write(0xFF18030C, 0x00020000U, 0x00000000U); |
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psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U); |
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psu_mask_write(0xFF5E0120, 0x013F3F07U, 0x01010F00U); |
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psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U); |
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psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000400U); |
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psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000900U); |
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psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U); |
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psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U); |
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psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U); |
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psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U); |
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psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010A02U); |
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psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01010402U); |
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psu_mask_write(0xFF5E00C8, 0x013F3F07U, 0x01010802U); |
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psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011D02U); |
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psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U); |
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psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000104U); |
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psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U); |
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psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U); |
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psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000600U); |
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psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000203U); |
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psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000203U); |
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psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000203U); |
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psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000202U); |
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psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U); |
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psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U); |
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psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U); |
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psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U); |
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psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U); |
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psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U); |
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return 1; |
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} |
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static unsigned long psu_ddr_init_data(void) |
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{ |
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psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U); |
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psu_mask_write(0xFD070000, 0xE30FBE3DU, 0x81040001U); |
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psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U); |
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psu_mask_write(0xFD070020, 0x000003F3U, 0x00000100U); |
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psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00800000U); |
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psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U); |
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psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00403210U); |
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psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U); |
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psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U); |
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psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U); |
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psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x00308034U); |
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psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U); |
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psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U); |
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psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U); |
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psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0030051FU); |
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psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00020063U); |
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psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00290000U); |
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psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00000E05U); |
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psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x05200004U); |
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psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00000000U); |
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psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00110004U); |
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psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x00000000U); |
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psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x00000000U); |
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psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U); |
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psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000066FU); |
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psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x07080D07U); |
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psu_mask_write(0xFD070104, 0x001F1F7FU, 0x0005020BU); |
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psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x03030607U); |
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psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x00502006U); |
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psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x13020206U); |
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psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x03030202U); |
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psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010003U); |
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psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000303U); |
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psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x02020909U); |
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psu_mask_write(0xFD070124, 0x40070F3FU, 0x0004040DU); |
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psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x440C011CU); |
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psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U); |
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psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x80800020U); |
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psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x02009896U); |
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psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x04828202U); |
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psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00020304U); |
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psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U); |
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psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U); |
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psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U); |
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psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x00C800FFU); |
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psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000000U); |
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psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000000U); |
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psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000000U); |
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psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU); |
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psu_mask_write(0xFD070204, 0x001F1F1FU, 0x00080808U); |
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psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x00000000U); |
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psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x00000000U); |
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psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU); |
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psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x070F0707U); |
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psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x0F070707U); |
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psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU); |
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psu_mask_write(0xFD070220, 0x00001F1FU, 0x00000000U); |
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psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x07070707U); |
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psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x07070707U); |
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psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000007U); |
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psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x06000604U); |
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psu_mask_write(0xFD070244, 0x00003333U, 0x00000001U); |
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psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U); |
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psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U); |
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psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U); |
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psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U); |
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psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U); |
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psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U); |
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psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U); |
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psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U); |
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psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U); |
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psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U); |
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psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U); |
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psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U); |
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psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U); |
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psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU); |
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psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU); |
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psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U); |
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psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU); |
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psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U); |
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psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU); |
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psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU); |
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psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U); |
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psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U); |
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psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U); |
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psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU); |
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psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU); |
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psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U); |
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psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U); |
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psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U); |
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psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU); |
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psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU); |
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psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U); |
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psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U); |
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psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU); |
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psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U); |
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psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU); |
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psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU); |
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psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU); |
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psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U); |
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psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U); |
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psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU); |
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psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U); |
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psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU); |
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psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU); |
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psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU); |
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psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U); |
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psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U); |
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psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU); |
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psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U); |
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psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU); |
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psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U); |
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psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U); |
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psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U); |
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psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU); |
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psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U); |
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psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U); |
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psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x07001E00U); |
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psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F05D90U); |
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psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U); |
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psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U); |
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psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x1900C810U); |
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psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0x4E200708U); |
||||
psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x06124000U); |
||||
psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04061U); |
||||
psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFD0800C4, 0xFFFFFFFFU, 0x000000DAU); |
||||
psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0800040BU); |
||||
psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x040E0A04U); |
||||
psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x28100004U); |
||||
psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x000F0200U); |
||||
psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x82000800U); |
||||
psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x00682B0AU); |
||||
psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00152504U); |
||||
psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000506U); |
||||
psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U); |
||||
psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U); |
||||
psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000520U); |
||||
psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000004U); |
||||
psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x0000004DU); |
||||
psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U); |
||||
psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x0000004DU); |
||||
psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800081C7U); |
||||
psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U); |
||||
psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U); |
||||
psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U); |
||||
psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12340800U); |
||||
psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x00000005U); |
||||
psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U); |
||||
psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x0A000000U); |
||||
psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000009U); |
||||
psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x0A000000U); |
||||
psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300B0B0U); |
||||
psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF1032019U); |
||||
psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U); |
||||
psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x0088E858U); |
||||
psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x000077BBU); |
||||
psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U); |
||||
psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U); |
||||
psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x000076BBU); |
||||
psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U); |
||||
psu_mask_write(0xFD080704, 0xFFFFFFFFU, 0x00007FFFU); |
||||
psu_mask_write(0xFD08070C, 0xFFFFFFFFU, 0x3F000008U); |
||||
psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00B00CU); |
||||
psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09093030U); |
||||
psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU); |
||||
psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U); |
||||
psu_mask_write(0xFD080804, 0xFFFFFFFFU, 0x00007FFFU); |
||||
psu_mask_write(0xFD08080C, 0xFFFFFFFFU, 0x3F000008U); |
||||
psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00B00CU); |
||||
psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09093030U); |
||||
psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU); |
||||
psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U); |
||||
psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU); |
||||
psu_mask_write(0xFD08090C, 0xFFFFFFFFU, 0x3F000008U); |
||||
psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00B00CU); |
||||
psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09093030U); |
||||
psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU); |
||||
psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U); |
||||
psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU); |
||||
psu_mask_write(0xFD080A0C, 0xFFFFFFFFU, 0x3F000008U); |
||||
psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00B00CU); |
||||
psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09093030U); |
||||
psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU); |
||||
psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U); |
||||
psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007FFFU); |
||||
psu_mask_write(0xFD080B08, 0xFFFFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFD080B0C, 0xFFFFFFFFU, 0x3F000008U); |
||||
psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00B004U); |
||||
psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09093030U); |
||||
psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU); |
||||
psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U); |
||||
psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007FFFU); |
||||
psu_mask_write(0xFD080C08, 0xFFFFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFD080C0C, 0xFFFFFFFFU, 0x3F000008U); |
||||
psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00B00CU); |
||||
psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09093030U); |
||||
psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU); |
||||
psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U); |
||||
psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007FFFU); |
||||
psu_mask_write(0xFD080D08, 0xFFFFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFD080D0C, 0xFFFFFFFFU, 0x3F000008U); |
||||
psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00B004U); |
||||
psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09093030U); |
||||
psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU); |
||||
psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U); |
||||
psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007FFFU); |
||||
psu_mask_write(0xFD080E08, 0xFFFFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFD080E0C, 0xFFFFFFFFU, 0x3F000008U); |
||||
psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00B00CU); |
||||
psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09093030U); |
||||
psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU); |
||||
psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x40803660U); |
||||
psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x55556000U); |
||||
psu_mask_write(0xFD080F08, 0xFFFFFFFFU, 0xAAAAAAAAU); |
||||
psu_mask_write(0xFD080F0C, 0xFFFFFFFFU, 0x0029A4A4U); |
||||
psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0C00B000U); |
||||
psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09093030U); |
||||
psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU); |
||||
psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU); |
||||
psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x06124000U); |
||||
psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U); |
||||
psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x00041800U); |
||||
psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x70000000U); |
||||
psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU); |
||||
psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x06124000U); |
||||
psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U); |
||||
psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x00041800U); |
||||
psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x70000000U); |
||||
psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU); |
||||
psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x06124000U); |
||||
psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U); |
||||
psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x00041800U); |
||||
psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70000000U); |
||||
psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU); |
||||
psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x06124000U); |
||||
psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U); |
||||
psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x00041800U); |
||||
psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70000000U); |
||||
psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x15019FFEU); |
||||
psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x06124000U); |
||||
psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01264300U); |
||||
psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x00041800U); |
||||
psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70000000U); |
||||
psu_mask_write(0xFD0817C4, 0xFFFFFFFFU, 0x06124000U); |
||||
psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U); |
||||
|
||||
return 1; |
||||
} |
||||
|
||||
static unsigned long psu_mio_init_data(void) |
||||
{ |
||||
psu_mask_write(0xFF180000, 0x000000FEU, 0x00000002U); |
||||
psu_mask_write(0xFF180004, 0x000000FEU, 0x00000002U); |
||||
psu_mask_write(0xFF180010, 0x000000FEU, 0x00000002U); |
||||
psu_mask_write(0xFF180014, 0x000000FEU, 0x00000002U); |
||||
psu_mask_write(0xFF180018, 0x000000FEU, 0x00000002U); |
||||
psu_mask_write(0xFF180088, 0x000000FEU, 0x000000C0U); |
||||
psu_mask_write(0xFF18008C, 0x000000FEU, 0x000000C0U); |
||||
psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000010U); |
||||
psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000010U); |
||||
psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000010U); |
||||
psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000010U); |
||||
psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000010U); |
||||
psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000010U); |
||||
psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000010U); |
||||
psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000010U); |
||||
psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000010U); |
||||
psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000010U); |
||||
psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000010U); |
||||
psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000010U); |
||||
psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000010U); |
||||
psu_mask_write(0xFF180204, 0x0000007FU, 0x00000002U); |
||||
psu_mask_write(0xFF180208, 0x000FFF8CU, 0x00003004U); |
||||
psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU); |
||||
psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU); |
||||
psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU); |
||||
psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU); |
||||
psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU); |
||||
psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU); |
||||
psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU); |
||||
psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU); |
||||
psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU); |
||||
psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU); |
||||
psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU); |
||||
psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU); |
||||
psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U); |
||||
psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U); |
||||
|
||||
return 1; |
||||
} |
||||
|
||||
static unsigned long psu_peripherals_pre_init_data(void) |
||||
{ |
||||
psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x00012302U); |
||||
|
||||
return 1; |
||||
} |
||||
|
||||
static unsigned long psu_peripherals_init_data(void) |
||||
{ |
||||
psu_mask_write(0xFD1A0100, 0x0000807CU, 0x00000000U); |
||||
psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U); |
||||
psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U); |
||||
psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000000U); |
||||
psu_mask_write(0xFF180390, 0x00000004U, 0x00000004U); |
||||
psu_mask_write(0xFF5E0238, 0x00000040U, 0x00000000U); |
||||
psu_mask_write(0xFF180310, 0x00008000U, 0x00000000U); |
||||
psu_mask_write(0xFF180320, 0x33800000U, 0x02800000U); |
||||
psu_mask_write(0xFF18031C, 0x7FFE0000U, 0x64500000U); |
||||
psu_mask_write(0xFF180358, 0x00000008U, 0x00000008U); |
||||
psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U); |
||||
psu_mask_write(0xFF5E0238, 0x00000200U, 0x00000000U); |
||||
psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U); |
||||
psu_mask_write(0xFF5E0238, 0x00000800U, 0x00000000U); |
||||
psu_mask_write(0xFF5E0238, 0x00000002U, 0x00000000U); |
||||
psu_mask_write(0xFF000034, 0x000000FFU, 0x00000005U); |
||||
psu_mask_write(0xFF000018, 0x0000FFFFU, 0x0000008FU); |
||||
psu_mask_write(0xFF000000, 0x000001FFU, 0x00000017U); |
||||
psu_mask_write(0xFF000004, 0x000003FFU, 0x00000020U); |
||||
psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U); |
||||
psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU); |
||||
psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U); |
||||
psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U); |
||||
psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U); |
||||
psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x01FC9F08U); |
||||
psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U); |
||||
|
||||
return 1; |
||||
} |
||||
|
||||
static unsigned long psu_afi_config(void) |
||||
{ |
||||
psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U); |
||||
psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U); |
||||
psu_mask_write(0xFD615000, 0x00000300U, 0x00000200U); |
||||
|
||||
return 1; |
||||
} |
||||
|
||||
static unsigned long psu_ddr_phybringup_data(void) |
||||
{ |
||||
unsigned int regval = 0; |
||||
unsigned int pll_retry = 10; |
||||
unsigned int pll_locked = 0; |
||||
|
||||
while ((pll_retry > 0) && (!pll_locked)) { |
||||
Xil_Out32(0xFD080004, 0x00040010); |
||||
Xil_Out32(0xFD080004, 0x00040011); |
||||
|
||||
while ((Xil_In32(0xFD080030) & 0x1) != 1) |
||||
; |
||||
|
||||
pll_locked = (Xil_In32(0xFD080030) & 0x80000000) >> 31; |
||||
pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000) >> 16; |
||||
pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16; |
||||
pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000) >> 16; |
||||
pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000) >> 16; |
||||
pll_retry--; |
||||
} |
||||
Xil_Out32(0xFD0800C0, Xil_In32(0xFD0800C0) | (pll_retry << 16)); |
||||
Xil_Out32(0xFD080004U, 0x00040063U); |
||||
|
||||
while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU) |
||||
; |
||||
prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U); |
||||
|
||||
while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU) |
||||
; |
||||
Xil_Out32(0xFD0701B0U, 0x00000001U); |
||||
Xil_Out32(0xFD070320U, 0x00000001U); |
||||
while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U) |
||||
; |
||||
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U); |
||||
Xil_Out32(0xFD080004, 0x0004FE01); |
||||
regval = Xil_In32(0xFD080030); |
||||
while (regval != 0x80000FFF) |
||||
regval = Xil_In32(0xFD080030); |
||||
Xil_Out32(0xFD070180U, 0x00800020U); |
||||
Xil_Out32(0xFD070060U, 0x00000000U); |
||||
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U); |
||||
|
||||
return 1; |
||||
} |
||||
|
||||
static void init_peripheral(void) |
||||
{ |
||||
psu_mask_write(0xFD5F0018, 0x8000001FU, 0x8000001FU); |
||||
} |
||||
|
||||
int psu_init(void) |
||||
{ |
||||
int status = 1; |
||||
|
||||
status &= psu_mio_init_data(); |
||||
status &= psu_peripherals_pre_init_data(); |
||||
status &= psu_pll_init_data(); |
||||
status &= psu_clock_init_data(); |
||||
status &= psu_ddr_init_data(); |
||||
status &= psu_ddr_phybringup_data(); |
||||
status &= psu_peripherals_init_data(); |
||||
init_peripheral(); |
||||
|
||||
status &= psu_afi_config(); |
||||
|
||||
if (status == 0) |
||||
return 1; |
||||
return 0; |
||||
} |
@ -0,0 +1,55 @@ |
||||
CONFIG_ARM=y |
||||
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1275_revB" |
||||
CONFIG_ARCH_ZYNQMP=y |
||||
CONFIG_SYS_TEXT_BASE=0x8000000 |
||||
CONFIG_SYS_MALLOC_F_LEN=0x8000 |
||||
# CONFIG_SPL_LIBDISK_SUPPORT is not set |
||||
CONFIG_SPL=y |
||||
CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1275 revB" |
||||
# CONFIG_SPL_FAT_SUPPORT is not set |
||||
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1275-revB" |
||||
CONFIG_DEBUG_UART=y |
||||
CONFIG_DISTRO_DEFAULTS=y |
||||
CONFIG_FIT=y |
||||
CONFIG_FIT_VERBOSE=y |
||||
CONFIG_SPL_LOAD_FIT=y |
||||
# CONFIG_DISPLAY_CPUINFO is not set |
||||
# CONFIG_DISPLAY_BOARDINFO is not set |
||||
CONFIG_SPL_OS_BOOT=y |
||||
CONFIG_SPL_RAM_SUPPORT=y |
||||
CONFIG_SPL_RAM_DEVICE=y |
||||
CONFIG_SPL_ATF=y |
||||
CONFIG_SYS_PROMPT="ZynqMP> " |
||||
CONFIG_CMD_MEMTEST=y |
||||
CONFIG_CMD_CLK=y |
||||
# CONFIG_CMD_FLASH is not set |
||||
CONFIG_CMD_FPGA_LOADBP=y |
||||
CONFIG_CMD_FPGA_LOADP=y |
||||
CONFIG_CMD_MMC=y |
||||
# CONFIG_CMD_NET is not set |
||||
CONFIG_CMD_TIME=y |
||||
CONFIG_CMD_TIMER=y |
||||
CONFIG_SPL_OF_CONTROL=y |
||||
CONFIG_OF_EMBED=y |
||||
CONFIG_SPL_DM=y |
||||
CONFIG_CLK_ZYNQMP=y |
||||
CONFIG_FPGA_XILINX=y |
||||
CONFIG_FPGA_ZYNQMPPL=y |
||||
CONFIG_MISC=y |
||||
CONFIG_DM_MMC=y |
||||
CONFIG_MMC_SDHCI=y |
||||
CONFIG_MMC_SDHCI_ZYNQ=y |
||||
CONFIG_SPI_FLASH=y |
||||
CONFIG_SPI_FLASH_BAR=y |
||||
CONFIG_SF_DUAL_FLASH=y |
||||
CONFIG_SPI_FLASH_MACRONIX=y |
||||
CONFIG_SPI_FLASH_SPANSION=y |
||||
CONFIG_SPI_FLASH_STMICRO=y |
||||
CONFIG_SPI_FLASH_WINBOND=y |
||||
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set |
||||
CONFIG_DEBUG_UART_ZYNQ=y |
||||
CONFIG_DEBUG_UART_BASE=0xff000000 |
||||
CONFIG_DEBUG_UART_CLOCK=100000000 |
||||
CONFIG_DEBUG_UART_ANNOUNCE=y |
||||
CONFIG_ZYNQ_SERIAL=y |
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y |
@ -0,0 +1,16 @@ |
||||
/*
|
||||
* Configuration for Xilinx ZynqMP zc1275 RevB |
||||
* |
||||
* (C) Copyright 2018 Xilinx, Inc. |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_ZYNQMP_ZC1275_REVB_H |
||||
#define __CONFIG_ZYNQMP_ZC1275_REVB_H |
||||
|
||||
#define CONFIG_ZYNQ_SDHCI1 |
||||
|
||||
#include <configs/xilinx_zynqmp.h> |
||||
|
||||
#endif /* __CONFIG_ZYNQMP_ZC1275_REVB_H */ |
Loading…
Reference in new issue