@ -15,7 +15,6 @@
# define CONFIG_SPL_MMC_MINIMAL
# define CONFIG_SPL_FLUSH_IMAGE
# define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
# define CONFIG_FSL_LAW /* Use common FSL init code */
# define CONFIG_SYS_TEXT_BASE 0x11001000
# define CONFIG_SPL_TEXT_BASE 0xf8f81000
# define CONFIG_SPL_PAD_TO 0x20000
@ -36,7 +35,6 @@
# define CONFIG_SPL_SPI_FLASH_MINIMAL
# define CONFIG_SPL_FLUSH_IMAGE
# define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
# define CONFIG_FSL_LAW /* Use common FSL init code */
# define CONFIG_SYS_TEXT_BASE 0x11001000
# define CONFIG_SPL_TEXT_BASE 0xf8f81000
# define CONFIG_SPL_PAD_TO 0x20000
@ -115,8 +113,6 @@
# define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */
# endif
# define CONFIG_FSL_LAW /* Use common FSL init code */
# define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
# define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
# define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 clock chip ref freq */