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@ -107,6 +107,7 @@ enum { |
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/* MC34708 Definitions */ |
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#define SWx_VOLT_MASK_MC34708 0x3F |
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#define SWx_1_110V_MC34708 0x24 |
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#define SWx_1_250V_MC34708 0x30 |
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#define SWx_1_300V_MC34708 0x34 |
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#define TIMER_MASK_MC34708 0x300 |
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@ -116,4 +117,43 @@ enum { |
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#define SWBST_CTRL 31 |
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#define SWBST_AUTO 0x8 |
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#define MC34708_REG_SW12_OPMODE 28 |
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#define MC34708_SW1AMODE_MASK 0x00000f |
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#define MC34708_SW1AMHMODE 0x000010 |
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#define MC34708_SW1AUOMODE 0x000020 |
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#define MC34708_SW1DVSSPEED 0x0000c0 |
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#define MC34708_SW2MODE_MASK 0x03c000 |
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#define MC34708_SW2MHMODE 0x040000 |
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#define MC34708_SW2UOMODE 0x080000 |
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#define MC34708_SW2DVSSPEED 0x300000 |
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#define MC34708_PLLEN 0x400000 |
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#define MC34708_PLLX 0x800000 |
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#define MC34708_REG_SW345_OPMODE 29 |
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#define MC34708_SW3MODE_MASK 0x00000f |
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#define MC34708_SW3MHMODE 0x000010 |
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#define MC34708_SW3UOMODE 0x000020 |
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#define MC34708_SW4AMODE_MASK 0x0003c0 |
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#define MC34708_SW4AMHMODE 0x000400 |
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#define MC34708_SW4AUOMODE 0x000800 |
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#define MC34708_SW4BMODE_MASK 0x00f000 |
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#define MC34708_SW4BMHMODE 0x010000 |
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#define MC34708_SW4BUOMODE 0x020000 |
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#define MC34708_SW5MODE_MASK 0x3c0000 |
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#define MC34708_SW5MHMODE 0x400000 |
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#define MC34708_SW5UOMODE 0x800000 |
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#define SW_MODE_OFFOFF 0x00 |
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#define SW_MODE_PWMOFF 0x01 |
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#define SW_MODE_PFMOFF 0x03 |
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#define SW_MODE_APSOFF 0x04 |
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#define SW_MODE_PWMPWM 0x05 |
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#define SW_MODE_PWMAPS 0x06 |
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#define SW_MODE_APSAPS 0x08 |
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#define SW_MODE_APSPFM 0x0c |
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#define SW_MODE_PWMPFM 0x0d |
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#define SW_MODE_PFMPFM 0x0f |
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#endif |
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