@ -37,6 +37,7 @@ const omap3_sysinfo sysinfo = {
# define REVISION_AXBX 0x7
# define REVISION_CX 0x6
# define REVISION_C4 0x5
# define REVISION_XM 0x0
/*
* IEN - Input Enable
@ -377,11 +378,37 @@ const omap3_sysinfo sysinfo = {
MUX_VAL ( CP ( SDRC_CKE1 ) , ( IDIS | PTU | EN | M0 ) ) /*sdrc_cke1*/
# define MUX_BEAGLE_C() \
MUX_VAL ( CP ( MCBSP3_DX ) , ( IEN | PTD | DIS | M4 ) ) /*GPIO_140*/ \
MUX_VAL ( CP ( MCBSP3_DR ) , ( IEN | PTD | DIS | M4 ) ) /*GPIO_142*/ \
MUX_VAL ( CP ( MCBSP3_CLKX ) , ( IEN | PTD | DIS | M4 ) ) /*GPIO_141*/ \
MUX_VAL ( CP ( MCBSP3_DX ) , ( IEN | PTD | DIS | M4 ) ) /*GPIO_140*/ \
MUX_VAL ( CP ( MCBSP3_DR ) , ( IEN | PTD | DIS | M4 ) ) /*GPIO_142*/ \
MUX_VAL ( CP ( MCBSP3_CLKX ) , ( IEN | PTD | DIS | M4 ) ) /*GPIO_141*/ \
MUX_VAL ( CP ( UART2_CTS ) , ( IEN | PTU | EN | M0 ) ) /*UART2_CTS*/ \
MUX_VAL ( CP ( UART2_RTS ) , ( IDIS | PTD | DIS | M0 ) ) /*UART2_RTS*/ \
MUX_VAL ( CP ( UART2_TX ) , ( IDIS | PTD | DIS | M0 ) ) /*UART2_TX*/
# define MUX_BEAGLE_XM() \
MUX_VAL ( CP ( MCBSP3_DX ) , ( IEN | PTD | DIS | M4 ) ) /*GPIO_140*/ \
MUX_VAL ( CP ( MCBSP3_DR ) , ( IEN | PTD | DIS | M4 ) ) /*GPIO_142*/ \
MUX_VAL ( CP ( MCBSP3_CLKX ) , ( IEN | PTD | DIS | M4 ) ) /*GPIO_141*/ \
MUX_VAL ( CP ( UART2_CTS ) , ( IEN | PTU | EN | M0 ) ) /*UART2_CTS*/ \
MUX_VAL ( CP ( UART2_RTS ) , ( IDIS | PTD | DIS | M0 ) ) /*UART2_RTS*/ \
MUX_VAL ( CP ( UART2_TX ) , ( IDIS | PTD | DIS | M0 ) ) /*UART2_TX*/ \
MUX_VAL ( CP ( DSS_DATA0 ) , ( IDIS | PTD | DIS | M7 ) ) /*safe_mode*/ \
MUX_VAL ( CP ( DSS_DATA1 ) , ( IDIS | PTD | DIS | M7 ) ) /*safe_mode*/ \
MUX_VAL ( CP ( DSS_DATA2 ) , ( IDIS | PTD | DIS | M7 ) ) /*safe_mode*/ \
MUX_VAL ( CP ( DSS_DATA3 ) , ( IDIS | PTD | DIS | M7 ) ) /*safe_mode*/ \
MUX_VAL ( CP ( DSS_DATA4 ) , ( IDIS | PTD | DIS | M7 ) ) /*safe_mode*/ \
MUX_VAL ( CP ( DSS_DATA5 ) , ( IDIS | PTD | DIS | M7 ) ) /*safe_mode*/ \
MUX_VAL ( CP ( DSS_DATA18 ) , ( IDIS | PTD | DIS | M3 ) ) /*DSS_DATA0*/ \
MUX_VAL ( CP ( DSS_DATA19 ) , ( IDIS | PTD | DIS | M3 ) ) /*DSS_DATA1*/ \
MUX_VAL ( CP ( DSS_DATA20 ) , ( IDIS | PTD | DIS | M3 ) ) /*DSS_DATA2*/ \
MUX_VAL ( CP ( DSS_DATA21 ) , ( IDIS | PTD | DIS | M3 ) ) /*DSS_DATA3*/ \
MUX_VAL ( CP ( DSS_DATA22 ) , ( IDIS | PTD | DIS | M3 ) ) /*DSS_DATA4*/ \
MUX_VAL ( CP ( DSS_DATA23 ) , ( IDIS | PTD | DIS | M3 ) ) /*DSS_DATA5*/ \
MUX_VAL ( CP ( SYS_BOOT0 ) , ( IDIS | PTD | DIS | M3 ) ) /*DSS_DATA18*/ \
MUX_VAL ( CP ( SYS_BOOT1 ) , ( IDIS | PTD | DIS | M3 ) ) /*DSS_DATA19*/ \
MUX_VAL ( CP ( SYS_BOOT3 ) , ( IDIS | PTD | DIS | M3 ) ) /*DSS_DATA20*/ \
MUX_VAL ( CP ( SYS_BOOT4 ) , ( IDIS | PTD | DIS | M3 ) ) /*DSS_DATA21*/ \
MUX_VAL ( CP ( SYS_BOOT5 ) , ( IDIS | PTD | DIS | M3 ) ) /*DSS_DATA22*/ \
MUX_VAL ( CP ( SYS_BOOT6 ) , ( IDIS | PTD | DIS | M3 ) ) /*DSS_DATA23*/
# endif