- Allow to disable SPL (mainly for ATF) - Refactor SoC init code - Update DRAM settings - Add PXs3 SoC support (DT, pinctrl driver, SoC code)master
commit
0c9e85f67c
@ -0,0 +1,51 @@ |
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/* |
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* Device Tree Source for UniPhier PXs3 Reference Board |
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* |
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* Copyright (C) 2017 Socionext Inc. |
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ X11 |
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*/ |
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|
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/dts-v1/; |
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/include/ "uniphier-pxs3.dtsi" |
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/include/ "uniphier-ref-daughter.dtsi" |
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/include/ "uniphier-support-card.dtsi" |
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|
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/ { |
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model = "UniPhier PXs3 Reference Board"; |
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compatible = "socionext,uniphier-pxs3-ref", "socionext,uniphier-pxs3"; |
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|
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aliases { |
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serial0 = &serial0; |
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serial1 = &serial1; |
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serial2 = &serial2; |
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serial3 = &serial3; |
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i2c0 = &i2c0; |
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i2c1 = &i2c1; |
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i2c2 = &i2c2; |
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i2c3 = &i2c3; |
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i2c6 = &i2c6; |
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}; |
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|
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memory { |
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device_type = "memory"; |
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reg = <0 0x80000000 0 0xa0000000>; |
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}; |
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chosen { |
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stdout-path = "serial0:115200n8"; |
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}; |
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}; |
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ðsc { |
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interrupts = <0 48 4>; |
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}; |
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&serial0 { |
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status = "okay"; |
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}; |
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&i2c0 { |
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status = "okay"; |
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}; |
@ -0,0 +1,328 @@ |
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/* |
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* Device Tree Source for UniPhier PXs3 SoC |
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* |
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* Copyright (C) 2017 Socionext Inc. |
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ X11 |
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*/ |
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/memreserve/ 0x80000000 0x00080000; |
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/ { |
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compatible = "socionext,uniphier-pxs3"; |
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#address-cells = <2>; |
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#size-cells = <2>; |
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interrupt-parent = <&gic>; |
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cpus { |
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#address-cells = <2>; |
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#size-cells = <0>; |
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cpu-map { |
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cluster0 { |
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core0 { |
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cpu = <&cpu0>; |
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}; |
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core1 { |
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cpu = <&cpu1>; |
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}; |
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core2 { |
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cpu = <&cpu2>; |
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}; |
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core3 { |
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cpu = <&cpu3>; |
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}; |
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}; |
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}; |
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cpu0: cpu@0 { |
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device_type = "cpu"; |
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compatible = "arm,cortex-a53", "arm,armv8"; |
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reg = <0 0x000>; |
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enable-method = "psci"; |
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}; |
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cpu1: cpu@1 { |
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device_type = "cpu"; |
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compatible = "arm,cortex-a53", "arm,armv8"; |
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reg = <0 0x001>; |
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enable-method = "psci"; |
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}; |
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cpu2: cpu@2 { |
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device_type = "cpu"; |
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compatible = "arm,cortex-a53", "arm,armv8"; |
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reg = <0 0x002>; |
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enable-method = "psci"; |
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}; |
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cpu3: cpu@3 { |
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device_type = "cpu"; |
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compatible = "arm,cortex-a53", "arm,armv8"; |
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reg = <0 0x003>; |
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enable-method = "psci"; |
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}; |
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}; |
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psci { |
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compatible = "arm,psci-1.0"; |
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method = "smc"; |
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}; |
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clocks { |
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refclk: ref { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <25000000>; |
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}; |
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}; |
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timer { |
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compatible = "arm,armv8-timer"; |
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interrupts = <1 13 4>, |
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<1 14 4>, |
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<1 11 4>, |
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<1 10 4>; |
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}; |
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soc { |
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compatible = "simple-bus"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges = <0 0 0 0xffffffff>; |
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serial0: serial@54006800 { |
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compatible = "socionext,uniphier-uart"; |
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status = "disabled"; |
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reg = <0x54006800 0x40>; |
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interrupts = <0 33 4>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_uart0>; |
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clocks = <&peri_clk 0>; |
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clock-frequency = <58820000>; |
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}; |
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serial1: serial@54006900 { |
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compatible = "socionext,uniphier-uart"; |
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status = "disabled"; |
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reg = <0x54006900 0x40>; |
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interrupts = <0 35 4>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_uart1>; |
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clocks = <&peri_clk 1>; |
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clock-frequency = <58820000>; |
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}; |
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serial2: serial@54006a00 { |
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compatible = "socionext,uniphier-uart"; |
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status = "disabled"; |
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reg = <0x54006a00 0x40>; |
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interrupts = <0 37 4>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_uart2>; |
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clocks = <&peri_clk 2>; |
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clock-frequency = <58820000>; |
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}; |
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serial3: serial@54006b00 { |
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compatible = "socionext,uniphier-uart"; |
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status = "disabled"; |
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reg = <0x54006b00 0x40>; |
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interrupts = <0 177 4>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_uart3>; |
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clocks = <&peri_clk 3>; |
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clock-frequency = <58820000>; |
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}; |
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i2c0: i2c@58780000 { |
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compatible = "socionext,uniphier-fi2c"; |
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status = "disabled"; |
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reg = <0x58780000 0x80>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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interrupts = <0 41 4>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_i2c0>; |
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clocks = <&peri_clk 4>; |
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clock-frequency = <100000>; |
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}; |
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i2c1: i2c@58781000 { |
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compatible = "socionext,uniphier-fi2c"; |
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status = "disabled"; |
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reg = <0x58781000 0x80>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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interrupts = <0 42 4>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_i2c1>; |
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clocks = <&peri_clk 5>; |
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clock-frequency = <100000>; |
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}; |
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i2c2: i2c@58782000 { |
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compatible = "socionext,uniphier-fi2c"; |
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status = "disabled"; |
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reg = <0x58782000 0x80>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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interrupts = <0 43 4>; |
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clocks = <&peri_clk 6>; |
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clock-frequency = <100000>; |
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}; |
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i2c3: i2c@58783000 { |
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compatible = "socionext,uniphier-fi2c"; |
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status = "disabled"; |
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reg = <0x58783000 0x80>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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interrupts = <0 44 4>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_i2c3>; |
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clocks = <&peri_clk 7>; |
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clock-frequency = <100000>; |
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}; |
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|
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/* chip-internal connection for HDMI */ |
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i2c6: i2c@58786000 { |
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compatible = "socionext,uniphier-fi2c"; |
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reg = <0x58786000 0x80>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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interrupts = <0 26 4>; |
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clocks = <&peri_clk 10>; |
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clock-frequency = <400000>; |
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}; |
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system_bus: system-bus@58c00000 { |
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compatible = "socionext,uniphier-system-bus"; |
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status = "disabled"; |
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reg = <0x58c00000 0x400>; |
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#address-cells = <2>; |
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#size-cells = <1>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_system_bus>; |
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}; |
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smpctrl@59800000 { |
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compatible = "socionext,uniphier-smpctrl"; |
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reg = <0x59801000 0x400>; |
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}; |
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sdctrl@59810000 { |
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compatible = "socionext,uniphier-pxs3-sdctrl", |
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"simple-mfd", "syscon"; |
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reg = <0x59810000 0x800>; |
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sd_clk: clock { |
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compatible = "socionext,uniphier-pxs3-sd-clock"; |
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#clock-cells = <1>; |
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}; |
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sd_rst: reset { |
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compatible = "socionext,uniphier-pxs3-sd-reset"; |
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#reset-cells = <1>; |
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}; |
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}; |
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perictrl@59820000 { |
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compatible = "socionext,uniphier-pxs3-perictrl", |
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"simple-mfd", "syscon"; |
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reg = <0x59820000 0x200>; |
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peri_clk: clock { |
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compatible = "socionext,uniphier-pxs3-peri-clock"; |
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#clock-cells = <1>; |
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}; |
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peri_rst: reset { |
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compatible = "socionext,uniphier-pxs3-peri-reset"; |
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#reset-cells = <1>; |
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}; |
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}; |
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emmc: sdhc@5a000000 { |
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compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; |
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status = "disabled"; |
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reg = <0x5a000000 0x400>; |
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interrupts = <0 78 4>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_emmc_1v8>; |
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clocks = <&sys_clk 4>; |
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bus-width = <8>; |
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mmc-ddr-1_8v; |
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mmc-hs200-1_8v; |
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}; |
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sd: sdhc@5a400000 { |
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compatible = "socionext,uniphier-sdhc"; |
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status = "disabled"; |
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reg = <0x5a400000 0x800>; |
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interrupts = <0 76 4>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_sd>; |
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clocks = <&sd_clk 0>; |
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reset-names = "host"; |
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resets = <&sd_rst 0>; |
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bus-width = <4>; |
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cap-sd-highspeed; |
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}; |
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soc-glue@5f800000 { |
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compatible = "socionext,uniphier-pxs3-soc-glue", |
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"simple-mfd", "syscon"; |
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reg = <0x5f800000 0x2000>; |
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pinctrl: pinctrl { |
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compatible = "socionext,uniphier-pxs3-pinctrl"; |
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}; |
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}; |
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aidet@5fc20000 { |
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compatible = "simple-mfd", "syscon"; |
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reg = <0x5fc20000 0x200>; |
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}; |
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gic: interrupt-controller@5fe00000 { |
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compatible = "arm,gic-v3"; |
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reg = <0x5fe00000 0x10000>, /* GICD */ |
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<0x5fe80000 0x80000>; /* GICR */ |
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interrupt-controller; |
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#interrupt-cells = <3>; |
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interrupts = <1 9 4>; |
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}; |
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sysctrl@61840000 { |
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compatible = "socionext,uniphier-pxs3-sysctrl", |
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"simple-mfd", "syscon"; |
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reg = <0x61840000 0x10000>; |
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sys_clk: clock { |
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compatible = "socionext,uniphier-pxs3-clock"; |
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#clock-cells = <1>; |
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}; |
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sys_rst: reset { |
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compatible = "socionext,uniphier-pxs3-reset"; |
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#reset-cells = <1>; |
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}; |
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}; |
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nand: nand@68000000 { |
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compatible = "socionext,denali-nand-v5b"; |
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status = "disabled"; |
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reg-names = "nand_data", "denali_reg"; |
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reg = <0x68000000 0x20>, <0x68100000 0x1000>; |
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interrupts = <0 65 4>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_nand>; |
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clocks = <&sys_clk 2>; |
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nand-ecc-strength = <8>; |
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}; |
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}; |
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}; |
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/include/ "uniphier-pinctrl.dtsi" |
@ -0,0 +1,7 @@ |
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/*
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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void uniphier_pxs3_pll_init(void) |
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{ |
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} |
@ -0,0 +1,76 @@ |
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/*
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* Copyright (C) 2013-2014 Panasonic Corporation |
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* Copyright (C) 2015-2017 Socionext Inc. |
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <linux/errno.h> |
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#include <linux/io.h> |
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#include "soc-info.h" |
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int print_cpuinfo(void) |
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{ |
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unsigned int id, model, rev, required_model = 1, required_rev = 1; |
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id = uniphier_get_soc_id(); |
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model = uniphier_get_soc_model(); |
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rev = uniphier_get_soc_revision(); |
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puts("CPU: "); |
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switch (id) { |
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case UNIPHIER_SLD3_ID: |
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puts("sLD3 (MN2WS0220)"); |
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required_model = 2; |
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break; |
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case UNIPHIER_LD4_ID: |
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puts("LD4 (MN2WS0250)"); |
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required_rev = 2; |
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break; |
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case UNIPHIER_PRO4_ID: |
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puts("Pro4 (MN2WS0230)"); |
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break; |
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case UNIPHIER_SLD8_ID: |
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puts("sLD8 (MN2WS0270)"); |
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break; |
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case UNIPHIER_PRO5_ID: |
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puts("Pro5 (MN2WS0300)"); |
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break; |
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case UNIPHIER_PXS2_ID: |
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puts("PXs2 (MN2WS0310)"); |
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break; |
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case UNIPHIER_LD6B_ID: |
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puts("LD6b (MN2WS0320)"); |
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break; |
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case UNIPHIER_LD11_ID: |
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puts("LD11 (SC1405AP1)"); |
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break; |
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case UNIPHIER_LD20_ID: |
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puts("LD20 (SC1401AJ1)"); |
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break; |
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case UNIPHIER_PXS3_ID: |
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puts("PXs3"); |
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break; |
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default: |
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printf("Unknown Processor ID (0x%x)\n", id); |
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return -ENOTSUPP; |
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} |
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printf(" model %d (revision %d)\n", model, rev); |
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if (model < required_model) { |
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printf("Only model %d or newer is supported.\n", |
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required_model); |
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return -ENOTSUPP; |
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} else if (rev < required_rev) { |
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printf("Only revision %d or newer is supported.\n", |
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required_rev); |
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return -ENOTSUPP; |
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} |
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return 0; |
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} |
@ -1,73 +0,0 @@ |
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/*
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* Copyright (C) 2013-2015 Masahiro Yamada <yamada.masahiro@socionext.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <linux/io.h> |
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#include "sg-regs.h" |
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int print_cpuinfo(void) |
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{ |
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u32 revision, type, model, rev, required_model = 1, required_rev = 1; |
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revision = readl(SG_REVISION); |
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type = (revision & SG_REVISION_TYPE_MASK) >> SG_REVISION_TYPE_SHIFT; |
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model = (revision & SG_REVISION_MODEL_MASK) >> SG_REVISION_MODEL_SHIFT; |
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rev = (revision & SG_REVISION_REV_MASK) >> SG_REVISION_REV_SHIFT; |
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puts("CPU: "); |
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switch (type) { |
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case 0x25: |
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puts("PH1-sLD3 (MN2WS0220)"); |
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required_model = 2; |
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break; |
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case 0x26: |
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puts("PH1-LD4 (MN2WS0250)"); |
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required_rev = 2; |
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break; |
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case 0x28: |
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puts("PH1-Pro4 (MN2WS0230)"); |
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break; |
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case 0x29: |
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puts("PH1-sLD8 (MN2WS0270)"); |
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break; |
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case 0x2A: |
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puts("PH1-Pro5 (MN2WS0300)"); |
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break; |
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case 0x2E: |
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puts("ProXstream2 (MN2WS0310)"); |
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break; |
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case 0x2F: |
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puts("PH1-LD6b (MN2WS0320)"); |
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break; |
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case 0x31: |
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puts("PH1-LD11 (SC1405AP1)"); |
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break; |
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case 0x32: |
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puts("PH1-LD20 (SC1401AJ1)"); |
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break; |
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default: |
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printf("Unknown Processor ID (0x%x)\n", revision); |
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return -1; |
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} |
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printf(" model %d", model); |
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printf(" (rev. %d)\n", rev); |
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if (model < required_model) { |
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printf("Sorry, this model is not supported.\n"); |
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printf("Required model is %d.", required_model); |
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return -1; |
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} else if (rev < required_rev) { |
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printf("Sorry, this revision is not supported.\n"); |
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printf("Required revision is %d.", required_rev); |
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return -1; |
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} |
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return 0; |
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} |
@ -0,0 +1,35 @@ |
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/*
|
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* Copyright (C) 2017 Socionext Inc. |
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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#include <linux/io.h> |
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#include <linux/types.h> |
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|
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#include "sg-regs.h" |
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#include "soc-info.h" |
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|
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static unsigned int __uniphier_get_revision_field(unsigned int mask, |
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unsigned int shift) |
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{ |
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u32 revision = readl(SG_REVISION); |
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|
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return (revision >> shift) & mask; |
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} |
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|
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unsigned int uniphier_get_soc_id(void) |
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{ |
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return __uniphier_get_revision_field(0xff, 16); |
||||
} |
||||
|
||||
unsigned int uniphier_get_soc_model(void) |
||||
{ |
||||
return __uniphier_get_revision_field(0x3, 8); |
||||
} |
||||
|
||||
unsigned int uniphier_get_soc_revision(void) |
||||
{ |
||||
return __uniphier_get_revision_field(0x1f, 0); |
||||
} |
@ -1,76 +1,44 @@ |
||||
/*
|
||||
* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> |
||||
* Copyright (C) 2017 Socionext Inc. |
||||
* Author: Masahiro Yamada <yamada.masahiro@socionext.com> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#ifndef __MACH_SOC_INFO_H__ |
||||
#define __MACH_SOC_INFO_H__ |
||||
|
||||
enum uniphier_soc_id { |
||||
SOC_UNIPHIER_SLD3, |
||||
SOC_UNIPHIER_LD4, |
||||
SOC_UNIPHIER_PRO4, |
||||
SOC_UNIPHIER_SLD8, |
||||
SOC_UNIPHIER_PRO5, |
||||
SOC_UNIPHIER_PXS2, |
||||
SOC_UNIPHIER_LD6B, |
||||
SOC_UNIPHIER_LD11, |
||||
SOC_UNIPHIER_LD20, |
||||
SOC_UNIPHIER_UNKNOWN, |
||||
}; |
||||
|
||||
#define UNIPHIER_NR_ENABLED_SOCS \ |
||||
IS_ENABLED(CONFIG_ARCH_UNIPHIER_SLD3) + \
|
||||
IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD4) + \
|
||||
IS_ENABLED(CONFIG_ARCH_UNIPHIER_PRO4) + \
|
||||
IS_ENABLED(CONFIG_ARCH_UNIPHIER_SLD8) + \
|
||||
IS_ENABLED(CONFIG_ARCH_UNIPHIER_PRO5) + \
|
||||
IS_ENABLED(CONFIG_ARCH_UNIPHIER_PXS2) + \
|
||||
IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD6B) + \
|
||||
IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD11) + \
|
||||
IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD20) |
||||
|
||||
#define UNIPHIER_MULTI_SOC ((UNIPHIER_NR_ENABLED_SOCS) > 1) |
||||
|
||||
#if UNIPHIER_MULTI_SOC |
||||
enum uniphier_soc_id uniphier_get_soc_type(void); |
||||
#else |
||||
static inline enum uniphier_soc_id uniphier_get_soc_type(void) |
||||
{ |
||||
#if defined(CONFIG_ARCH_UNIPHIER_SLD3) |
||||
return SOC_UNIPHIER_SLD3; |
||||
#endif |
||||
#if defined(CONFIG_ARCH_UNIPHIER_LD4) |
||||
return SOC_UNIPHIER_LD4; |
||||
#endif |
||||
#if defined(CONFIG_ARCH_UNIPHIER_PRO4) |
||||
return SOC_UNIPHIER_PRO4; |
||||
#endif |
||||
#if defined(CONFIG_ARCH_UNIPHIER_SLD8) |
||||
return SOC_UNIPHIER_SLD8; |
||||
#endif |
||||
#if defined(CONFIG_ARCH_UNIPHIER_PRO5) |
||||
return SOC_UNIPHIER_PRO5; |
||||
#endif |
||||
#if defined(CONFIG_ARCH_UNIPHIER_PXS2) |
||||
return SOC_UNIPHIER_PXS2; |
||||
#endif |
||||
#if defined(CONFIG_ARCH_UNIPHIER_LD6B) |
||||
return SOC_UNIPHIER_LD6B; |
||||
#endif |
||||
#if defined(CONFIG_ARCH_UNIPHIER_LD11) |
||||
return SOC_UNIPHIER_LD11; |
||||
#endif |
||||
#if defined(CONFIG_ARCH_UNIPHIER_LD20) |
||||
return SOC_UNIPHIER_LD20; |
||||
#endif |
||||
|
||||
return SOC_UNIPHIER_UNKNOWN; |
||||
#ifndef __UNIPHIER_SOC_INFO_H__ |
||||
#define __UNIPHIER_SOC_INFO_H__ |
||||
|
||||
#include <linux/kernel.h> |
||||
#include <linux/stddef.h> |
||||
|
||||
#define UNIPHIER_SLD3_ID 0x25 |
||||
#define UNIPHIER_LD4_ID 0x26 |
||||
#define UNIPHIER_PRO4_ID 0x28 |
||||
#define UNIPHIER_SLD8_ID 0x29 |
||||
#define UNIPHIER_PRO5_ID 0x2a |
||||
#define UNIPHIER_PXS2_ID 0x2e |
||||
#define UNIPHIER_LD6B_ID 0x2f |
||||
#define UNIPHIER_LD11_ID 0x31 |
||||
#define UNIPHIER_LD20_ID 0x32 |
||||
#define UNIPHIER_PXS3_ID 0x35 |
||||
|
||||
unsigned int uniphier_get_soc_id(void); |
||||
unsigned int uniphier_get_soc_model(void); |
||||
unsigned int uniphier_get_soc_revision(void); |
||||
|
||||
#define UNIPHIER_DEFINE_SOCDATA_FUNC(__func_name, __table) \ |
||||
static typeof(&__table[0]) __func_name(void) \
|
||||
{ \
|
||||
unsigned int soc_id; \
|
||||
int i; \
|
||||
\
|
||||
soc_id = uniphier_get_soc_id(); \
|
||||
for (i = 0; i < ARRAY_SIZE(__table); i++) { \
|
||||
if (__table[i].soc_id == soc_id) \
|
||||
return &__table[i]; \
|
||||
} \
|
||||
\
|
||||
return NULL; \
|
||||
} |
||||
#endif |
||||
|
||||
int uniphier_get_soc_model(void); |
||||
int uniphier_get_soc_revision(void); |
||||
|
||||
#endif /* __MACH_SOC_INFO_H__ */ |
||||
#endif /* __UNIPHIER_SOC_INFO_H__ */ |
||||
|
@ -1,84 +0,0 @@ |
||||
/*
|
||||
* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <linux/io.h> |
||||
#include <linux/types.h> |
||||
|
||||
#include "sg-regs.h" |
||||
#include "soc-info.h" |
||||
|
||||
#if UNIPHIER_MULTI_SOC |
||||
enum uniphier_soc_id uniphier_get_soc_type(void) |
||||
{ |
||||
u32 revision = readl(SG_REVISION); |
||||
enum uniphier_soc_id ret; |
||||
|
||||
switch ((revision & SG_REVISION_TYPE_MASK) >> SG_REVISION_TYPE_SHIFT) { |
||||
#ifdef CONFIG_ARCH_UNIPHIER_SLD3 |
||||
case 0x25: |
||||
ret = SOC_UNIPHIER_SLD3; |
||||
break; |
||||
#endif |
||||
#ifdef CONFIG_ARCH_UNIPHIER_LD4 |
||||
case 0x26: |
||||
ret = SOC_UNIPHIER_LD4; |
||||
break; |
||||
#endif |
||||
#ifdef CONFIG_ARCH_UNIPHIER_PRO4 |
||||
case 0x28: |
||||
ret = SOC_UNIPHIER_PRO4; |
||||
break; |
||||
#endif |
||||
#ifdef CONFIG_ARCH_UNIPHIER_SLD8 |
||||
case 0x29: |
||||
ret = SOC_UNIPHIER_SLD8; |
||||
break; |
||||
#endif |
||||
#ifdef CONFIG_ARCH_UNIPHIER_PRO5 |
||||
case 0x2A: |
||||
ret = SOC_UNIPHIER_PRO5; |
||||
break; |
||||
#endif |
||||
#ifdef CONFIG_ARCH_UNIPHIER_PXS2 |
||||
case 0x2E: |
||||
ret = SOC_UNIPHIER_PXS2; |
||||
break; |
||||
#endif |
||||
#ifdef CONFIG_ARCH_UNIPHIER_LD6B |
||||
case 0x2F: |
||||
ret = SOC_UNIPHIER_LD6B; |
||||
break; |
||||
#endif |
||||
#ifdef CONFIG_ARCH_UNIPHIER_LD11 |
||||
case 0x31: |
||||
ret = SOC_UNIPHIER_LD11; |
||||
break; |
||||
#endif |
||||
#ifdef CONFIG_ARCH_UNIPHIER_LD20 |
||||
case 0x32: |
||||
ret = SOC_UNIPHIER_LD20; |
||||
break; |
||||
#endif |
||||
default: |
||||
ret = SOC_UNIPHIER_UNKNOWN; |
||||
break; |
||||
} |
||||
|
||||
return ret; |
||||
} |
||||
#endif |
||||
|
||||
int uniphier_get_soc_model(void) |
||||
{ |
||||
return (readl(SG_REVISION) & SG_REVISION_MODEL_MASK) >> |
||||
SG_REVISION_MODEL_SHIFT; |
||||
} |
||||
|
||||
int uniphier_get_soc_revision(void) |
||||
{ |
||||
return (readl(SG_REVISION) & SG_REVISION_REV_MASK) >> |
||||
SG_REVISION_REV_SHIFT; |
||||
} |
@ -0,0 +1,34 @@ |
||||
CONFIG_ARM=y |
||||
CONFIG_ARCH_UNIPHIER=y |
||||
CONFIG_SYS_MALLOC_F_LEN=0x2000 |
||||
CONFIG_ARCH_UNIPHIER_V8_MULTI=y |
||||
CONFIG_MICRO_SUPPORT_CARD=y |
||||
CONFIG_SYS_TEXT_BASE=0x84000000 |
||||
CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld20-ref" |
||||
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set |
||||
CONFIG_BOARD_LATE_INIT=y |
||||
CONFIG_HUSH_PARSER=y |
||||
# CONFIG_CMD_XIMG is not set |
||||
# CONFIG_CMD_ENV_EXISTS is not set |
||||
CONFIG_CMD_MMC=y |
||||
CONFIG_CMD_I2C=y |
||||
CONFIG_CMD_USB=y |
||||
# CONFIG_CMD_FPGA is not set |
||||
CONFIG_CMD_GPIO=y |
||||
CONFIG_CMD_TFTPPUT=y |
||||
CONFIG_CMD_PING=y |
||||
CONFIG_CMD_CACHE=y |
||||
CONFIG_CMD_TIME=y |
||||
# CONFIG_CMD_MISC is not set |
||||
CONFIG_CMD_FAT=y |
||||
CONFIG_NET_RANDOM_ETHADDR=y |
||||
CONFIG_GPIO_UNIPHIER=y |
||||
CONFIG_MISC=y |
||||
CONFIG_I2C_EEPROM=y |
||||
CONFIG_MMC_UNIPHIER=y |
||||
CONFIG_MMC_SDHCI=y |
||||
CONFIG_MMC_SDHCI_CADENCE=y |
||||
CONFIG_USB=y |
||||
CONFIG_USB_XHCI_HCD=y |
||||
CONFIG_USB_XHCI_DWC3=y |
||||
CONFIG_USB_STORAGE=y |
@ -0,0 +1,140 @@ |
||||
/*
|
||||
* Copyright (C) 2017 Socionext Inc. |
||||
* Author: Masahiro Yamada <yamada.masahiro@socionext.com> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <dm/device.h> |
||||
#include <dm/pinctrl.h> |
||||
|
||||
#include "pinctrl-uniphier.h" |
||||
|
||||
static const unsigned emmc_pins[] = {31, 32, 33, 34, 35, 36, 37, 38}; |
||||
static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0}; |
||||
static const unsigned emmc_dat8_pins[] = {39, 40, 41, 42}; |
||||
static const int emmc_dat8_muxvals[] = {0, 0, 0, 0}; |
||||
static const unsigned ether_rgmii_pins[] = {52, 53, 54, 55, 56, 57, 58, 59, 60, |
||||
61, 62, 63, 64, 65, 66, 67}; |
||||
static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
||||
0, 0, 0, 0}; |
||||
static const unsigned ether_rmii_pins[] = {52, 53, 54, 55, 56, 57, 58, 59, 61, |
||||
63, 64, 67}; |
||||
static const int ether_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1}; |
||||
static const unsigned ether1_rgmii_pins[] = {68, 69, 70, 71, 72, 73, 74, 75, 76, |
||||
77, 78, 79, 80, 81, 82, 83}; |
||||
static const int ether1_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
||||
0, 0, 0, 0}; |
||||
static const unsigned ether1_rmii_pins[] = {68, 69, 70, 71, 72, 73, 74, 75, 77, |
||||
79, 80, 83}; |
||||
static const int ether1_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1}; |
||||
static const unsigned i2c0_pins[] = {104, 105}; |
||||
static const int i2c0_muxvals[] = {0, 0}; |
||||
static const unsigned i2c1_pins[] = {106, 107}; |
||||
static const int i2c1_muxvals[] = {0, 0}; |
||||
static const unsigned i2c2_pins[] = {108, 109}; |
||||
static const int i2c2_muxvals[] = {0, 0}; |
||||
static const unsigned i2c3_pins[] = {110, 111}; |
||||
static const int i2c3_muxvals[] = {0, 0}; |
||||
static const unsigned nand_pins[] = {16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, |
||||
27, 28, 29, 30}; |
||||
static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; |
||||
static const unsigned sd_pins[] = {43, 44, 45, 46, 47, 48, 49, 50, 51}; |
||||
static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; |
||||
static const unsigned system_bus_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, |
||||
12, 13, 14}; |
||||
static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
||||
0}; |
||||
static const unsigned system_bus_cs1_pins[] = {15}; |
||||
static const int system_bus_cs1_muxvals[] = {0}; |
||||
static const unsigned uart0_pins[] = {92, 93}; |
||||
static const int uart0_muxvals[] = {0, 0}; |
||||
static const unsigned uart1_pins[] = {94, 95}; |
||||
static const int uart1_muxvals[] = {0, 0}; |
||||
static const unsigned uart2_pins[] = {96, 97}; |
||||
static const int uart2_muxvals[] = {0, 0}; |
||||
static const unsigned uart3_pins[] = {98, 99}; |
||||
static const int uart3_muxvals[] = {0, 0}; |
||||
static const unsigned usb0_pins[] = {84, 85}; |
||||
static const int usb0_muxvals[] = {0, 0}; |
||||
static const unsigned usb1_pins[] = {86, 87}; |
||||
static const int usb1_muxvals[] = {0, 0}; |
||||
static const unsigned usb2_pins[] = {88, 89}; |
||||
static const int usb2_muxvals[] = {0, 0}; |
||||
static const unsigned usb3_pins[] = {90, 91}; |
||||
static const int usb3_muxvals[] = {0, 0}; |
||||
|
||||
static const struct uniphier_pinctrl_group uniphier_pxs3_groups[] = { |
||||
UNIPHIER_PINCTRL_GROUP(emmc), |
||||
UNIPHIER_PINCTRL_GROUP(emmc_dat8), |
||||
UNIPHIER_PINCTRL_GROUP(ether_rgmii), |
||||
UNIPHIER_PINCTRL_GROUP(ether_rmii), |
||||
UNIPHIER_PINCTRL_GROUP(ether1_rgmii), |
||||
UNIPHIER_PINCTRL_GROUP(ether1_rmii), |
||||
UNIPHIER_PINCTRL_GROUP(i2c0), |
||||
UNIPHIER_PINCTRL_GROUP(i2c1), |
||||
UNIPHIER_PINCTRL_GROUP(i2c2), |
||||
UNIPHIER_PINCTRL_GROUP(i2c3), |
||||
UNIPHIER_PINCTRL_GROUP(nand), |
||||
UNIPHIER_PINCTRL_GROUP(sd), |
||||
UNIPHIER_PINCTRL_GROUP_SPL(system_bus), |
||||
UNIPHIER_PINCTRL_GROUP_SPL(system_bus_cs1), |
||||
UNIPHIER_PINCTRL_GROUP_SPL(uart0), |
||||
UNIPHIER_PINCTRL_GROUP_SPL(uart1), |
||||
UNIPHIER_PINCTRL_GROUP_SPL(uart2), |
||||
UNIPHIER_PINCTRL_GROUP_SPL(uart3), |
||||
UNIPHIER_PINCTRL_GROUP(usb0), |
||||
UNIPHIER_PINCTRL_GROUP(usb1), |
||||
UNIPHIER_PINCTRL_GROUP(usb2), |
||||
UNIPHIER_PINCTRL_GROUP(usb3), |
||||
}; |
||||
|
||||
static const char * const uniphier_pxs3_functions[] = { |
||||
UNIPHIER_PINMUX_FUNCTION(emmc), |
||||
UNIPHIER_PINMUX_FUNCTION(ether_rgmii), |
||||
UNIPHIER_PINMUX_FUNCTION(ether_rmii), |
||||
UNIPHIER_PINMUX_FUNCTION(ether1_rgmii), |
||||
UNIPHIER_PINMUX_FUNCTION(ether1_rmii), |
||||
UNIPHIER_PINMUX_FUNCTION(i2c0), |
||||
UNIPHIER_PINMUX_FUNCTION(i2c1), |
||||
UNIPHIER_PINMUX_FUNCTION(i2c2), |
||||
UNIPHIER_PINMUX_FUNCTION(i2c3), |
||||
UNIPHIER_PINMUX_FUNCTION(nand), |
||||
UNIPHIER_PINMUX_FUNCTION(sd), |
||||
UNIPHIER_PINMUX_FUNCTION_SPL(system_bus), |
||||
UNIPHIER_PINMUX_FUNCTION_SPL(uart0), |
||||
UNIPHIER_PINMUX_FUNCTION_SPL(uart1), |
||||
UNIPHIER_PINMUX_FUNCTION_SPL(uart2), |
||||
UNIPHIER_PINMUX_FUNCTION_SPL(uart3), |
||||
UNIPHIER_PINMUX_FUNCTION(usb0), |
||||
UNIPHIER_PINMUX_FUNCTION(usb1), |
||||
UNIPHIER_PINMUX_FUNCTION(usb2), |
||||
UNIPHIER_PINMUX_FUNCTION(usb3), |
||||
}; |
||||
|
||||
static struct uniphier_pinctrl_socdata uniphier_pxs3_pinctrl_socdata = { |
||||
.groups = uniphier_pxs3_groups, |
||||
.groups_count = ARRAY_SIZE(uniphier_pxs3_groups), |
||||
.functions = uniphier_pxs3_functions, |
||||
.functions_count = ARRAY_SIZE(uniphier_pxs3_functions), |
||||
.caps = UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL, |
||||
}; |
||||
|
||||
static int uniphier_pxs3_pinctrl_probe(struct udevice *dev) |
||||
{ |
||||
return uniphier_pinctrl_probe(dev, &uniphier_pxs3_pinctrl_socdata); |
||||
} |
||||
|
||||
static const struct udevice_id uniphier_pxs3_pinctrl_match[] = { |
||||
{ .compatible = "socionext,uniphier-pxs3-pinctrl" }, |
||||
{ /* sentinel */ } |
||||
}; |
||||
|
||||
U_BOOT_DRIVER(uniphier_pxs3_pinctrl) = { |
||||
.name = "uniphier-pxs3-pinctrl", |
||||
.id = UCLASS_PINCTRL, |
||||
.of_match = of_match_ptr(uniphier_pxs3_pinctrl_match), |
||||
.probe = uniphier_pxs3_pinctrl_probe, |
||||
.priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), |
||||
.ops = &uniphier_pinctrl_ops, |
||||
}; |
Loading…
Reference in new issue